Re: [Mesa-dev] [PATCH] i965: Make Broadwell HiZ path arrange for TC flushes.

2014-04-30 Thread Eric Anholt
Chad Versace writes: > On Mon, Apr 21, 2014 at 02:08:49PM -0700, Kenneth Graunke wrote: >> HiZ operations make the depth/render caches out of sync with the sampler >> caches. We need to arrange for a TC flush to happen before the target >> buffer is used by the sampler. Calling brw_render_cache

Re: [Mesa-dev] [PATCH] i965: Make Broadwell HiZ path arrange for TC flushes.

2014-04-29 Thread Chad Versace
On Mon, Apr 21, 2014 at 02:08:49PM -0700, Kenneth Graunke wrote: > HiZ operations make the depth/render caches out of sync with the sampler > caches. We need to arrange for a TC flush to happen before the target > buffer is used by the sampler. Calling brw_render_cache_set_add_bo > makes that hap

Re: [Mesa-dev] [PATCH] i965: Make Broadwell HiZ path arrange for TC flushes.

2014-04-21 Thread Eric Anholt
Kenneth Graunke writes: > HiZ operations make the depth/render caches out of sync with the sampler > caches. We need to arrange for a TC flush to happen before the target > buffer is used by the sampler. Calling brw_render_cache_set_add_bo > makes that happen. Reviewed-by: Eric Anholt pgp7i