On Fri, Jun 19, 2015 at 6:45 PM, Connor Abbott wrote:
> On Thu, Jun 18, 2015 at 12:04 PM, Rob Clark wrote:
>> It is only vaguely an issue at the moment
>> because the priority-queue scheduler that replaced what is on master
>> does very badly with wide/shallow shaders, ie. like
>> glsl-fs-convolu
On Fri, Jun 19, 2015 at 6:21 PM, Connor Abbott wrote:
>>> and the RA has to
>>> split live-ranges of other things and deal with arrays specially too
>>> in order to not introduce extra array copies.
>>
>> If I did spilling/rematerialization.. but I don't.
>
> If you force every array into a speci
On Fri, Jun 19, 2015 at 6:21 PM, Connor Abbott wrote:
> On Thu, Jun 18, 2015 at 12:04 PM, Rob Clark wrote:
>> On Thu, Jun 18, 2015 at 2:34 PM, Connor Abbott wrote:
>>> On Thu, Jun 18, 2015 at 11:19 AM, Rob Clark wrote:
On Thu, Jun 18, 2015 at 1:27 PM, Connor Abbott wrote:
> On Thu, Ju
On Thu, Jun 18, 2015 at 12:04 PM, Rob Clark wrote:
> It is only vaguely an issue at the moment
> because the priority-queue scheduler that replaced what is on master
> does very badly with wide/shallow shaders, ie. like
> glsl-fs-convolution-1... ie. shaders with a lot of instructions at
> minimum
On Thu, Jun 18, 2015 at 12:04 PM, Rob Clark wrote:
> On Thu, Jun 18, 2015 at 2:34 PM, Connor Abbott wrote:
>> On Thu, Jun 18, 2015 at 11:19 AM, Rob Clark wrote:
>>> On Thu, Jun 18, 2015 at 1:27 PM, Connor Abbott wrote:
On Thu, Jun 18, 2015 at 9:42 AM, Rob Clark wrote:
> On Thu, Jun 18
On Thu, Jun 18, 2015 at 2:34 PM, Connor Abbott wrote:
> On Thu, Jun 18, 2015 at 11:19 AM, Rob Clark wrote:
>> On Thu, Jun 18, 2015 at 1:27 PM, Connor Abbott wrote:
>>> On Thu, Jun 18, 2015 at 9:42 AM, Rob Clark wrote:
On Thu, Jun 18, 2015 at 11:01 AM, Connor Abbott
wrote:
(
On Thu, Jun 18, 2015 at 11:19 AM, Rob Clark wrote:
> On Thu, Jun 18, 2015 at 1:27 PM, Connor Abbott wrote:
>> On Thu, Jun 18, 2015 at 9:42 AM, Rob Clark wrote:
>>> On Thu, Jun 18, 2015 at 11:01 AM, Connor Abbott wrote:
>>> (really I want phi's for variables too.. the way I turn arrays into
On Thu, Jun 18, 2015 at 1:27 PM, Connor Abbott wrote:
> On Thu, Jun 18, 2015 at 9:42 AM, Rob Clark wrote:
>> On Thu, Jun 18, 2015 at 11:01 AM, Connor Abbott wrote:
>> (really I want phi's for variables too.. the way I turn arrays into
>> fanin/collect fanout/split works on the backend f
On Thu, Jun 18, 2015 at 9:42 AM, Rob Clark wrote:
> On Thu, Jun 18, 2015 at 11:01 AM, Connor Abbott wrote:
> (really I want phi's for variables too.. the way I turn arrays into
> fanin/collect fanout/split works on the backend for dealing with
> arrays in ssa form (other than making
On Thu, Jun 18, 2015 at 12:42 PM, Rob Clark wrote:
> On Thu, Jun 18, 2015 at 11:01 AM, Connor Abbott wrote:
> (really I want phi's for variables too.. the way I turn arrays into
> fanin/collect fanout/split works on the backend for dealing with
> arrays in ssa form (other than making
On Thu, Jun 18, 2015 at 11:01 AM, Connor Abbott wrote:
(really I want phi's for variables too.. the way I turn arrays into
fanin/collect fanout/split works on the backend for dealing with
arrays in ssa form (other than making instruction graph large) but the
way I go from nir
On Thu, Jun 18, 2015 at 4:48 AM, Rob Clark wrote:
> On Thu, Jun 18, 2015 at 1:23 AM, Connor Abbott wrote:
>> On Wed, Jun 17, 2015 at 12:02 PM, Rob Clark wrote:
>>> On Wed, Jun 17, 2015 at 2:27 PM, Connor Abbott wrote:
So, as is, this patch isn't quite correct. When I originally wrote
On Thu, Jun 18, 2015 at 1:23 AM, Connor Abbott wrote:
> On Wed, Jun 17, 2015 at 12:02 PM, Rob Clark wrote:
>> On Wed, Jun 17, 2015 at 2:27 PM, Connor Abbott wrote:
>>> So, as is, this patch isn't quite correct. When I originally wrote
>>> NIR, the idea was that the size of each instruction would
On Wed, Jun 17, 2015 at 12:02 PM, Rob Clark wrote:
> On Wed, Jun 17, 2015 at 2:27 PM, Connor Abbott wrote:
>> So, as is, this patch isn't quite correct. When I originally wrote
>> NIR, the idea was that the size of each instruction would be explicit
>> -- that is, each instruction has it's own si
On Wed, Jun 17, 2015 at 2:27 PM, Connor Abbott wrote:
> So, as is, this patch isn't quite correct. When I originally wrote
> NIR, the idea was that the size of each instruction would be explicit
> -- that is, each instruction has it's own size, and the size of
> registers/SSA values was merely a h
So, as is, this patch isn't quite correct. When I originally wrote
NIR, the idea was that the size of each instruction would be explicit
-- that is, each instruction has it's own size, and the size of
registers/SSA values was merely a hint to say "by the way, you
actually need this many components
On Mon, 2015-06-08 at 15:45 -0400, Rob Clark wrote:
> From: Rob Clark
>
> I need something like this in a couple places. And didn't see anything
> like it anywhere.
We ended up doing something similar in our work-in-progress nir/vec4
pass, it makes the code a bit easier to read, so if nobody el
From: Rob Clark
I need something like this in a couple places. And didn't see anything
like it anywhere.
Signed-off-by: Rob Clark
---
v2: Added similar helper for nir_src, and cleaned up a few places that
open coded this. There are a couple left (such as validate_alu_src())
but that handle is
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