On Thursday, August 1, 2019 6:38:45 PM PDT Timothy Arceri wrote:
> From the EGL_KHR_create_context spec:
>
>"* If OpenGL 3.1 is requested, the context returned may implement
>any of the following versions:
>
> * Version 3.1. The GL_ARB_compatibility extension may or may
>
I ended up creating a merge request for this and another patch:
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1550
On 2/8/19 10:09 am, Timothy Arceri wrote:
This adds an additional work around for the game to fix the blocky
shaders as reported in bug 105282
Bugzilla: https://bugs.fre
On Fri, 2 Aug 2019 at 13:08, Brian Paul wrote:
>
> On 08/01/2019 04:56 PM, Charmaine Lee wrote:
> > This patch fixes a missing argument to CreateAtomicCmpXchg for older
> > version of LLVM.
Does this pass CI? please try a pull request.
We've got a bug open
https://bugs.freedesktop.org/show_bug.c
On 08/01/2019 04:56 PM, Charmaine Lee wrote:
This patch fixes a missing argument to CreateAtomicCmpXchg for older
version of LLVM.
---
src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
b/src/gallium/
From the EGL_KHR_create_context spec:
"* If OpenGL 3.1 is requested, the context returned may implement
any of the following versions:
* Version 3.1. The GL_ARB_compatibility extension may or may
not be implemented, as determined by the implementation.
* The
This adds an additional work around for the game to fix the blocky
shaders as reported in bug 105282
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105282
---
src/util/00-mesa-defaults.conf | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/util/00-mesa-defaults.conf b/src/util/00-me
This patch fixes a missing argument to CreateAtomicCmpXchg for older
version of LLVM.
---
src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
index 79d1029..
https://bugs.freedesktop.org/show_bug.cgi?id=41
--- Comment #21 from Steven Newbury ---
The first one alone is enough to trigger the behaviour. It just crashes with
the first disabled and the others enabled.
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You are receiving this mail because:
You are the assignee for the bug.
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On Tue, Jul 23, 2019 at 5:58 PM Francisco Jerez wrote:
>
> Specifically the optimization of a conditional BREAK + WHILE sequence
> into a conditional WHILE seems pretty broken. The list of successors
> of "earlier_block" (where the conditional BREAK was found) is emptied
> and then re-created wit
On Thu, 1 Aug 2019 at 16:03, Emil Velikov wrote:
>
> On Thu, 1 Aug 2019 at 14:26, Michel Dänzer wrote:
> > On 2019-08-01 2:32 p.m., Emil Velikov wrote:
>
> > > Sure I'll do that in a moment.
> >
> > Why don't you just follow my suggestion above?
> >
> That's what I was planning to do :-)
>
Done a
https://bugs.freedesktop.org/show_bug.cgi?id=41
--- Comment #20 from Steven Newbury ---
(In reply to Jason Ekstrand from comment #10)
> The undefined values appear harmless so I'm going to guess that this is
> probably actually a RADV bug. Not knowing too much about RADV, how I'd go
> aboug
https://bugs.freedesktop.org/show_bug.cgi?id=41
--- Comment #19 from Steven Newbury ---
(In reply to Steven Newbury from comment #18)
> (In reply to Connor Abbott from comment #17)
>
> > One other thing you can try is to build mesa with -Dbuildtype=debug (i.e.
> > with assertions enabled and
It's unnecessary to duplicate fields in another struct.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_device.c | 12 -
src/amd/vulkan/radv_image.c | 44 +++-
src/amd/vulkan/radv_meta_clear.c | 12 ++---
src/amd/vulkan/radv_private.h|
It's unnecessary to duplicate fields in another struct.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_device.c | 4 ++--
src/amd/vulkan/radv_image.c | 38 +---
src/amd/vulkan/radv_meta_clear.c | 11 +
src/amd/vulkan/radv_private.h| 13 ++
Build mesa 12143 completed
Commit 3307c85a7d by Brian Paul on 8/1/2019 3:07 PM:
st/mesa: fix MSVC compile breakage\n\nTrivial.
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On Thu, 1 Aug 2019 at 14:26, Michel Dänzer wrote:
> On 2019-08-01 2:32 p.m., Emil Velikov wrote:
> > Sure I'll do that in a moment.
>
> Why don't you just follow my suggestion above?
>
That's what I was planning to do :-)
-Emil
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Hi,
I opened MR to fix this issue and started a discussion about the proper
solution:
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1258
Thanks,
Andrii.
On Wed, Jul 24, 2019 at 10:32 AM Olivier Fourdan wrote:
> Hi,
>
> On Wed, May 22, 2019 at 4:01 AM Ian Romanick wrote:
> > > On Thu
https://bugs.freedesktop.org/show_bug.cgi?id=111053
Haxk20 changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
r-b for patch 1,2,4
On Thu, Aug 1, 2019 at 10:40 AM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_llvm_helper.cpp | 30 +
> src/amd/vulkan/radv_shader.c| 3 ++-
> src/amd/vulkan/radv_shader_helper.h | 3 ++-
> 3 files
So I'm not sure we can actually do this.
AFAIU even though we use a 32-bit wave internally we still have to
expose 64-bit externally, because with
VkPhysicalDeviceSubgroupProperties we say the subgroup size is 64
bits.
So we have to ~emulate a 64-lane wave that always has the upper bits empty.
O
It's 0 for depth surfaces with TC compat HTILE enabled.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_image.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index f3237dd5985..221b554e73e 100644
--- a/s
Fixes: c90f46700dd ("radv/gfx10: mask DCC tile swizzle by alignment")
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_image.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 221b554e73e..8ff93e4344c 1006
On 2019-08-01 2:32 p.m., Emil Velikov wrote:
> On Thu, 1 Aug 2019 at 09:35, Michel Dänzer wrote:
>>
>> On 2019-07-31 11:47 p.m., Eric Engestrom wrote:
>>> On Wednesday, 2019-07-31 16:07:45 +0200, Michel Dänzer wrote:
On 2019-07-31 3:26 p.m., Emil Velikov wrote:
> On Wed, 31 Jul 2019 at 14
On Thu, 1 Aug 2019 at 09:35, Michel Dänzer wrote:
>
> On 2019-07-31 11:47 p.m., Eric Engestrom wrote:
> > On Wednesday, 2019-07-31 16:07:45 +0200, Michel Dänzer wrote:
> >> On 2019-07-31 3:26 p.m., Emil Velikov wrote:
> >>> On Wed, 31 Jul 2019 at 14:16, Michel Dänzer wrote:
>
> On 2019-
+Marek (looks like I forgot to Cc you on this v6 :-/).
On Mon, 22 Jul 2019 09:49:31 +0200
Boris Brezillon wrote:
> Hi Qiang,
>
> On Sun, 21 Jul 2019 17:02:54 +0800
> Qiang Yu wrote:
>
> > On Mon, Jul 15, 2019 at 8:50 PM Boris Brezillon
> > wrote:
> > >
> > > From: Daniel Stone
> > >
> > >
Hey Gert,
I'm looking at
https://cgit.freedesktop.org/mesa/mesa/commit/?id=b048d8bf8f056759d1845a799d4ba2ac84bce30f
, which attempts to implement depth clamping (rather than clipping)
with shader tricks.
You're forcing the final vertex stage's position's depth to 0, and
then making up for it in
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_shader.c | 30 +-
1 file changed, 17 insertions(+), 13 deletions(-)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 97fa80b348c..f0ab2d5e467 100644
--- a/src/amd/vulkan/radv_shader.c
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_llvm_helper.cpp | 30 +
src/amd/vulkan/radv_shader.c| 3 ++-
src/amd/vulkan/radv_shader_helper.h | 3 ++-
3 files changed, 26 insertions(+), 10 deletions(-)
diff --git a/src/amd/vulkan/radv_llvm_helper.c
It can be enabled with RADV_PERFTEST=pswave32.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_debug.h | 1 +
src/amd/vulkan/radv_device.c | 6 ++
src/amd/vulkan/radv_nir_to_llvm.c | 2 ++
src/amd/vulkan/radv_pipeline.c| 3 ++-
src/amd/vulkan/radv_private.h | 1 +
s
It can be enabled with RADV_PERFTEST=gewave32.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_debug.h | 1 +
src/amd/vulkan/radv_device.c | 5 +
src/amd/vulkan/radv_nir_to_llvm.c | 13 +++--
src/amd/vulkan/radv_pipeline.c| 10 +-
src/amd/vulkan/radv_p
On 2019-07-31 11:47 p.m., Eric Engestrom wrote:
> On Wednesday, 2019-07-31 16:07:45 +0200, Michel Dänzer wrote:
>> On 2019-07-31 3:26 p.m., Emil Velikov wrote:
>>> On Wed, 31 Jul 2019 at 14:16, Michel Dänzer wrote:
On 2019-07-31 3:04 p.m., Emil Velikov wrote:
> From: Emil Velikov
>>
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