[Mesa-dev] [PATCH 2/2] i965: Add INTEL_fragment_shader_ordering support.

From: Kevin Rogovin Adds suppport for INTEL_fragment_shader_ordering. We achieve the fragment ordering by using the same instruction as for beginInvocationInterlockARB() which is by issuing a memory fence via sendc. Signed-off-by: Kevin Rogovin --- docs/relnotes/18.3.0.html

[Mesa-dev] [PATCH 0/2] Implement INTEL_fragment_shader_ordering

From: Kevin Rogovin INTEL_fragment_shader_ordering provides the ability for shaders to issue a call to gaurnantee memory write operation ordering of overlapping pixels or samples. In contrast to ARB_fragment_shader_interlock, INTEL_fragment_shader_ordering instead of defining a critical region (w

[Mesa-dev] [PATCH 1/2] mesa: Add GL/GLSL plumbing for INTEL_fragment_shader_ordering.

From: Kevin Rogovin This extension provides new GLSL built-in function beginFragmentShaderOrderingIntel() that guarantees (taking wording of GL_INTEL_fragment_shader_ordering extension) that any memory transactions issued by shader invocations from previous primitives mapped to

Re: [Mesa-dev] [PATCH 3/8] anv/android: add GetAndroidHardwareBufferPropertiesANDROID

On 08/24/2018 05:04 PM, Jason Ekstrand wrote: On Fri, Aug 24, 2018 at 12:08 AM Tapani Pälli > wrote: On 08/22/2018 05:18 PM, Jason Ekstrand wrote: > On Tue, Aug 21, 2018 at 3:27 AM Tapani Pälli mailto:tapani.pa...@intel.com> >

Re: [Mesa-dev] [PATCH v2] glsl/linker: Allow unused in blocks which are not declated on previous stage

Reviewed-by: Timothy Arceri On 24/08/18 18:25, Alejandro Piñeiro wrote: CCing Timothy just in case he still thinks that the original comment should remain as it is. In any case, it looks to me, so: Reviewed-by: Alejandro Piñeiro On 23/08/18 12:12, vadym.shovkoplias wrote: From Section 4.3

Re: [Mesa-dev] [PATCH 1/2] anv: Ensure discreteQueuePriorities is at least 2

We only have one queue but sure, why not? Reviewed-by: Jason Ekstrand On Sun, Aug 26, 2018 at 1:49 PM Gabriel Majeri wrote: > This is the minimum value according to the spec. > --- > src/intel/vulkan/anv_device.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/int

Re: [Mesa-dev] [PATCH] nir: Pull block_ends_in_jump into nir.h

Reviewed-by: Timothy Arceri On 25/08/18 00:34, Jason Ekstrand wrote: We had two different implementations in different files. May as well have one and put it in nir.h. --- src/compiler/nir/nir.h | 7 +++ src/compiler/nir/nir_control_flow.c | 17 + src/comp

[Mesa-dev] [Bug 107524] Broken packDouble2x32 at llvmpipe

https://bugs.freedesktop.org/show_bug.cgi?id=107524 --- Comment #6 from Dave Airlie --- Created attachment 141293 --> https://bugs.freedesktop.org/attachment.cgi?id=141293&action=edit pass two swizzles into fetches. -- You are receiving this mail because: You are the QA Contact for the bug. Y

[Mesa-dev] [Bug 107524] Broken packDouble2x32 at llvmpipe

https://bugs.freedesktop.org/show_bug.cgi?id=107524 --- Comment #7 from Dave Airlie --- The attached patch shoulw in theory fix it. -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the bug.___ mesa-d

[Mesa-dev] [Bug 107524] Broken packDouble2x32 at llvmpipe

https://bugs.freedesktop.org/show_bug.cgi?id=107524 --- Comment #5 from Dave Airlie --- Looked at it a bit last week, but it's messier than I thought, need to dig a bit more to find a proper answer. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee

[Mesa-dev] [PATCH 1/3] android: broadcom/genxml: fix collision with intel/genxml header-gen macro

Fixes the following building error, happening when building both intel and broadcom: Gen Header: libmesa_broadcom_genxml_32 <= v3d_packet_v21_pack.h FAILED: out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h /bin/bash -c "pytho

[Mesa-dev] [PATCH 3/3] android: broadcom/cle: export the broadcom top level path headers

Fixes the following building error in vc4 build: In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_render_cl.c:34: In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_drv.h:27: In file included from external/mesa/src/gallium/drivers/vc4/vc4_simulator_valid

[Mesa-dev] [PATCH 2/3] android: broadcom/cle: add gallium include path

Fixes the following building error: In file included from external/mesa/src/broadcom/cle/v3d_decoder.c:38: In file included from external/mesa/src/broadcom/cle/v3d_packet_helpers.h:29: external/mesa/src/gallium/auxiliary/util/u_math.h:42:10: fatal error: 'pipe/p_compiler.h' file not found

[Mesa-dev] Meson-windows v4: Potential path too long during zlib subproject build when using MsBuild backend

See https://gitlab.freedesktop.org/dbaker/mesa/issues/1 for details. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] meson: Be a bit more helpful when arch or OS is unknown

V2: Add one missing @0@ Signed-off-by: Guido Günther --- meson.build | 21 ++--- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/meson.build b/meson.build index 1b3dfa221c9..c3a7e8cdd74 100644 --- a/meson.build +++ b/meson.build @@ -102,13 +102,15 @@ if _drivers.co

[Mesa-dev] [PATCH 2/2] meson: Don't enable any vulkan drivers on arm, aarch64

There's no Vulkan support for arm atm. Signed-off-by: Guido Günther --- meson.build | 2 ++ 1 file changed, 2 insertions(+) diff --git a/meson.build b/meson.build index c3a7e8cdd74..7f6f128e0b2 100644 --- a/meson.build +++ b/meson.build @@ -179,6 +179,8 @@ if _vulkan_drivers.contains('auto')

Re: [Mesa-dev] [PATCH 1/2] meson: Be a bit more helpful when arch or OS is unknown

Hi, On Sat, Aug 25, 2018 at 05:18:33PM +1000, Stuart Young wrote: >On Fri, 24 Aug 2018 at 22:23, Guido Günther <[1]a...@sigxcpu.org> wrote: > > @@ -230,7 +236,8 @@ if _platforms.contains('auto') >    elif ['haiku'].contains(host_machine.system()) >      _platforms = ['haiku'] >

Re: [Mesa-dev] [PATCH 2/2] meson: Enable readeon vulkan driver on arm, aarch64

Hi, On Sun, Aug 26, 2018 at 10:15:38AM -0700, Dylan Baker wrote: > Quoting Guido Günther (2018-08-24 05:22:06) > > This is similar to what the Debian package does so it looks like a sane > > default. > > > > Signed-off-by: Guido Günther > > --- > > meson.build | 2 ++ > > 1 file changed, 2 inser

Re: [Mesa-dev] [PATCH] nvc0: bump compat GLSL version to match core

Reviewed-by: Karol Herbst On Sun, Aug 26, 2018 at 8:23 PM, Ilia Mirkin wrote: > This passes the handful of tests in piglit. > > Signed-off-by: Ilia Mirkin > --- > > ... once the gl_TexCoord lowering fix is in, but that affects everyone > > src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +-

[Mesa-dev] [PATCH 1/2] anv: Ensure discreteQueuePriorities is at least 2

This is the minimum value according to the spec. --- src/intel/vulkan/anv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index d85615caae..85e497f1dd 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/int

[Mesa-dev] [PATCH 2/2] radv: Ensure discreteQueuePriorities is at least 2

This is the minimum value according to the spec. --- src/amd/vulkan/radv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 79dbbd886d..1283bdba71 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vul

[Mesa-dev] [PATCH 0/2] Fix the value of discreteQueuePriorities

According to the Vulkan specification, the value of the `discreteQueuePriorities` of the device limits structure **must** be at least two. Gabriel Majeri (2): anv: Ensure discreteQueuePriorities is at least 2 radv: Ensure discreteQueuePriorities is at least 2 src/amd/vulkan/radv_device.c |

[Mesa-dev] [PATCH] nvc0: bump compat GLSL version to match core

This passes the handful of tests in piglit. Signed-off-by: Ilia Mirkin --- ... once the gl_TexCoord lowering fix is in, but that affects everyone src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/nvc0/

[Mesa-dev] [PATCH] glsl: avoid lowering texcoord array except in simple cases

With compat creeping up to geometry and tess shaders, lowering texcoord accesses/writes becomes more complicated. Since it's an optimization anyways, just avoid the complication for now. Signed-off-by: Ilia Mirkin --- src/compiler/glsl/opt_dead_builtin_varyings.cpp | 6 ++ 1 file changed, 6

Re: [Mesa-dev] [PATCH 2/2] meson: Enable readeon vulkan driver on arm, aarch64

Quoting Guido Günther (2018-08-24 05:22:06) > This is similar to what the Debian package does so it looks like a sane > default. > > Signed-off-by: Guido Günther > --- > meson.build | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/meson.build b/meson.build > index ccc0ed6a0ea..bf8f077

Re: [Mesa-dev] [PATCH 2/3] nir: Create sampler variables in prog_to_nir.

On Sat, Aug 25, 2018 at 5:25 PM Kenneth Graunke wrote: > On Saturday, August 25, 2018 6:05:57 AM PDT Jason Ekstrand wrote: > > On Fri, Aug 24, 2018 at 8:24 PM Kenneth Graunke > > wrote: > > > > > This is needed for nir_gather_info to actually count the textures, > > > since it operates solely on

[Mesa-dev] [Bug 107022] [RADV] The Witcher 3: Trembling of trees

https://bugs.freedesktop.org/show_bug.cgi?id=107022 --- Comment #16 from Samuel Pitoiset --- No, I should be able to have a look in the next few weeks. -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the bug.__

[Mesa-dev] [PATCH] anv: Put batch buffers in their own address space

This protects the batches a bit from being overwritten by random OOB memor access. Maybe not worth merging but it's somewhat interesting for debugging. --- src/intel/vulkan/anv_allocator.c | 11 +-- src/intel/vulkan/anv_device.c| 3 ++- src/intel/vulkan/anv_private.h | 8 ++--

Re: [Mesa-dev] [PATCH 2/5] i965/fs: Emit BRW_AOP_INC or BRW_AOP_DEC for atomicAdd of +1 or -1

On August 24, 2018 22:49:14 "Ian Romanick" wrote: From: Ian Romanick Funny story... a single shader was hurt for instructions, spills, fills. That same shader was also the most helped for cycles. #GPUsAreWeird No changes on any other Intel platform. Haswell, Broadwell, and Skylake had simi

[Mesa-dev] [Bug 107022] [RADV] The Witcher 3: Trembling of trees

https://bugs.freedesktop.org/show_bug.cgi?id=107022 --- Comment #15 from zefkerri...@gmail.com --- I found out that this bug is only apparent when I compiled Mesa-git with llvm-svn installed. But this bug is completely missing when I compiled Mesa-git with installed llvm 6.0.1 (stable version) . A