Re: [Mesa-dev] [PATCH] r600/sb: fix crash in fold_alu_op3

2018-07-03 Thread Dave Airlie
On 4 July 2018 at 12:44, wrote: > From: Roland Scheidegger > > fold_assoc() called from fold_alu_op3() can lower the number of src to 2, > which then leads to an invalid access to n.src[2]->gvalue(). > This didn't seem to have caused much harm in the past, but on Fedora 28 > it will crash (presu

Re: [Mesa-dev] [PATCH 1/4] ac: add reusable helpers for direct LLVM compilation

2018-07-03 Thread Dave Airlie
On 4 July 2018 at 16:02, Marek Olšák wrote: > From: Marek Olšák > > This is basically LLVMTargetMachineEmitToMemoryBuffer inlined and reworked. > > struct ac_compiler_passes (opaque type) contains the main pass manager. > > ac_create_llvm_passes -- the result can go to thread local storage > ac_d

[Mesa-dev] radv variable pointers (nir/spirv/radv)

2018-07-03 Thread Dave Airlie
This is a bit hacky, (esp not sure about the nir bits). When we enable variable pointers on radv we don't want to do the offset lowering stuff, so this fixes up all the fallout from enabling things. The big issue is a select followed by a load, since the select can't have a variable pointer in it

[Mesa-dev] [PATCH 3/3] radv: enable variablePointers.

2018-07-03 Thread Dave Airlie
From: Dave Airlie --- src/amd/common/ac_llvm_build.c | 3 +++ src/amd/common/ac_nir_to_llvm.c | 33 +++-- src/amd/vulkan/radv_device.c| 2 +- 3 files changed, 27 insertions(+), 11 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llv

[Mesa-dev] [PATCH 2/3] spirv/vtn: handle variable pointers without offset lowering

2018-07-03 Thread Dave Airlie
From: Dave Airlie --- src/compiler/spirv/spirv_to_nir.c | 15 --- src/compiler/spirv/vtn_variables.c | 3 ++- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index fb4211193fb..f8c11aaf929 100644

[Mesa-dev] [PATCH 1/3] nir: handle no variable in derefs in some places

2018-07-03 Thread Dave Airlie
From: Dave Airlie --- src/compiler/nir/nir_gather_info.c | 2 ++ src/compiler/nir/nir_lower_indirect_derefs.c | 4 src/compiler/nir/nir_lower_vars_to_ssa.c | 4 3 files changed, 10 insertions(+) diff --git a/src/compiler/nir/nir_gather_info.c b/src/compiler/nir/nir_gath

[Mesa-dev] [PATCH 3/3] intel/nir: Enable nir_opt_move_discards_to_top

2018-07-03 Thread Jason Ekstrand
According to RenderDoc, this shaves about 15% off of one of the render passes in the Skyrim SE frame I've been analyzing on my KBL laptop and about 8% off the whole frame. It's a bit noisy and hard to tell with just the DXVK HUD but there appears to be a small FPS bump in-game as well. --- src/in

[Mesa-dev] [PATCH 2/3] nir: Add a discard optimization pass

2018-07-03 Thread Jason Ekstrand
Many fragment shaders do a discard using relatively little information but still put the discard fairly far down in the shader for no good reason. If the discard is moved higher up, we can possibly avoid doing some or almost all of the work in the shader. When this lets us skip texturing operatio

[Mesa-dev] [PATCH 1/3] nir/worklist: Rework the foreach macro

2018-07-03 Thread Jason Ekstrand
This makes the arguments match the (thing, container) pattern used in other nir_foreach macros and also renames it to make that a bit more clear. --- src/compiler/nir/nir_opt_dce.c | 3 +-- src/compiler/nir/nir_worklist.h | 4 ++-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/sr

[Mesa-dev] [PATCH 2/4] radeonsi: use ac_compile_module_to_binary to reduce compile times

2018-07-03 Thread Marek Olšák
From: Marek Olšák Compile times of simple shaders are reduced by ~20%. Compile times of prologs and epilogs are reduced by up to 40%. --- src/gallium/drivers/radeonsi/si_pipe.c| 2 ++ .../drivers/radeonsi/si_shader_tgsi_setup.c | 33 ++- 2 files changed, 4 insertions(+

[Mesa-dev] [PATCH 3/4] radeonsi: reorder code in si_llvm_context_init

2018-07-03 Thread Marek Olšák
From: Marek Olšák --- .../drivers/radeonsi/si_shader_tgsi_setup.c | 26 +-- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c index 6c1e18ff812..b8cfd15a67f

[Mesa-dev] [PATCH 4/4] ac: fold LLVMContext creation into ac_llvm_context_init

2018-07-03 Thread Marek Olšák
From: Marek Olšák --- src/amd/common/ac_llvm_build.c | 6 +++--- src/amd/common/ac_llvm_build.h | 2 +- src/amd/vulkan/radv_nir_to_llvm.c | 10 -- src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 5 + 4 files changed

[Mesa-dev] [PATCH 1/4] ac: add reusable helpers for direct LLVM compilation

2018-07-03 Thread Marek Olšák
From: Marek Olšák This is basically LLVMTargetMachineEmitToMemoryBuffer inlined and reworked. struct ac_compiler_passes (opaque type) contains the main pass manager. ac_create_llvm_passes -- the result can go to thread local storage ac_destroy_llvm_passes -- can be called by a destructor in TLS

Re: [Mesa-dev] [PATCH 1/1] mesa/st: draw_vbo: initialize restart_index too

2018-07-03 Thread Mathias Fröhlich
Hi, Reviewed-by: Mathias Fröhlich best Mathias On Sunday, 1 July 2018 10:05:35 CEST Gert Wollny wrote: > From: Gert Wollny > > restart_index is later always used in a comparison, so it should be > initialized properly. > > Fixes valgrind warning: > Conditional jump or move depends on uninit

Re: [Mesa-dev] [PATCH] nir/linker: fix msvc build

2018-07-03 Thread Timothy Arceri
Reviewed-by: Timothy Arceri On 04/07/18 11:51, srol...@vmware.com wrote: From: Roland Scheidegger Empty initializer braces aren't valid c (it's a gnu extension, and it's valid in c++). Hopefully fixes appveyor / msvc build... Fixes 6677e131b806b10754adcb7cf3f427a7fcc2aa09 --- src/compiler/

[Mesa-dev] [PATCH] r600/sb: fix crash in fold_alu_op3

2018-07-03 Thread sroland
From: Roland Scheidegger fold_assoc() called from fold_alu_op3() can lower the number of src to 2, which then leads to an invalid access to n.src[2]->gvalue(). This didn't seem to have caused much harm in the past, but on Fedora 28 it will crash (presumably because -D_GLIBCXX_ASSERTIONS is used,

[Mesa-dev] [Bug 107092] Thread leak when changing context size

2018-07-03 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107092 --- Comment #5 from Roland Scheidegger --- (In reply to Cory Quammen from comment #4) > Thank you for your quick reply and insight, Roland. Creating and destroying > glX contexts is a bit of a peculiarity in VTK that we may be able to do away >

[Mesa-dev] [PATCH] nir/linker: fix msvc build

2018-07-03 Thread sroland
From: Roland Scheidegger Empty initializer braces aren't valid c (it's a gnu extension, and it's valid in c++). Hopefully fixes appveyor / msvc build... Fixes 6677e131b806b10754adcb7cf3f427a7fcc2aa09 --- src/compiler/glsl/gl_nir_link_atomics.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(

Re: [Mesa-dev] [PATCH 3/3] intel/compiler: add an optimization pass for booleans

2018-07-03 Thread Caio Marcelo de Oliveira Filho
Hi, > + /* Look for any follow-up instructions that sources from the boolean > +* result of the producer instruction and rewrite them to use the correct > +* bit-size. > +*/ > + foreach_inst_in_block_starting_from(fs_inst, fixup_inst, inst) { > + if (!inst_supports_boolean(fi

Re: [Mesa-dev] [PATCH] nvc0: implement multisampled images on Maxwell+

2018-07-03 Thread Karol Herbst
great work, some comments below though. On Wed, Jul 4, 2018 at 12:37 AM, Rhys Perry wrote: > Signed-off-by: Rhys Perry > --- > .../drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp | 16 > > .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp| 3 +++ > .../drivers/no

Re: [Mesa-dev] [PATCH 2/3] intel/compiler: add a region_match() helper

2018-07-03 Thread Caio Marcelo de Oliveira Filho
> +/** > + * Check that the register region given by r [r.offset, r.offset + dr[ > + * is exactly the same as the the register region given by s > + * [s.offset, s.offset + ds[ > + */ > +static inline bool > +region_match(const fs_reg &r, unsigned dr, const fs_reg &s, unsigned ds) > +{ > + return

[Mesa-dev] [PATCH] mesa: enable ARB_direct_state_access in OpenGL 4.5 compat profile

2018-07-03 Thread Timothy Arceri
Its unlikely anyone will add proper ARB_direct_state_access compat support before we branch 18.2. Enabling the extension in 4.5 at least allows users to make use of MESA_GL_VERSION_OVERRIDE=4.5COMPAT for games like No Mans Sky. --- src/mapi/glapi/gen/apiexec.py| 194 +++

Re: [Mesa-dev] [PATCH 0/1] swr/rast: last swr formatting changes for a while v2

2018-07-03 Thread Cherniak, Bruce
Reviewed-by: Bruce Cherniak > On Jun 28, 2018, at 2:17 PM, Alok Hota wrote: > > Sorry for the churn on these patches. They had to be split in three due > to some code change in between a mass formatting change. Anyway this > patch contains only formatting changes for the files that were update

[Mesa-dev] [PATCH] util/drirc: turn on force_glsl_extensions_warn for No Mans Sky

2018-07-03 Thread Timothy Arceri
The game forgets to enable multiple extensions in its shaders, one of those extesions is EXT_texture_array. But enabling this config entry fixes at least one other rendering issue that enabling EXT_texture_array on its own doesn't fix. --- src/util/drirc | 4 1 file changed, 4 insertions(+)

Re: [Mesa-dev] [PATCH 4/4] Shorten u_queue names

2018-07-03 Thread Timothy Arceri
Series: Reviewed-by: Timothy Arceri On 04/07/18 09:16, Marek Olšák wrote: From: Marek Olšák There is a 15-character limit for thread names shared by the queue name and process name. Shorten the thread name to make space for the process name. --- src/gallium/auxiliary/util/u_threaded_contex

[Mesa-dev] [PATCH 2/4] gallium/os: use util_get_process_name when possible

2018-07-03 Thread Marek Olšák
From: Marek Olšák --- src/gallium/auxiliary/os/os_process.c | 16 ++-- src/util/process.c| 2 ++ 2 files changed, 4 insertions(+), 14 deletions(-) diff --git a/src/gallium/auxiliary/os/os_process.c b/src/gallium/auxiliary/os/os_process.c index 035bd228e76..8707

[Mesa-dev] [PATCH 1/4] util: extract get_process_name from xmlconfig.c

2018-07-03 Thread Marek Olšák
From: Marek Olšák --- src/util/Makefile.sources | 2 + src/util/process.c| 116 ++ src/util/process.h| 34 +++ src/util/xmlconfig.c | 86 +--- 4 files changed, 154 insertions(+), 84 deletions(-) create

[Mesa-dev] [PATCH 4/4] Shorten u_queue names

2018-07-03 Thread Marek Olšák
From: Marek Olšák There is a 15-character limit for thread names shared by the queue name and process name. Shorten the thread name to make space for the process name. --- src/gallium/auxiliary/util/u_threaded_context.c | 2 +- src/gallium/drivers/radeonsi/si_pipe.c| 4 ++-- src/ga

[Mesa-dev] [PATCH 3/4] util/queue: add a process name into a thread name

2018-07-03 Thread Marek Olšák
From: Marek Olšák --- src/util/u_queue.c | 35 +-- src/util/u_queue.h | 2 +- 2 files changed, 34 insertions(+), 3 deletions(-) diff --git a/src/util/u_queue.c b/src/util/u_queue.c index da513fd9cc5..6c92e8140a1 100644 --- a/src/util/u_queue.c +++ b/src/util/u_q

Re: [Mesa-dev] [PATCH 11/11] ac: make some fns static

2018-07-03 Thread Marek Olšák
For patches 9-11: Reviewed-by: Marek Olšák Marek On Mon, Jul 2, 2018 at 8:42 PM, Dave Airlie wrote: > From: Dave Airlie > > Some of the compiler functions are no longer called outside > the util file. > --- > src/amd/common/ac_llvm_util.c | 12 ++-- > src/amd/common/ac_llvm_util.h |

[Mesa-dev] [PATCH] nvc0: implement multisampled images on Maxwell+

2018-07-03 Thread Rhys Perry
Signed-off-by: Rhys Perry --- .../drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp | 16 .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp| 3 +++ .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h | 2 +- src/gallium/drivers/nouveau/nv50/nv50_resource.h

Re: [Mesa-dev] [PATCH 1/1] mesa/st: draw_vbo: initialize restart_index too

2018-07-03 Thread Marek Olšák
On Mon, Jul 2, 2018 at 9:30 AM, Brian Paul wrote: > On 07/01/2018 02:05 AM, Gert Wollny wrote: >> >> From: Gert Wollny >> >> restart_index is later always used in a comparison, so it should be >> initialized properly. >> >> Fixes valgrind warning: >> Conditional jump or move depends on uninitia

Re: [Mesa-dev] [PATCH] i965: Fix output register sizes when variable ranges are interleaved

2018-07-03 Thread Caio Marcelo de Oliveira Filho
Reviewed-by: Caio Marcelo de Oliveira Filho Also consider including a fixes tag. Fixes: 6f5abf31466 "i965: Fix output register sizes when multiple variables share a slot." On Fri, May 18, 2018 at 03:31:00PM +0200, Neil Roberts wrote: > In 6f5abf31466aed this code was fixed to calculate the max

Re: [Mesa-dev] [PATCH] [RFC] i965/blit: bump some limits to 64k

2018-07-03 Thread Nanley Chery
On Mon, Jun 18, 2018 at 03:42:13PM -0700, Nanley Chery wrote: > On Thu, Jun 14, 2018 at 07:50:54PM +0100, Chris Wilson wrote: > > Quoting Nanley Chery (2018-06-14 19:46:09) > > > On Thu, Jun 14, 2018 at 10:01:18AM -0700, Nanley Chery wrote: > > > > On Thu, Jun 14, 2018 at 04:18:30PM +0300, Martin P

Re: [Mesa-dev] [PATCH] anv/icl: Don't set float blend optimization bit in CACHE_MODE_SS

2018-07-03 Thread Jason Ekstrand
Both are R-b me On July 3, 2018 15:25:33 Anuj Phogat wrote: Bump On Fri, Jun 1, 2018 at 2:40 PM Anuj Phogat wrote: CACHE_MODE_SS is not listed in gfxspecs table for user mode non-privileged registers. So, making any changes from Mesa will do nothing. Kernel is already setting this bit in CA

Re: [Mesa-dev] [PATCH 1/2 v2] intel/compiler: More DCE after lowering

2018-07-03 Thread Jason Ekstrand
Rb On July 3, 2018 15:31:38 "Ian Romanick" wrote: From: Ian Romanick Some of the lowering passes, nir_lower_locals_to_regs for example, can cause some previously live code to be dead. This pass in particular leaves a bunch of nir_instr_type_deref instructions floating around. This causes sh

[Mesa-dev] [PATCH 1/2 v2] intel/compiler: More DCE after lowering

2018-07-03 Thread Ian Romanick
From: Ian Romanick Some of the lowering passes, nir_lower_locals_to_regs for example, can cause some previously live code to be dead. This pass in particular leaves a bunch of nir_instr_type_deref instructions floating around. This causes shader-db runs on Gen5 through Haswell to spew tons of me

Re: [Mesa-dev] [PATCH] i965/icl: Don't set float blend optimization bit in CACHE_MODE_SS

2018-07-03 Thread Anuj Phogat
Bump. On Fri, Jun 1, 2018 at 2:40 PM Anuj Phogat wrote: > > CACHE_MODE_SS is not listed in gfxspecs table for user mode > non-privileged registers. So, making any changes from Mesa > will do nothing. Kernel is already setting this bit in > CACHE_MODE_SS register which is saved/restored to/from > t

Re: [Mesa-dev] [PATCH] anv/icl: Don't set float blend optimization bit in CACHE_MODE_SS

2018-07-03 Thread Anuj Phogat
Bump On Fri, Jun 1, 2018 at 2:40 PM Anuj Phogat wrote: > > CACHE_MODE_SS is not listed in gfxspecs table for user mode > non-privileged registers. So, making any changes from Mesa > will do nothing. Kernel is already setting this bit in > CACHE_MODE_SS register which is saved/restored to/from > th

[Mesa-dev] [PATCH] radv: using tls to store llvm related info and speed up compiles (v7)

2018-07-03 Thread Dave Airlie
From: Dave Airlie I'd like to encourage people to test this to see if it helps (like does it make app startup better or less hitching in dxvk). The basic idea is to store a bunch of LLVM related data structs in thread local storage so we can avoid reiniting them every time we compile a shader. S

[Mesa-dev] [Bug 107090] nir: problem case for loop unrolling

2018-07-03 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107090 Caio Marcelo de Oliveira Filho changed: What|Removed |Added Status|NEEDINFO|RESOLVED Resol

[Mesa-dev] [AppVeyor] mesa master #8054 failed

2018-07-03 Thread AppVeyor
Build mesa 8054 failed Commit 584ad1eda9 by Dave Airlie on 6/26/2018 10:52 PM: ac/radeonsi: refactor out pass manager init to common code.\n\nReviewed-by: Marek Olšák Configure your notification preferences __

Re: [Mesa-dev] [PATCH 04/11] radv: port to use common passmgr code.

2018-07-03 Thread Dave Airlie
On 4 July 2018 at 03:11, Marek Olšák wrote: > If radeonsi adds target library info, I highly recommend that radv does the > same thing. > We can't due to the leak situation, there is no case where radv can just leak stuff like radeonsi does here, until we get to the thread allocs. Dave.

[Mesa-dev] [AppVeyor] mesa staging/18.1 #8053 completed

2018-07-03 Thread AppVeyor
Build mesa 8053 completed Commit 81af1a0ae2 by Timothy Arceri on 6/4/2018 6:26 AM: nir: fix selection of loop terminator when two or more have the same limit\n\nWe need to add loop terminators to the list in the order we come\nacross them otherwise if two or mo

[Mesa-dev] DXVK - VK_ERROR_DEVICE_LOST

2018-07-03 Thread MrChebik
Hi, I'm having an error using DXVK in some games: `VK_ERROR_DEVICE_LOST` Also, it was checked with the new Mesa version 18.1.3. You can will get acquainted with a problem according to the reference: https://github.com/doitsujin/dxvk/issues/469 ___ mesa-d

Re: [Mesa-dev] [PATCH 1/2] i965/vec4: Handle nir_instr_type_deref to silence run-time output

2018-07-03 Thread Jason Ekstrand
On Tue, Jul 3, 2018 at 10:24 AM, Ian Romanick wrote: > On 07/03/2018 07:09 AM, Jason Ekstrand wrote: > > Do we do this in fs? I'm very confused as to how any deref instructions > > can survive this late. They can for fs but only for images (not > > textures). I would expect them to be killed of

Re: [Mesa-dev] [PATCH 1/2] i965/vec4: Handle nir_instr_type_deref to silence run-time output

2018-07-03 Thread Ian Romanick
On 07/03/2018 07:09 AM, Jason Ekstrand wrote: > Do we do this in fs?  I'm very confused as to how any deref instructions > can survive this late.  They can for fs but only for images (not > textures). I would expect them to be killed off by DCE long before we > get here. I didn't debug this to gre

Re: [Mesa-dev] [PATCH 08/11] radv/radeonsi: add a check ir tm options

2018-07-03 Thread Marek Olšák
For patches 4-8: Reviewed-by: Marek Olšák Marek On Mon, Jul 2, 2018, 8:48 PM Dave Airlie wrote: > From: Dave Airlie > > This doesn't do much yet, but it makes it easier to move the code > to a common shared code base. > --- > src/amd/common/ac_llvm_util.h | 1 + > src/amd/vulkan/rad

Re: [Mesa-dev] [PATCH 04/11] radv: port to use common passmgr code.

2018-07-03 Thread Marek Olšák
If radeonsi adds target library info, I highly recommend that radv does the same thing. Marek On Mon, Jul 2, 2018, 8:48 PM Dave Airlie wrote: > From: Dave Airlie > > This adds a inline always pass, but otherwise should work the > same. > --- > src/amd/common/ac_llvm_util.c | 5 +++-- > s

Re: [Mesa-dev] [PATCH 03/11] ac/radeonsi: refactor out pass manager init to common code.

2018-07-03 Thread Marek Olšák
s/init/create/ ? Anyway, patch 1-3: Reviewed-by: Marek Olšák On Mon, Jul 2, 2018, 8:48 PM Dave Airlie wrote: > From: Dave Airlie > > --- > src/amd/common/ac_llvm_util.c | 30 ++ > src/amd/common/ac_llvm_util.h | 2 ++ > src/gallium/drivers/radeonsi/

[Mesa-dev] [Bug 107092] Thread leak when changing context size

2018-07-03 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107092 --- Comment #4 from Cory Quammen --- Thank you for your quick reply and insight, Roland. Creating and destroying glX contexts is a bit of a peculiarity in VTK that we may be able to do away with - I'm not sure why VTK does that, so maybe we can

[Mesa-dev] [Bug 107092] Thread leak when changing context size

2018-07-03 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107092 Cory Quammen changed: What|Removed |Added CC||chuck.atk...@kitware.com -- You are rec

Re: [Mesa-dev] [PATCH 1/2] i965/vec4: Handle nir_instr_type_deref to silence run-time output

2018-07-03 Thread Jason Ekstrand
Do we do this in fs? I'm very confused as to how any deref instructions can survive this late. They can for fs but only for images (not textures). I would expect them to be killed off by DCE long before we get here. On July 3, 2018 00:26:32 "Ian Romanick" wrote: From: Ian Romanick Previo

Re: [Mesa-dev] [PATCH 2/2] i965/vec4: Make the vec4_visitor::nir_emit_instr default case unreachable

2018-07-03 Thread Jason Ekstrand
Ugh... Why was that not unreachable before?... R-b. On July 3, 2018 00:26:36 "Ian Romanick" wrote: From: Ian Romanick The bug fixed by the previous commit went undetected because extra stderr messages are not flagged by the CI. Copy the solution from fs_visitor::nir_emit_instr and mark the

Re: [Mesa-dev] [PATCH] i965: Disable guardband clipping on SandyBridge for odd dimensions

2018-07-03 Thread Vadim Shovkoplias
Hi mesa devs, Can anyone please review this ? This patch fixes following bugs: Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104388 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106158 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106667 2018-06-07 18:27 GMT+03:00 Vad

Re: [Mesa-dev] [PATCH v2 00/16] ARB_gl_spirv series 3 v2: support for atomic counters

2018-07-03 Thread Alejandro Piñeiro
On 03/07/18 02:29, Timothy Arceri wrote: > Series looks good to me. Just pushed to master. Thanks! > How much to go before we can turn this extension on? TL; DR: In summary there is a lot already done, but there is still work to do. In general, we tried to cover as much features as possible, an

[Mesa-dev] [AppVeyor] mesa master #8052 failed

2018-07-03 Thread AppVeyor
Build mesa 8052 failed Commit 590cc7c8f6 by Neil Roberts on 11/29/2017 9:14 AM: i965: Use the new nir atomic counter linker for SPIR-V shaders\n\nReviewed-by: Timothy Arceri Configure your notification preferences ___

[Mesa-dev] [PATCH] virgl: Expose GL_ARB_copy_image if host supports it

2018-07-03 Thread Gert Wollny
Signed-off-by: Gert Wollny --- Note that I used (1 << 3) instead of (1 << 2) because Dave's experimental patch already uses the latter for computer shader caps. The host side patch starting to implement this can be found here: https://patchwork.freedesktop.org/series/45064/ Thanks for reviewi

[Mesa-dev] [PATCH 2/2] radv: add the trace BO to the list when starting a new cmdbuf

2018-07-03 Thread Samuel Pitoiset
That might reduce CPU overhead a little bit when using RADV_TRACE_FILE. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 26

[Mesa-dev] [PATCH 1/2] radv: reduce CPU overhead in radv_flush_descriptors()

2018-07-03 Thread Samuel Pitoiset
The number of enabled descriptors for a given pipeline stage can be computed at compile time. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 11 ++- src/amd/vulkan/radv_nir_to_llvm.c | 7 +-- src/amd/vulkan/radv_shader.h | 1 + 3 files changed, 8 insert

Re: [Mesa-dev] Question about EGL_KHR_partial_update implementation

2018-07-03 Thread Emil Velikov
Hi Frank, On 28 June 2018 at 11:12, Frank Binns wrote: > Hi Qiang, > > Qiang Yu writes: > >> Hi Harish, >> >> I want to implement EGL_KHR_partial_update for lima mesa driver and find you >> worked on Android/Wayland support for it: >> https://patchwork.freedesktop.org/patch/160944/ >> https://pa

Re: [Mesa-dev] [PATCH] radv: using tls to store llvm related info and speed up compiles (v6)

2018-07-03 Thread Eric Engestrom
On Tuesday, 2018-07-03 11:26:44 +1000, Dave Airlie wrote: > From: Dave Airlie > > I'd like to encourage people to test this to see if it helps (like > does it make app startup better or less hitching in dxvk). > > The basic idea is to store a bunch of LLVM related data structs > in thread local

Re: [Mesa-dev] [PATCH] st/nir: Disable varying packing when doing transform feedback.

2018-07-03 Thread Timothy Arceri
On 03/07/18 05:51, Eric Anholt wrote: Eric Anholt writes: [ Unknown signature status ] Timothy Arceri writes: nir_compact_varyings() is meant to skip over varyings used by xfb: /* We can't repack xfb varyings. */ if (var->data.always_active_io) continue

[Mesa-dev] [Bug 107098] Segfault after munmap(kms_sw_dt->ro_mapped)

2018-07-03 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107098 Bug ID: 107098 Summary: Segfault after munmap(kms_sw_dt->ro_mapped) Product: Mesa Version: 18.0 Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Seve

[Mesa-dev] [Bug 107096] GLSL disk cache: blob format changes may cause segfaults etc.

2018-07-03 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107096 Michel Dänzer changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

Re: [Mesa-dev] [PATCH 4/4] anv/cmd_buffer: only emit state base address if the address changes

2018-07-03 Thread Iago Toral
On Mon, 2018-07-02 at 08:23 -0500, Jason Ekstrand wrote: > On July 2, 2018 01:09:38 Iago Toral wrote: > > > On Sun, 2018-07-01 at 18:30 -0500, Jason Ekstrand wrote: > > > On June 29, 2018 03:11:00 Iago Toral Quiroga > > > wrote: > > > > > > > --- > > > > src/intel/vulkan/anv_private.h | 5