On 21/03/18 06:57, Lin Johnson wrote:
> Ext_color_buffer_half_float is using type GL_HALF_FLOAT
> and data_type GL_FLOAT. This fix Android CTS test
> android.view.cts.PixelCopyTest
> #TestWindowProducerCopyToRGBA16F
>
> Signed-off-by: Lin Johnson
> ---
> src/mesa/main/readpix.c | 2 ++
> 1 file
Ext_color_buffer_half_float is using type GL_HALF_FLOAT
and data_type GL_FLOAT. This fix Android CTS test android.view.cts.PixelCopyTest
#TestWindowProducerCopyToRGBA16F
Signed-off-by: Lin Johnson
---
src/mesa/main/readpix.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/main/rea
This will be needed by anything which changes variable modes without
rewriting derefs.
---
src/compiler/nir/nir.h | 2 ++
src/compiler/nir/nir_deref.c | 30 ++
2 files changed, 32 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index d
---
src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
index 69da83a..0fd1492 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mes
---
src/compiler/nir/nir_remove_dead_variables.c | 99
1 file changed, 99 insertions(+)
diff --git a/src/compiler/nir/nir_remove_dead_variables.c
b/src/compiler/nir/nir_remove_dead_variables.c
index eff66f9..6b1927f 100644
--- a/src/compiler/nir/nir_remove_dead_varia
---
src/compiler/nir/nir_lower_wpos_ytransform.c | 29
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/src/compiler/nir/nir_lower_wpos_ytransform.c
b/src/compiler/nir/nir_lower_wpos_ytransform.c
index 62166e7..2e0dd86 100644
--- a/src/compiler/nir/nir_l
This pass doesn't handle deref instructions yet. Making it handle both
legacy derefs and deref instructions would be painful. Since it's not
important for correctness, just disable it for now.
---
src/gallium/drivers/freedreno/ir3/ir3_nir.c | 2 +-
src/intel/compiler/brw_nir.c| 2
---
.../nir/nir_lower_clip_cull_distance_arrays.c | 69 --
1 file changed, 65 insertions(+), 4 deletions(-)
diff --git a/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c
b/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c
index 95eda82..69b31d5 100644
--- a/sr
---
src/compiler/nir/nir_lower_atomics.c | 115 +--
1 file changed, 110 insertions(+), 5 deletions(-)
diff --git a/src/compiler/nir/nir_lower_atomics.c
b/src/compiler/nir/nir_lower_atomics.c
index 2287517..9cf6608 100644
--- a/src/compiler/nir/nir_lower_atomics.c
Sometimes it's useful for a pass to be able to clean up its own derefs
instead of waiting for DCE. This little helper makes it very easy.
---
src/compiler/nir/nir.h | 2 ++
src/compiler/nir/nir_deref.c | 13 +
2 files changed, 15 insertions(+)
diff --git a/src/compiler/nir/nir
---
src/compiler/nir/nir_lower_indirect_derefs.c | 156 +++
1 file changed, 156 insertions(+)
diff --git a/src/compiler/nir/nir_lower_indirect_derefs.c
b/src/compiler/nir/nir_lower_indirect_derefs.c
index 02f202d..ebeb79b 100644
--- a/src/compiler/nir/nir_lower_indirect_d
---
src/compiler/nir/nir_lower_io.c | 70 +
1 file changed, 50 insertions(+), 20 deletions(-)
diff --git a/src/compiler/nir/nir_lower_io.c b/src/compiler/nir/nir_lower_io.c
index df91feb..549583d 100644
--- a/src/compiler/nir/nir_lower_io.c
+++ b/src/compil
---
src/compiler/nir/nir_lower_vars_to_ssa.c | 75
1 file changed, 58 insertions(+), 17 deletions(-)
diff --git a/src/compiler/nir/nir_lower_vars_to_ssa.c
b/src/compiler/nir/nir_lower_vars_to_ssa.c
index 0cc6514..403ce26 100644
--- a/src/compiler/nir/nir_lower_va
---
src/compiler/nir/nir_linking_helpers.c | 50 ++
1 file changed, 27 insertions(+), 23 deletions(-)
diff --git a/src/compiler/nir/nir_linking_helpers.c
b/src/compiler/nir/nir_linking_helpers.c
index 2b0a266..1a0cb91 100644
--- a/src/compiler/nir/nir_linking_help
---
src/intel/compiler/brw_nir.c| 2 ++
src/mesa/drivers/dri/i965/brw_program.c | 3 +--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index cf994ac..4fc6cae 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src
---
src/compiler/nir/nir_propagate_invariant.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/src/compiler/nir/nir_propagate_invariant.c
b/src/compiler/nir/nir_propagate_invariant.c
index 7b5bd6c..b48b91c 100644
--- a/src/compiler/nir/nir_propagate_in
---
src/compiler/nir/nir_gather_info.c | 26 --
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/src/compiler/nir/nir_gather_info.c
b/src/compiler/nir/nir_gather_info.c
index 743f968..50d67b6 100644
--- a/src/compiler/nir/nir_gather_info.c
+++ b/src/compiler/
---
src/compiler/nir/nir_lower_io_to_temporaries.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/compiler/nir/nir_lower_io_to_temporaries.c
b/src/compiler/nir/nir_lower_io_to_temporaries.c
index 301ba65..7ba66ba 100644
--- a/src/compiler/nir/nir_lower_io_to_temporaries.c
+++ b/src/com
---
src/compiler/nir/nir_lower_system_values.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/src/compiler/nir/nir_lower_system_values.c
b/src/compiler/nir/nir_lower_system_values.c
index fb560ee..104df51 100644
--- a/src/compiler/nir/nir_lower_system_values.c
---
src/compiler/nir/nir_split_var_copies.c | 42 +
1 file changed, 42 insertions(+)
diff --git a/src/compiler/nir/nir_split_var_copies.c
b/src/compiler/nir/nir_split_var_copies.c
index bc3ceed..bcd1f10 100644
--- a/src/compiler/nir/nir_split_var_copies.c
+++ b/sr
This inserts a call to nir_lower_deref_instrs at every call site of
glsl_to_nir, spirv_to_nir, and prog_to_nir.
---
src/amd/vulkan/radv_shader.c| 2 ++
src/gallium/drivers/freedreno/ir3/ir3_cmdline.c | 3 +++
src/intel/vulkan/anv_pipeline.c | 2 ++
src/mesa/driv
---
src/compiler/nir/nir_lower_global_vars_to_local.c | 62 +++
1 file changed, 42 insertions(+), 20 deletions(-)
diff --git a/src/compiler/nir/nir_lower_global_vars_to_local.c
b/src/compiler/nir/nir_lower_global_vars_to_local.c
index c8fdfde..14aa366 100644
--- a/src/compile
---
src/compiler/nir/nir.h | 3 ++
src/compiler/nir/nir_builder.h | 48 ++
src/compiler/nir/nir_lower_var_copies.c | 90 +++--
3 files changed, 138 insertions(+), 3 deletions(-)
diff --git a/src/compiler/nir/nir.h b/src/compil
This replaces some "if (...} { }" with "if (...) continue;" to reduce
nesting depth and makes nir_metadata_preserve conditional on progress
for the given impl.
---
src/compiler/nir/nir_lower_atomics.c | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/src/c
---
src/compiler/nir/nir_builder.h | 6 ++
src/mesa/program/prog_to_nir.c | 29 ++---
2 files changed, 12 insertions(+), 23 deletions(-)
diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index f1e52b2..6667d52 100644
--- a/src/compiler/nir/n
This commit introduces a new nir_deref.h header for helpers that are
less common and really only needed by a few heavy-duty passes. In this
header is a new struct for representing a full deref path which can be
walked in either direction.
---
src/compiler/Makefile.sources | 1 +
src/compiler/nir
---
src/mesa/program/prog_to_nir.c | 36 ++--
1 file changed, 6 insertions(+), 30 deletions(-)
diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c
index 26dfc37..14391a3 100644
--- a/src/mesa/program/prog_to_nir.c
+++ b/src/mesa/program/pro
---
src/compiler/glsl/glsl_to_nir.cpp | 239 +++---
1 file changed, 94 insertions(+), 145 deletions(-)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp
b/src/compiler/glsl/glsl_to_nir.cpp
index 9da4526..be7a510 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/sr
This fixes the fs-interpolateAtCentroid-block-array piglit test on i965.
Cc: mesa-sta...@lists.freedesktop.org
---
src/compiler/nir/nir_lower_indirect_derefs.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir_lower_indirect_derefs.c
b/src/co
We were validating this for locals but nothing else.
---
src/compiler/nir/nir_validate.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/compiler/nir/nir_validate.c b/src/compiler/nir/nir_validate.c
index a49948f..e9d6bd5 100644
--- a/src/compiler/nir/nir_v
---
src/compiler/nir/nir.h| 2 +-
src/compiler/nir/nir_builder.h| 37 +
src/compiler/nir/nir_intrinsics.h | 84 +++
3 files changed, 122 insertions(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
i
Generated with
git grep -l nir_intrinsic_image | xargs \
sed -i 's/nir_intrinsic_image/nir_intrinsic_image_var/g'
and some manual fixing in nir_intrinsics.h
---
src/amd/common/ac_nir_to_llvm.c| 42 -
src/amd/vulkan/radv_meta_bufimage.c| 8 ++--
---
src/compiler/nir/nir_builder.h | 87 ++
1 file changed, 87 insertions(+)
diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index 36e0ae3..27aa65b 100644
--- a/src/compiler/nir/nir_builder.h
+++ b/src/compiler/nir/nir_builder.h
This commit adds a new instruction type to NIR for handling derefs.
Nothing uses it yet but this adds the data structure as well as all of
the code to validate, print, clone, and [de]serialize them.
---
src/compiler/nir/nir.c| 50 +++
src/compiler/nir/nir.h
This is something that Connor and I have been talking about for some time
now. The basic idea is to replace the current singly linked nir_deref list
with deref instructions. This is similar to what LLVM does and it offers
quite a bit more freedom when we start getting more realistic pointers from
This commit adds a pass for lowering deref instructions to deref chains
as well as some smaller helpers to ease the transition.
---
src/compiler/Makefile.sources | 1 +
src/compiler/nir/meson.build | 1 +
src/compiler/nir/nir.h | 50 ++-
src/compiler/nir/nir_builder.h | 23 +++
We already have these for bit_size
---
src/compiler/nir/nir.h | 12
1 file changed, 12 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 7ad19b4..8f4a28c 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -626,11 +626,23 @@ nir_src_bit_
---
src/compiler/nir/nir.h | 2 ++
src/compiler/nir/nir_print.c | 6 ++
2 files changed, 8 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 14b532d..b575545 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -1233,6 +1233,8 @@ typedef enu
Cc: mesa-sta...@lists.freedesktop.org
---
src/compiler/nir/nir_lower_vars_to_ssa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir_lower_vars_to_ssa.c
b/src/compiler/nir/nir_lower_vars_to_ssa.c
index e8cfe30..0cc6514 100644
--- a/src/compiler/nir/nir_lower
Non-intrinsic function handling has never actually been tested and
probably doesn't work. Just get rid of it for now. We can always add
it back in later if it's useful.
---
src/compiler/glsl/glsl_to_nir.cpp | 25 ++---
1 file changed, 2 insertions(+), 23 deletions(-)
diff --
Because nir_instr_remove is an inline wrapper around nir_instr_remove_v,
the compiler should be able to tell that the return value is unused and
not emit the extra code in most cases.
---
src/compiler/nir/nir.c| 2 +-
src/compiler/nir/nir.h| 16
Hi Brian,
On Tuesday, 20 March 2018 16:16:13 CET Brian Paul wrote:
> The code changes look good, AFAICT. But some of the comments could be
> improved, IMHO. See other replies...
>
> Otherwise, for the series,
> Reviewed-by: Brian Paul
Thanks for the review!
Will incorporate the proposed chan
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index afb6120d9d..b01be622f7 100644
--- a/src/mesa/state_tracker/st_glsl_
We need to wait until after the writemask is widened before we
adjust it for component packing.
Together with the previous patch this fixes a number of
arb_enhanced_layouts component layout piglit tests.
---
src/amd/common/ac_nir_to_llvm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
This fixes tcs/tes varying arrays where we dont lower indirects and
therefore don't split arrays. Here we also fix useagemask for dual
slot doubles.
Fixes a number of arb_tessellation_shader piglit tests.
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 236 ++-
1 file c
On Tue, Mar 20, 2018 at 2:45 PM, Emil Velikov wrote:
> On 20 March 2018 at 18:02, Christian Gmeiner
> wrote:
>> Fixes rendering issues with mode rgba on etnaviv. I have applied
>> the same change for nv12 variants but they are not supported on
>> etnaviv.
>>
>> Signed-off-by: Christian Gmeiner
>
ping.
This is the last of the series that still needs review.
--Aaron
On Thu, Mar 1, 2018 at 1:39 PM, Aaron Watry wrote:
> Use get_language_version to calculate default cl standard based on
> device capabilities and -cl-std specified in build options.
>
> v4: Squash the __OPENCL_VERSION__ and C
On Tue, Jan 09, 2018 at 11:17:02PM -0800, Scott D Phillips wrote:
> Instead of gtt mapping, call out to other map functions (map_map
> or map_tiled_memcpy) for the depth surface. Removes a place where
> gtt mapping is used.
> ---
> This is a bit icky, perhaps something like mapping z_mt with
> BRW_
Hi Iago,
> Fixes:
> dEQP-VK.multiview.readback_implicit_clear.*
Applied locally and verified this. Thanks for fixing those.
I have a couple of comments after reading the patch, feel free to take
them only if make sense to you :-)
> + /* When multiview is active, attachments with a renderpass
$(intermediates) is somehow different from $(dir $@).
We were also passing the xml files twice :/
Fixes: 2d2b15fbcab ("i965: fix autotools/android build")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105634
Signed-off-by: Lionel Landwerlin
Tested-by: Mark Janes
---
src/mesa/drivers/d
Thanks Mark,
There is one thing I cannot explain why Emil's patch :
How comes it is :
--code=out/target/product/androidia_64/gen/SHARED_LIBRARIES/i965_dri_intermediates/brw_oa_metrics.c
Yet :
--header=out/target/common/obj/PACKAGING/boot-jars-package-check_intermediates/brw_oa_metrics.h
T
I tested this, and still got an error:
FAILED:
out/target/product/androidia_64/gen/SHARED_LIBRARIES/i965_dri_intermediates/brw_oa_metrics.c
/bin/bash -c "python
vendor/intel/external/android_ia/mesa/src/mesa/drivers/dri/i965/brw_oa.py
--code=out/target/product/androidia_64/gen/SHARED_LIBRARIE
To fix a regression in:
dEQP-VK.spirv_assembly.instruction.graphics.variable_init.output.struct
v2: handle indirect array accesses (Dave)
Fixes: f3275ca01c ("ac/nir: only enable used channels when exporting
parameters")
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_shader_info.c | 65
This is the equivalent of commit 5770e1d89e0eb49eb3c9547e8657d636b6e7e5d7 for
android.
Signed-off-by: Lionel Landwerlin
Fixes: 2d2b15fbcab ("i965: fix autotools/android build")
---
src/mesa/drivers/dri/i965/Android.mk | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/me
On Wed, Mar 14, 2018 at 05:18:58PM +, Chris Wilson wrote:
> Quoting Nanley Chery (2018-03-14 17:14:15)
> > On Mon, Mar 12, 2018 at 10:52:55AM -0700, Scott D Phillips wrote:
> > > Rename the (un)map_gtt functions to (un)map_map (map by
> > > returning a map) and add new functions (un)map_tiled_m
Quoting Scott D Phillips (2018-03-20 20:39:25)
> When building intel_tiled_memcpy for i686, the stack will only be
> 4-byte aligned. This isn't sufficient for SSE temporaries which
> require 16-byte alignment. Use the force_align_arg_pointer
> function attribute in that case to ensure sufficient a
When building intel_tiled_memcpy for i686, the stack will only be
4-byte aligned. This isn't sufficient for SSE temporaries which
require 16-byte alignment. Use the force_align_arg_pointer
function attribute in that case to ensure sufficient alignment.
---
src/mesa/drivers/dri/i965/intel_tiled_me
On 20/03/18 19:34, Emil Velikov wrote:
v2: Pass the actual filename instead of $(word ...) magic
v3: Drop duplicate $(i965_oa_xml_FILES)
Fixes: 2d2b15fbcab ("i965: fix autotools/android build
Cc: Lionel Landwerlin
Cc: Clayton Craft
Signed-off-by: Emil Velikov
---
src/mesa/drivers/dri/i965/A
Hi,
Looks good and helps here a lot!
Thanks!
Reviewed-by: Mathias Fröhlich
Mathias
On Tuesday, 20 March 2018 19:59:00 CET Lionel Landwerlin wrote:
> Fixes: 2d2b15fbcab ("i965: fix autotools/android build")
> Signed-off-by: Lionel Landwerlin
> ---
> src/mesa/drivers/dri/i965/Makefile.am | 5 +
On 20 March 2018 at 18:59, Lionel Landwerlin
wrote:
> Fixes: 2d2b15fbcab ("i965: fix autotools/android build")
> Signed-off-by: Lionel Landwerlin
> ---
> src/mesa/drivers/dri/i965/Makefile.am | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/M
v2: Pass the actual filename instead of $(word ...) magic
v3: Drop duplicate $(i965_oa_xml_FILES)
Fixes: 2d2b15fbcab ("i965: fix autotools/android build
Cc: Lionel Landwerlin
Cc: Clayton Craft
Signed-off-by: Emil Velikov
---
src/mesa/drivers/dri/i965/Android.mk | 2 +-
1 file changed, 1 insert
On 19 March 2018 at 15:28, Juan A. Suarez Romero wrote:
> Mesa 18.0 series has not been released yet, so let's extend 17.3 lifetime.
>
Any moment now ;-)
> v2: add 17.3.9 in the calendar (Andres Gomez)
>
> CC: Andres Gomez
> CC: Emil Velikov
> ---
Reviewed-by: Emil Velikov
-Emil
_
Fixes: 2d2b15fbcab ("i965: fix autotools/android build")
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/Makefile.am | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/Makefile.am
b/src/mesa/drivers/dri/i965/Makefile.am
index fe106b42
On 15 March 2018 at 17:01, Marek Olšák wrote:
> Hi,
>
> I'd like to have these in 18.0. People can fetch them here:
>git://people.freedesktop.org/~mareko/mesa for-18.0
>
> They are already in our AMD internal 18.0 branch, so they get quite a lot of
> testing.
>
> pick 0554172 radeonsi: align c
On 20 March 2018 at 18:02, Christian Gmeiner
wrote:
> Fixes rendering issues with mode rgba on etnaviv. I have applied
> the same change for nv12 variants but they are not supported on
> etnaviv.
>
> Signed-off-by: Christian Gmeiner
> ---
> cube-tex.c | 32
> 1 f
On Tuesday, 2018-03-20 19:02:00 +0100, Christian Gmeiner wrote:
> Fixes rendering issues with mode rgba on etnaviv. I have applied
> the same change for nv12 variants but they are not supported on
> etnaviv.
>
> Signed-off-by: Christian Gmeiner
LGTM!
Reviewed-by: Eric Engestrom
> ---
> cube-t
https://bugs.freedesktop.org/show_bug.cgi?id=105621
Emil Velikov changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
Thomas Helland writes:
> Make a simple worklist by basically just wrapping u_vector.
> This is intended used in nir_opt_dce to reduce the number of calls
> to ralloc, as we are currenlty spamming ralloc quite bad. It should
> also give better cache locality and much lower memory usage.
> ---
> s
v2: Pass the actual filename instead of $(word ...) magic
Fixes: 2d2b15fbcab ("i965: fix autotools/android build
Cc: Lionel Landwerlin
Cc: Clayton Craft
Signed-off-by: Emil Velikov
---
src/mesa/drivers/dri/i965/Android.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/
Fixes: 2d2b15fbcab ("i965: fix autotools/android build
Cc: Lionel Landwerlin
Cc: Clayton Craft
Signed-off-by: Emil Velikov
---
src/mesa/drivers/dri/i965/Android.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/Android.mk
b/src/mesa/drivers/dri/i9
https://bugs.freedesktop.org/show_bug.cgi?id=105621
Mark Janes changed:
What|Removed |Added
CC||mark.a.ja...@intel.com
--- Comment #3 from
Quoting Lionel Landwerlin (2018-03-20 16:39:18)
> On 20/03/18 16:30, Chris Wilson wrote:
> > Quoting Rafael Antognolli (2018-03-20 16:13:08)
> >> ring_name is " + " (e.g. rcs0). So we need to
> >> first compare the class name only, then get the instance id.
> >>
> >> Without this, INSTDONE is not b
On 20/03/18 00:08, Kenneth Graunke wrote:
On Wednesday, March 14, 2018 10:19:11 AM PDT Lionel Landwerlin wrote:
There are a couple of ways we can get the fusing information from the
kernel :
- Through DRM_I915_GETPARAM with the SLICE_MASK/SUBSLICE_MASK
parameters
- Through the new D
Fixes rendering issues with mode rgba on etnaviv. I have applied
the same change for nv12 variants but they are not supported on
etnaviv.
Signed-off-by: Christian Gmeiner
---
cube-tex.c | 32
1 file changed, 24 insertions(+), 8 deletions(-)
diff --git a/cube-tex
Am Dienstag, den 20.03.2018, 15:33 +0100 schrieb Nicolai Hähnle:
> Nice, did you actually get it to work entirely on a big endian
> machine?
>
> Bit fields aren't super portable, [...]
Indeed, the order of the bits in a bit field is compiler implementation
dependent. To make sure that changing the
On 20 March 2018 at 17:06, Lionel Landwerlin
wrote:
> On 20/03/18 16:29, Emil Velikov wrote:
>>
>> From: Emil Velikov
>>
>> As of earlier commit, the --header was made a hard requirement when
>> using --code.
>>
>> Hence - annotate both as required and drop a few no longer needed
>> checks.
>>
>>
On 20/03/18 16:29, Emil Velikov wrote:
From: Emil Velikov
As of earlier commit, the --header was made a hard requirement when
using --code.
Hence - annotate both as required and drop a few no longer needed
checks.
Fixes: 035cc7a12dc0 ("i965: perf: reduce i965 binary size")
Cc: Lionel Landwerl
Quoting Emil Velikov (2018-03-20 09:29:00)
[snip]
> gens = []
> for xml_file in args.xml_files:
> @@ -617,7 +610,7 @@ def main():
>
> """))
>
> -c("#include \"" + os.path.basename(args.header) + "\"")
> +c("#include \"" + os.path.basename(header_file) + "\"")
You're
On 20/03/18 16:23, Emil Velikov wrote:
On 20 March 2018 at 14:59, Lionel Landwerlin
wrote:
Autotools/android builds generate the header & code files in 2 steps,
but the code generation requires the name of the header file to
include it.
This change generates both files in one command.
Fixes:
On 20 March 2018 at 16:24, Dylan Baker wrote:
> Quoting Daniel Stone (2018-03-20 09:17:21)
>> The have-new-DRI3 codepaths would never actually properly trigger, since
>> there was a typo in configure.ac which broke the version check. This
>> went unnoticed but for an error in config.log if you loo
On 20/03/18 16:30, Chris Wilson wrote:
Quoting Rafael Antognolli (2018-03-20 16:13:08)
ring_name is " + " (e.g. rcs0). So we need to
first compare the class name only, then get the instance id.
Without this, INSTDONE is not being decoded.
Signed-off-by: Rafael Antognolli
Cc: Chris Wilson
---
From: Emil Velikov
As of earlier commit, the --header was made a hard requirement when
using --code.
Hence - annotate both as required and drop a few no longer needed
checks.
Fixes: 035cc7a12dc0 ("i965: perf: reduce i965 binary size")
Cc: Lionel Landwerlin
Signed-off-by: Emil Velikov
---
Tad
Quoting Rafael Antognolli (2018-03-20 16:13:08)
> ring_name is " + " (e.g. rcs0). So we need to
> first compare the class name only, then get the instance id.
>
> Without this, INSTDONE is not being decoded.
>
> Signed-off-by: Rafael Antognolli
> Cc: Chris Wilson
> ---
> src/intel/tools/aubina
On Wed, Mar 21, 2018 at 12:58 AM, Emil Velikov wrote:
> On 20 March 2018 at 14:24, Tomasz Figa wrote:
>> On Tue, Mar 20, 2018 at 10:44 PM, Emil Velikov
>> wrote:
>>> On 20 March 2018 at 04:40, Tomasz Figa wrote:
On Tue, Mar 20, 2018 at 2:55 AM, Emil Velikov
wrote:
> Hi Lepton,
Quoting Daniel Stone (2018-03-20 09:17:21)
> The have-new-DRI3 codepaths would never actually properly trigger, since
> there was a typo in configure.ac which broke the version check. This
> went unnoticed but for an error in config.log if you looked closely
> enough.
>
> Signed-off-by: Daniel Sto
On 20 March 2018 at 14:59, Lionel Landwerlin
wrote:
> Autotools/android builds generate the header & code files in 2 steps,
> but the code generation requires the name of the header file to
> include it.
>
> This change generates both files in one command.
>
> Fixes: 035cc7a12dc ("i965: perf: redu
On 20 March 2018 at 16:16, Dylan Baker wrote:
> Quoting Daniel Stone (2018-03-20 01:54:25)
>> VMware has no (published) support for Arm-architecture guests.
Pushed now with review and the new suggested title - thanks both for review!
Cheers,
Daniel
___
The have-new-DRI3 codepaths would never actually properly trigger, since
there was a typo in configure.ac which broke the version check. This
went unnoticed but for an error in config.log if you looked closely
enough.
Signed-off-by: Daniel Stone
Reported-by: Lukas F. Hartmann
Fixes: 7aeef2d4efdc
On 20 March 2018 at 16:15, Brian Paul wrote:
> On 03/20/2018 05:41 AM, Emil Velikov wrote:
>>
>> From: Emil Velikov
>>
>> Stay consistent with the rest of the codebase, effectively fixing the
>> autotools build.
>>
>> Bugzilla:
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__bugs.freedesk
Quoting Daniel Stone (2018-03-20 01:54:25)
> VMware has no (published) support for Arm-architecture guests.
>
> Signed-off-by: Daniel Stone
> Cc: Dylan Baker
> ---
> meson.build | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/meson.build b/meson.build
> index 88e90fe81
On 03/20/2018 05:41 AM, Emil Velikov wrote:
From: Emil Velikov
Stay consistent with the rest of the codebase, effectively fixing the
autotools build.
Bugzilla:
https://urldefense.proofpoint.com/v2/url?u=https-3A__bugs.freedesktop.org_show-5Fbug.cgi-3Fid-3D105621&d=DwIGaQ&c=uilaK90D4TOVoH58JNX
ring_name is " + " (e.g. rcs0). So we need to
first compare the class name only, then get the instance id.
Without this, INSTDONE is not being decoded.
Signed-off-by: Rafael Antognolli
Cc: Chris Wilson
---
src/intel/tools/aubinator_error_decode.c | 2 +-
1 file changed, 1 insertion(+), 1 delet
On 20 March 2018 at 15:51, Brian Paul wrote:
> Use compiler/nir/nir.h as we do in other places in the state tracker.
> I'm not sure why this just started to fail. The #includes have been
> there for a while.
I've sent identical patch (+fixes/cc tags) a some hours ago [1]. Feel
free to push eithe
Using mesa OpenCL failed on a big endian PowerPC machine because
si_vgt_param_key is using bitfields and a 32 bit int for an
index into an array.
Fix si_vgt_param_key to work correctly on both little endian
and big endian machines.
Signed-off-by: Bas Vermeulen
---
src/gallium/drivers/radeonsi/s
I'm able to call clinfo without things crashing. Without this fix, clinfo
results in a signal 11 because key.index is byte swapped. With it,
I get the information I would expect. I'm working to test the OpenCL
currently.
I'll update the patch to use PIPE_ARCH_LITTLE_ENDIAN instead of my own #if.
On 20 March 2018 at 14:24, Tomasz Figa wrote:
> On Tue, Mar 20, 2018 at 10:44 PM, Emil Velikov
> wrote:
>> On 20 March 2018 at 04:40, Tomasz Figa wrote:
>>> On Tue, Mar 20, 2018 at 2:55 AM, Emil Velikov
>>> wrote:
Hi Lepton,
On 19 March 2018 at 17:33, Lepton Wu wrote:
> If
Use compiler/nir/nir.h as we do in other places in the state tracker.
I'm not sure why this just started to fail. The #includes have been
there for a while.
---
src/mesa/state_tracker/st_nir_lower_uniforms_to_ubo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/s
Reviewed-by: Tapani Pälli
On 20.03.2018 16:59, Lionel Landwerlin wrote:
Autotools/android builds generate the header & code files in 2 steps,
but the code generation requires the name of the header file to
include it.
This change generates both files in one command.
Fixes: 035cc7a12dc ("i965:
On 03/15/2018 11:48 PM, mathias.froehl...@gmx.net wrote:
From: Mathias Fröhlich
We do care if the vao set as Array._DrawVAO is ready to draw
not so much that the current Array.VAO in terms of the OpenGL
api is fully up to date for drawing.
Can you rephrase that?
Also no driver looks at any
On 03/15/2018 11:48 PM, mathias.froehl...@gmx.net wrote:
From: Mathias Fröhlich
The DriverFlags.NewArray bit is set into NewDriverState already on
"The DriverFlags.NewArray bit is already set to NewDriverState in"
_mesa_set_draw_vao since we have actually just above changed the VAOs
conten
1 - 100 of 142 matches
Mail list logo