---
src/intel/compiler/brw_nir.c | 2 ++
src/mesa/drivers/dri/i965/brw_program.c | 3 +--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index cf994ac..4fc6cae 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -740,6 +740,8 @@ brw_postprocess_nir(nir_shader *nir, const struct
brw_compiler *compiler,
OPT(nir_opt_dce);
OPT(nir_opt_move_comparisons);
+ OPT(nir_lower_deref_instrs, ~0);
+
OPT(nir_lower_locals_to_regs);
if (unlikely(debug_enabled)) {
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index a871432..1ad4f74 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -77,7 +77,7 @@ brw_create_nir(struct brw_context *brw,
/* First, lower the GLSL IR or Mesa IR to NIR */
if (shader_prog) {
nir = glsl_to_nir(shader_prog, stage, options);
- nir_lower_deref_instrs(nir, ~0);
+ nir_lower_deref_instrs(nir, nir_lower_texture_derefs);
nir_remove_dead_variables(nir, nir_var_shader_in | nir_var_shader_out);
nir_lower_returns(nir);
nir_validate_shader(nir);
@@ -85,7 +85,6 @@ brw_create_nir(struct brw_context *brw,
nir_shader_get_entrypoint(nir), true, false);
} else {
nir = prog_to_nir(prog, options);
- nir_lower_deref_instrs(nir, ~0);
NIR_PASS_V(nir, nir_lower_regs_to_ssa); /* turn registers into SSA */
}
nir_validate_shader(nir);
--
2.5.0.400.gff86faf
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