[Mesa-dev] [PATCH 29/29] intel/isl: Allow CCS_E on more formats

On CNL and above, CCS_E supports 1010102 formats and R11G11B10F. We had shut them off during early enabling because blorp_copy couldn't handle them. Now it can so we can turn them back on. --- src/intel/isl/isl_format.c | 24 1 file changed, 24 deletions(-) diff --git a

[Mesa-dev] [PATCH 21/29] intel/isl/format: Get rid of the ALPHA colorspace

Alpha-only formats are just linear. There's no need to specially deliminate them as being in their own colorspace. --- src/intel/isl/gen_format_layout.py | 2 +- src/intel/isl/isl_format_layout.csv | 14 +++--- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/intel/isl

[Mesa-dev] [PATCH 20/29] intel/isl/format: Add field locations informations to channel_layout

--- src/intel/isl/gen_format_layout.py | 16 +--- src/intel/isl/isl.h| 1 + 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/src/intel/isl/gen_format_layout.py b/src/intel/isl/gen_format_layout.py index 535f38c..633498b 100644 --- a/src/intel/isl/gen_fo

[Mesa-dev] [PATCH 25/29] intel/blorp: Use nir_format_bitcast_uint_vec_unmasked

--- src/intel/blorp/blorp_blit.c | 57 +--- 1 file changed, 16 insertions(+), 41 deletions(-) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index 068436b..ea0687f 100644 --- a/src/intel/blorp/blorp_blit.c +++ b/src/intel/blorp/blo

[Mesa-dev] [PATCH 24/29] nir/format_convert: Add code for bitcasting vectors

This is a fairly direct port from blorp. The only real change is that the nir_format_convert version doesn't assume that everything is a vec4. --- src/compiler/nir/nir_format_convert.h | 53 +++ 1 file changed, 53 insertions(+) diff --git a/src/compiler/nir/nir_fo

[Mesa-dev] [PATCH 28/29] intel/blorp: Add blorp_copy support for ISL_FORMAT_R11G11B10_FLOAT

--- src/intel/blorp/blorp_blit.c | 64 +--- 1 file changed, 42 insertions(+), 22 deletions(-) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index e825862..9258470 100644 --- a/src/intel/blorp/blorp_blit.c +++ b/src/intel/blorp/blo

[Mesa-dev] [PATCH 23/29] intel/blorp: Use ISL instead of bitcast_color_value_to_uint

--- src/intel/blorp/blorp_blit.c | 83 ++-- 1 file changed, 10 insertions(+), 73 deletions(-) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index a0e110f..068436b 100644 --- a/src/intel/blorp/blorp_blit.c +++ b/src/intel/blorp/blo

[Mesa-dev] [PATCH 22/29] intel/isl: Add format conversion code

This adds helpers to ISL to convert an isl_color_value to and from binary data encoded with a given isl_format. The conversion is done using ISL's built-in format introspection so it's fairly slow as format conversions go but it should be fine for a single pixel value. In particular, we can use t

[Mesa-dev] [PATCH 27/29] intel/blorp: Allow CCS copies of 1010102 formats

--- src/intel/blorp/blorp_blit.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index 321b3e3..e825862 100644 --- a/src/intel/blorp/blorp_blit.c +++ b/src/intel/blorp/blorp_blit.c @@ -2416,6 +2416,12 @@ get_ccs_compatible_uint_

[Mesa-dev] [PATCH 26/29] intel/blorp: Add support for more format bitcasting

By making use of the NIR helper for uint vector casts, we should now be able to bitcast between any two uint formats so long as their channels are in RGBA order (possibly with channels missing). In order to do this we need to rework the key a bit to pass the actual formats instead of just the numb

[Mesa-dev] [PATCH 18/29] util/srgb: Add a float sRGB -> linear helper

--- src/util/format_srgb.h | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/util/format_srgb.h b/src/util/format_srgb.h index 34b50af..596af56 100644 --- a/src/util/format_srgb.h +++ b/src/util/format_srgb.h @@ -55,6 +55,20 @@ util_format_linear_to_srgb_helper_table[104];

[Mesa-dev] [PATCH 19/29] intel/isl/format: Add a column for channel order to the table

--- src/intel/isl/gen_format_layout.py | 5 +- src/intel/isl/isl_format_layout.csv | 558 ++-- 2 files changed, 282 insertions(+), 281 deletions(-) diff --git a/src/intel/isl/gen_format_layout.py b/src/intel/isl/gen_format_layout.py index 0ca42db..535f38c 10064

[Mesa-dev] [PATCH 16/29] anv: Allow blitting to/from any supported format

Now that blorp handles all the cases, why not? The only real change we have to make is to stop using anv_swizzle_for_render() in blorp_blit because it doesn't work for B4G4R4A4 and blorp now natively handles that. --- src/intel/vulkan/anv_blorp.c | 3 +-- src/intel/vulkan/anv_formats.c | 10 ++

[Mesa-dev] [PATCH 15/29] intel/blorp: Support the RGB workaround on more formats

Previously we only supported UINT formats because that's what blorp_copy required. If we want to use it in blorp_blit, however, we need to support everything. --- src/intel/blorp/blorp_blit.c | 73 1 file changed, 53 insertions(+), 20 deletions(-) dif

[Mesa-dev] [PATCH 10/29] nir/format_convert: Add a function to pack RGB9_E5 formats

--- src/compiler/nir/nir_format_convert.h | 64 +++ 1 file changed, 64 insertions(+) diff --git a/src/compiler/nir/nir_format_convert.h b/src/compiler/nir/nir_format_convert.h index 0ffd0db..479191e 100644 --- a/src/compiler/nir/nir_format_convert.h +++ b/src/comp

[Mesa-dev] [PATCH 09/29] nir/format_convert: Add pack/unpack for R11F_G11F_B10F

--- src/compiler/nir/nir_format_convert.h | 38 +++ 1 file changed, 38 insertions(+) diff --git a/src/compiler/nir/nir_format_convert.h b/src/compiler/nir/nir_format_convert.h index 07618dc..0ffd0db 100644 --- a/src/compiler/nir/nir_format_convert.h +++ b/src/comp

[Mesa-dev] [PATCH 17/29] i965/blorp: Remove a pile of blorp_blit restrictions

Previously, blorp could only blit into something that was renderable. Thanks to recent additions to blorp, it can now blit into basically anything so long as it isn't compressed. --- src/mesa/drivers/dri/i965/brw_blorp.c | 67 +-- 1 file changed, 33 insertions(+), 3

[Mesa-dev] [PATCH 14/29] intel/blorp: Silently convert RGBX destination formats to RGBA

--- src/intel/blorp/blorp_blit.c | 4 1 file changed, 4 insertions(+) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index 8b64cd7..cd2d3b4 100644 --- a/src/intel/blorp/blorp_blit.c +++ b/src/intel/blorp/blorp_blit.c @@ -1896,6 +1896,10 @@ try_blorp_blit(struct blor

[Mesa-dev] [PATCH 08/29] nir/format_convert: Add linear <-> sRGB helpers

--- src/compiler/nir/nir_format_convert.h | 26 ++ 1 file changed, 26 insertions(+) diff --git a/src/compiler/nir/nir_format_convert.h b/src/compiler/nir/nir_format_convert.h index e09c955..07618dc 100644 --- a/src/compiler/nir/nir_format_convert.h +++ b/src/compiler/nir/

[Mesa-dev] [PATCH 12/29] intel/blorp: Handle more exotic destination formats

This commit adds support for the following formats as destination formats even though the hardware does not support rendering to them: - ISL_FORMAT_R24_UNORM_X8_TYPELESS - ISL_FORMAT_A4B4G4R4_UNORM - ISL_FORMAT_L8_UNORM_SRGB - ISL_FORMAT_R9G9B9E5_SHAREDEXP This is done by using a different fo

[Mesa-dev] [PATCH 07/29] nir: Add the start of a format conversion helper header

--- src/compiler/Makefile.sources | 1 + src/compiler/nir/meson.build | 1 + src/compiler/nir/nir_format_convert.h | 106 ++ 3 files changed, 108 insertions(+) create mode 100644 src/compiler/nir/nir_format_convert.h diff --git a/src/compiler/

[Mesa-dev] [PATCH 13/29] intel/isl: Add some helpers for working with RGBX formats

--- src/intel/isl/isl.h| 11 +++ src/intel/isl/isl_format.c | 32 2 files changed, 43 insertions(+) diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 16412fc..277998f 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -1520,8

[Mesa-dev] [PATCH 11/29] intel/blorp: Include nir_format_convert.h in blorp_blit.c

nir_mask_shift_or is now defined in nir_format_convert.h so we can delete the copy in blorp_blit.c. --- src/intel/blorp/blorp_blit.c | 20 +--- 1 file changed, 1 insertion(+), 19 deletions(-) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index 5cfc1a9..d

[Mesa-dev] [PATCH 02/29] i965/surface_state: Use an identity swizzle pre-Haswell

--- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 611e850..39985f0 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +

[Mesa-dev] [PATCH 03/29] intel/isl: Add an isl_swizzle_supports_rendering helper

This helper encodes more details, specifically about Haswell, than the previous asserts in isl_surface_state.c. --- src/intel/isl/isl.c | 53 src/intel/isl/isl.h | 13 ++ src/intel/isl/isl_surface_state.c

[Mesa-dev] [PATCH 06/29] intel/blorp: Add swizzle support for all hardware

This commit makes blorp capable of swizzling anything even on hardware that doesn't support texture swizzle. --- src/intel/blorp/blorp_blit.c | 64 +++- src/intel/blorp/blorp_priv.h | 6 + 2 files changed, 69 insertions(+), 1 deletion(-) diff --git a/s

[Mesa-dev] [PATCH 05/29] intel/isl: Add a helper for inverting swizzles

--- src/intel/isl/isl.c | 30 ++ src/intel/isl/isl.h | 2 ++ 2 files changed, 32 insertions(+) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index a2d3ae6..420d387 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -2379,3 +2379,33 @@ isl_swizzle_c

[Mesa-dev] [PATCH 04/29] intel/isl: Add a helper for composing swizzles

--- src/intel/isl/isl.c | 35 +++ src/intel/isl/isl.h | 3 +++ 2 files changed, 38 insertions(+) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 4133b53..a2d3ae6 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -2344,3 +2344,38 @@ isl_swi

[Mesa-dev] [PATCH 00/29] blorp: Add support for more formats

This series adds additional format support to BLORP. In particular, BLORP's blit and copy functions now handle: * Source and destination swizzles on all gens * Blitting to RGB formats (previously we only supported copying to RGB) * Blitting to RGBX even if it's not supported for rendering * B

[Mesa-dev] [PATCH 01/29] blorp: Handle the RGB workaround more like other workarounds

The previous version was sort-of strapped on in that it just adjusted the blit rectangle and trusted in the fact that we would use texelFetch and round to the nearest integer to ensure that the component positions matched. This new version, while slightly more complicated, is more accurate because

[Mesa-dev] [PATCH 3/3] mesa: skip validation of legality of size/type queries for format queries

From: Roland Scheidegger The size/type query is always legal (if we made it that far). This causes a difference for GL_TEXTURE_BUFFER - the reason is that these parameters are valid only with GetTexLevelParameter() if gl 3.1 is supported, but not if only ARB_texture_buffer_object is supported. Ho

[Mesa-dev] [PATCH 2/3] mesa: restrict formats being supported by target type for formatquery

From: Roland Scheidegger The code just considered all formats as being supported if they were either a valid fbo or texture format. This was quite awkward since then the query would return "supported" for e.g. GL_RGB9E5 or compressed formats and target RENDERBUFFER (albeit the driver could still

[Mesa-dev] [PATCH 1/3] mesa: remove misleading gles checks for formatquery

From: Roland Scheidegger Testing for gles there is just confusing - this is about target being supported, if it was valid at all was already determined earlier (in _legal_parameters). It didn't make sense at all in any case, since it would only have said false there for gles for 2d but not 2d arr

Re: [Mesa-dev] [PATCH v3 0.5/5] i965/tiled_memcpy: linear_to_ytiled a cache line at a time

I like it. Reviewed-by: Jason Ekstrand It might be worth adding a comment somewhere (maybe right above the middle loop) that describes the access patterns we talked about yesterday. In particular, that we're covering a whole cache line at a time in the tiled image and should be getting maximum

[Mesa-dev] [PATCH] anv/cmd_buffer: Re-emit the pipeline at every subpass

If we ever hit this edge-case, it can theoretically cause problem for CNL because we could end up changing render targets without re-emitting 3DSTATE_MULTISAMPLE which is part of the pipeline. Just get rid of the edge case. Cc: mesa-sta...@lists.freedesktop.org --- src/intel/vulkan/genX_cmd_buff

[Mesa-dev] [PATCH v3 0.5/5] i965/tiled_memcpy: linear_to_ytiled a cache line at a time

TileY's low 6 address bits are: v1 v0 u3 u2 u1 u0 Thus a cache line in the tiled surface is composed of a 2d area of 16x4 bytes of the linear surface. Add a special case where the area being copied is 4-line aligned and a multiple of 4-lines so that entire cache lines will be written at a time. O

Re: [Mesa-dev] [PATCH] i965: fix disk_cache leak when destroying context

On 2018-01-26 00:48:42, Tapani Pälli wrote: >==2780== 1,024 bytes in 1 blocks are possibly lost in loss record 180 of > 205 >==2780==at 0x4C31A1E: calloc (vg_replace_malloc.c:711) >==2780==by 0x13F6467E: util_queue_init (u_queue.c:309) >==2780==by 0x13F5C9F6: disk_cache

[Mesa-dev] [Bug 104803] SIGSEGV in state_tracker/st_glsl_to_tgsi_temprename.cpp

https://bugs.freedesktop.org/show_bug.cgi?id=104803 --- Comment #6 from Gert Wollny --- Created attachment 136978 --> https://bugs.freedesktop.org/attachment.cgi?id=136978&action=edit Prelimiary fix Hi Brad, this patch fixes the segfault in the trace you posted, could you test the patch to s

Re: [Mesa-dev] [PATCH] winsys/radeon: Compute is_displayable in surf_drm_to_winsys

Reviewed-by: Marek Olšák Marek On Fri, Jan 26, 2018 at 6:33 PM, Michel Dänzer wrote: > From: Michel Dänzer > > It was always 0, breaking (at least) DRI3 with Xwayland. > > Bugzilla: https://bugs.freedesktop.org/104306 > Fixes: 5f2073be3282 ("ac/surface: add ac_surface::is_displayable") > Signe

[Mesa-dev] [Bug 104803] SIGSEGV in state_tracker/st_glsl_to_tgsi_temprename.cpp

https://bugs.freedesktop.org/show_bug.cgi?id=104803 --- Comment #5 from Gert Wollny --- @Brian I can also reproduce the crash, and was able to add a test case for it, but I AFAICS your fix is just a workaround, and the culprit is somewhere else. -- You are receiving this mail because: You are

Re: [Mesa-dev] [PATCH v3 2/3] i965: add noise padding to buffer object and function to check if noise is correct

Quoting Jason Ekstrand (2018-01-26 18:01:05) > I wasn't suggesting that you use pread *instead* of stalling. But once you've > stalled, nothing will be touching it. There is the possibility of another > context or process of it's shared but mapping won't protect you from that > either. I don't k

Re: [Mesa-dev] [PATCH v2 0.5/5] i965/tiled_memcpy: linear_to_ytiled a cache line at a time

On Thu, Jan 25, 2018 at 8:23 AM, Scott D Phillips < scott.d.phill...@intel.com> wrote: > TileY's low 6 address bits are: v1 v0 u3 u2 u1 u0 > Thus a cache line in the tiled surface is composed of a 2d area of > 16x4 bytes of the linear surface. > > Add a special case where the area being copied is

Re: [Mesa-dev] [PATCH 3/4] anv/cmd_buffer: Emit PIPE_CONTROL with ISP bit on older platforms.

Vulkan only supports gen7+. Go ahead and drop the checks. With that, Reviewed-by: Jason Ekstrand On Fri, Jan 26, 2018 at 11:32 AM, Rafael Antognolli < rafael.antogno...@intel.com> wrote: > Emit it on all platforms since gen7. > > Signed-off-by: Rafael Antognolli > --- > src/intel/vulkan/gen

Re: [Mesa-dev] [PATCH 4/4] i965: Emit PIPE_CONTROL with ISP bit on older platforms.

2 and 4 are Reviewed-by: Jason Ekstrand On Fri, Jan 26, 2018 at 11:32 AM, Rafael Antognolli < rafael.antogno...@intel.com> wrote: > Emit it on all platforms since gen7. > > Signed-off-by: Rafael Antognolli > --- > src/mesa/drivers/dri/i965/intel_batchbuffer.c | 2 +- > 1 file changed, 1 inser

Re: [Mesa-dev] [PATCH 1/4] anv/gen10: Emit CS stall and mark push constants dirty.

rb On Fri, Jan 26, 2018 at 11:32 AM, Rafael Antognolli < rafael.antogno...@intel.com> wrote: > I got reviews and fixed the patches locally, but ended up merging the > ones that I sent originally to the list. This patch fixes those > mistakes. > > Fixes: 78c125af3904c539ea69bec2dd9fdf7a5162854f >

[Mesa-dev] [PATCH 0/4] Fix messup and extend workaround to older platforms.

I sent a series to fix GPU hangs, got reviews, fixed them locally, and ended up merging the original version. The first two patches in this series try to fix that. The last two patches extend the workaround to all platforms since gen7. Our CI seems to be happy with that, and it will make things mo

[Mesa-dev] [PATCH 2/4] i965/gen10: Use CS Stall instead of WriteImmediate.

Fixes: ca19ee33d7d39cb89d948b1c983763065975ce5b Signed-off-by: Rafael Antognolli Cc: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_pipe_control.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dr

[Mesa-dev] [PATCH 4/4] i965: Emit PIPE_CONTROL with ISP bit on older platforms.

Emit it on all platforms since gen7. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index 86d88a7

[Mesa-dev] [PATCH 1/4] anv/gen10: Emit CS stall and mark push constants dirty.

I got reviews and fixed the patches locally, but ended up merging the ones that I sent originally to the list. This patch fixes those mistakes. Fixes: 78c125af3904c539ea69bec2dd9fdf7a5162854f Signed-off-by: Rafael Antognolli Cc: Jason Ekstrand --- src/intel/vulkan/anv_private.h | 1 - src/

[Mesa-dev] [PATCH 3/4] anv/cmd_buffer: Emit PIPE_CONTROL with ISP bit on older platforms.

Emit it on all platforms since gen7. Signed-off-by: Rafael Antognolli --- src/intel/vulkan/genX_cmd_buffer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 3691b4bdec9..0e8c9ee7c46 100644 ---

Re: [Mesa-dev] [PATCH] meson: libdrm shouldn't appear in Requires.private: if it wasn't found

Please add this to the commit message: Fixes: 3218056e0eb3 ("meson: Build i965 and dri stack") Reviewed-by: Dylan Baker Quoting Jon Turney (2018-01-26 04:42:50) > Otherwise, using pkg-config to retrieve flags will fail, e.g. > > $ pkg-config gl --cflags > Package libdrm was not found in the pkg

Re: [Mesa-dev] [PATCH libdrm 0/2] drm/tegra: Sanitize format modifiers

On 12 January 2018 at 17:02, Thierry Reding wrote: > From: Thierry Reding > > These UABI changes have now been merged into drm-next, so synchronize > the libdrm headers and fixup the format modifiers in modetest. > Hi Thierry, I haven't checked the diff in detail, but on quick look it seems fine

[Mesa-dev] [PATCH] ac/nir: only load used VGPRs thread dimensions

Just noticed that we can reduce the number of input VGPRs when dimensions y (and/or z) are unused. Similar to work groups. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 21 + 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/src/amd/common/

Re: [Mesa-dev] [PATCH v3 2/3] i965: add noise padding to buffer object and function to check if noise is correct

In either case, please either map in both or pread/write in both. On January 26, 2018 10:01:07 Jason Ekstrand wrote: I wasn't suggesting that you use pread *instead* of stalling. But once you've stalled, nothing will be touching it. There is the possibility of another context or process of

Re: [Mesa-dev] [PATCH v3 2/3] i965: add noise padding to buffer object and function to check if noise is correct

I wasn't suggesting that you use pread *instead* of stalling. But once you've stalled, nothing will be touching it. There is the possibility of another context or process of it's shared but mapping won't protect you from that either. I don't know what Chris was getting at. On January 26, 2

Re: [Mesa-dev] [PATCH 3/3] mesa: remove MESA_FUNCTION

For series, Reviewed-by: Neha Bhende Regards, Neha From: Brian Paul Sent: Friday, January 26, 2018 8:39:18 AM To: mesa-dev@lists.freedesktop.org Cc: Charmaine Lee; Neha Bhende Subject: [PATCH 3/3] mesa: remove MESA_FUNCTION Just use __func__ in the two macro

Re: [Mesa-dev] [PATCH] mesa: silence MinGW 'may be unused uninitialized' warning in get.c

Reviewed-by: Neha Bhende Regards, Neha From: Brian Paul Sent: Thursday, January 25, 2018 4:29:05 PM To: mesa-dev@lists.freedesktop.org Cc: Charmaine Lee; Neha Bhende Subject: [PATCH] mesa: silence MinGW 'may be unused uninitialized' warning in get.c The warni

Re: [Mesa-dev] [PATCH] autotools: Don't redefine EXTRA_DIST for freedreno

I just noticed this too, thanks for fixing it (both of you) For whichever one, Reviewed-by: Dylan Baker Quoting Emil Velikov (2018-01-25 03:14:45) > On 25 January 2018 at 08:25, Daniel Stone wrote: > > The EXTRA_DIST of meson.build accidentally stomps another Freedreno file > > which should be

[Mesa-dev] [PATCH] winsys/radeon: Compute is_displayable in surf_drm_to_winsys

From: Michel Dänzer It was always 0, breaking (at least) DRI3 with Xwayland. Bugzilla: https://bugs.freedesktop.org/104306 Fixes: 5f2073be3282 ("ac/surface: add ac_surface::is_displayable") Signed-off-by: Michel Dänzer --- src/gallium/winsys/radeon/drm/radeon_drm_surface.c | 3 +++ 1 file chan

[Mesa-dev] [PATCH v4] meson: Don't confuse the install and search paths for dri drivers

Currently there is not a separate option for setting the search path of DRI drivers in meson, like there is in scons and autotools. This is an oversight and needs to be fixed. This adds an extra option `dri-search-path`, which will default to the value of `dri-drivers-path`, like autotools does. v

[Mesa-dev] [PATCH v2] meson: generate translations for driconf

Currently meson implements the same logic as SCons for translations, namely it doesn't do them. This patch changes meson to use logic more like autotools, and generate translations. To do this we have to go behind meson's back a bit, and wrap the whole thing up in a single python script. Meson has

Re: [Mesa-dev] [PATCH 1/2] meson: set proper pkg-config version for libdrm_freedreno

Quoting Emil Velikov (2018-01-25 02:30:10) > Hi Dylan, > > To make it easier to spot these, do set the git subject prefix to PATCH > libdrm. > See autogen.sh for an example. > > On 12 January 2018 at 19:57, Dylan Baker wrote: > > Copy and paste error from exynos. > > > > Signed-off-by: Dylan Ba

[Mesa-dev] [PATCH libdrm] meson: fix libdrm_nouveau pkgconfig include directories

Signed-off-by: Dylan Baker --- I have tested building every mesa driver against this (with and without udev!) so I'm pretty sure that this is the last pkgbuild problem. I'm sure I'll be sad in a day or two... nouveau/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 1/3] mesa: change gl_compile_status enums to uppercase

To follow the convention of other enums. --- src/compiler/glsl/glsl_parser_extras.cpp | 14 +++--- src/compiler/glsl/shader_cache.cpp | 2 +- src/mesa/drivers/common/meta.c | 2 +- src/mesa/main/ff_fragment_shader.cpp | 2 +- src/mesa/main/glspirv.c

[Mesa-dev] [PATCH 3/3] mesa: remove MESA_FUNCTION

Just use __func__ in the two macros where it was used. --- src/mesa/main/context.h | 4 ++-- src/mesa/main/mtypes.h | 2 -- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/src/mesa/main/context.h b/src/mesa/main/context.h index 5d9e2ed..86be66f 100644 --- a/src/mesa/main/context.h

[Mesa-dev] [PATCH 2/3] mesa: change gl_link_status enums to uppercase

follow the convention of other enums. --- src/compiler/glsl/linker.cpp | 6 +++--- src/compiler/glsl/shader_cache.cpp | 2 +- src/compiler/glsl/standalone.cpp | 2 +- src/mesa/drivers/dri/i965/brw_cs.c | 4 ++-- src/mesa/drivers/dri/i965/brw_disk_cache.c

[Mesa-dev] [Bug 104803] SIGSEGV in state_tracker/st_glsl_to_tgsi_temprename.cpp

https://bugs.freedesktop.org/show_bug.cgi?id=104803 --- Comment #4 from Brian Paul --- This patch seems to fix the crash, but I'm not sure it's actually correct. Gert will have to take a look. diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp b/src/mesa/state_tracker/st_glsl_to

[Mesa-dev] [Bug 104803] SIGSEGV in state_tracker/st_glsl_to_tgsi_temprename.cpp

https://bugs.freedesktop.org/show_bug.cgi?id=104803 Brian Paul changed: What|Removed |Added CC||gw.foss...@gmail.com --- Comment #3 from B

[Mesa-dev] [Bug 104803] SIGSEGV in state_tracker/st_glsl_to_tgsi_temprename.cpp

https://bugs.freedesktop.org/show_bug.cgi?id=104803 --- Comment #2 from Brad King --- Created attachment 136976 --> https://bugs.freedesktop.org/attachment.cgi?id=136976&action=edit apitrace of test recorded before change that crashes Thanks Brian. For another try, here is an apitrace of the

[Mesa-dev] [Bug 104803] SIGSEGV in state_tracker/st_glsl_to_tgsi_temprename.cpp

https://bugs.freedesktop.org/show_bug.cgi?id=104803 --- Comment #1 from Brian Paul --- Hi Brad, I configured and built Mesa as you described, but I can't repro the crash with your trace. I tested both ToT and 807e2539e5 with softpipe and llvmpipe. I'm using gcc/g++ 5.4.0, FWIW. -- You are rec

Re: [Mesa-dev] [PATCH v2 14/24] intel/blorp: Add a CCS ambiguation pass

On Wed, Jan 24, 2018 at 12:29:05PM -0800, Jason Ekstrand wrote: > On Wed, Jan 24, 2018 at 6:15 AM, Pohjolainen, Topi < > topi.pohjolai...@gmail.com> wrote: > > > On Fri, Jan 19, 2018 at 03:47:31PM -0800, Jason Ekstrand wrote: > > > This pass performs an "ambiguate" operation on a CCS-compressed su

[Mesa-dev] [Bug 104803] SIGSEGV in state_tracker/st_glsl_to_tgsi_temprename.cpp

https://bugs.freedesktop.org/show_bug.cgi?id=104803 Bug ID: 104803 Summary: SIGSEGV in state_tracker/st_glsl_to_tgsi_temprename.cpp Product: Mesa Version: git Hardware: Other OS: All Status: NEW

Re: [Mesa-dev] [PATCH] mesa: add missing RGB9_E5 format in _mesa_base_fbo_format

On 26/01/18 14:19, Roland Scheidegger wrote: Am 26.01.2018 um 14:13 schrieb Antia Puentes: Hi Roland, On 26/01/18 13:57, Roland Scheidegger wrote: Am 26.01.2018 um 11:31 schrieb Antia Puentes: On 25/01/18 18:56, Roland Scheidegger wrote: Am 25.01.2018 um 17:56 schrieb Roland Scheidegger:

Re: [Mesa-dev] [PATCH] mesa: add missing RGB9_E5 format in _mesa_base_fbo_format

Am 26.01.2018 um 14:13 schrieb Antia Puentes: > Hi Roland, > > On 26/01/18 13:57, Roland Scheidegger wrote: >> Am 26.01.2018 um 11:31 schrieb Antia Puentes: >>> On 25/01/18 18:56, Roland Scheidegger wrote: >>> Am 25.01.2018 um 17:56 schrieb Roland Scheidegger: > Am 25.01.2018 um 16:30 sch

Re: [Mesa-dev] [PATCH] mesa: add missing RGB9_E5 format in _mesa_base_fbo_format

Hi Roland, On 26/01/18 13:57, Roland Scheidegger wrote: Am 26.01.2018 um 11:31 schrieb Antia Puentes: On 25/01/18 18:56, Roland Scheidegger wrote: Am 25.01.2018 um 17:56 schrieb Roland Scheidegger: Am 25.01.2018 um 16:30 schrieb Michel Dänzer: On 2018-01-24 05:38 PM, Juan A. Suarez Romero w

Re: [Mesa-dev] [PATCH] nir: mark unused space in packed_tex_data

On 26 January 2018 at 09:30, Tapani Pälli wrote: > This change cleans following scary warnings in valgrind output > when disk cache is being written: > >==6532== Uninitialised byte(s) found during client check request >==6532==at 0x14423FAD: blob_write_bytes (blob.c:152) >==6532==

Re: [Mesa-dev] [PATCH] i965: fix prog_data leak in brw_disk_cache

On 26 January 2018 at 08:27, Tapani Pälli wrote: >==25481== 576 bytes in 1 blocks are definitely lost in loss record 179 of > 208 >==25481==at 0x4C2FB6B: malloc (vg_replace_malloc.c:299) >==25481==by 0x1404E2CC: ralloc_size (ralloc.c:121) >==25481==by 0x14119F82: read_

Re: [Mesa-dev] [PATCH] i965: fix disk_cache leak when destroying context

On 26 January 2018 at 08:48, Tapani Pälli wrote: >==2780== 1,024 bytes in 1 blocks are possibly lost in loss record 180 of > 205 >==2780==at 0x4C31A1E: calloc (vg_replace_malloc.c:711) >==2780==by 0x13F6467E: util_queue_init (u_queue.c:309) >==2780==by 0x13F5C9F6: disk

Re: [Mesa-dev] [PATCH] mesa: add missing RGB9_E5 format in _mesa_base_fbo_format

Am 26.01.2018 um 11:31 schrieb Antia Puentes: > On 25/01/18 18:56, Roland Scheidegger wrote: > >> Am 25.01.2018 um 17:56 schrieb Roland Scheidegger: >>> Am 25.01.2018 um 16:30 schrieb Michel Dänzer: On 2018-01-24 05:38 PM, Juan A. Suarez Romero wrote: > This fixes KHR-GL45.internalformat.

[Mesa-dev] [PATCH] meson: libdrm shouldn't appear in Requires.private: if it wasn't found

Otherwise, using pkg-config to retrieve flags will fail, e.g. $ pkg-config gl --cflags Package libdrm was not found in the pkg-config search path. Perhaps you should add the directory containing `libdrm.pc' to the PKG_CONFIG_PATH environment variable Package 'libdrm', required by 'gl', not found

Re: [Mesa-dev] [PATCH] mesa: Correctly print glTexImage dimensions

Hi; On 01/25/2018 05:18 PM, Elie Tournier wrote: texture_format_error_check_gles() displays error like "glTexImage%dD". This patch just replace the %d by the correct dimension. Signed-off-by: Elie Tournier --- src/mesa/main/teximage.c | 13 ++--- 1 file changed, 6 insertions(+), 7 d

Re: [Mesa-dev] [PATCH] winsys/amdgpu: Set RADEON_FLAG_GTT_WC for UVD buffer

Yes, vaapi decoding works with your patch. On 26.01.2018 13:12, Marek Olšák wrote: > Hi Christoph, > > Can you test this patch instead? > > Thanks, > Marek > > On Fri, Jan 19, 2018 at 3:24 PM, Christoph Haag wrote: >> without this flag, it fails an assertion >> with assertions disabled it retr

Re: [Mesa-dev] [PATCH v3 7/8] nir: Offset vertex_id by first_vertex instead of base_vertex

Acked-by: Marek Olšák Marek On Thu, Jan 25, 2018 at 7:15 PM, Antia Puentes wrote: > From: Neil Roberts > > base_vertex will be zero for non-indexed calls and in that case we > need vertex_id to be offset by the ‘first’ parameter instead. That is > what we get with first_vertex. This is true fo

Re: [Mesa-dev] [PATCH] winsys/amdgpu: Set RADEON_FLAG_GTT_WC for UVD buffer

Hi Christoph, Can you test this patch instead? Thanks, Marek On Fri, Jan 19, 2018 at 3:24 PM, Christoph Haag wrote: > without this flag, it fails an assertion > with assertions disabled it retries with this flag set > --- > src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 3 ++- > 1 file changed, 2

Re: [Mesa-dev] [PATCH v3 1/3] intel/common:add debug flag for adding and checking padding on BO's

Sure, I can change the bit flag name to DEBUG_CHECK_OOB; From: Jason Ekstrand [mailto:ja...@jlekstrand.net] Sent: Friday, January 26, 2018 12:11 PM To: Rogovin, Kevin Cc: ML mesa-dev Subject: Re: [Mesa-dev] [PATCH v3 1/3] intel/common:add debug flag for adding and checking padding on BO's On

Re: [Mesa-dev] [PATCH v3 2/3] i965: add noise padding to buffer object and function to check if noise is correct

Hi, The main reason I went with map and invalidate is because the kernel on pread will only wait on execbuffer2 calls that declare they are going to write to the given GEM; there is the off-chance that a wild write might hit the padding of a GEM and the function contract is to check the paddin

Re: [Mesa-dev] [PATCH 3/4] r600: add ARB_query_buffer_object support

On 26 Jan. 2018 09:09, "Roland Scheidegger" wrote: Am 25.01.2018 um 01:40 schrieb Dave Airlie: > From: Dave Airlie > > This uses a different shader than radeonsi, as we can't address non-256 > aligned ssbos, which the radeonsi code does. This passes some extra > offsets into the shader. Couldn't

[Mesa-dev] [PATCH] Revert "mesa: add missing RGB9_E5 format in _mesa_base_fbo_format"

This reverts commit 513c2263cbff45edb105c7b46e58f316e06746ab. _mesa_base_fbo_format_ is used to validate the internalformat passed to RenderbufferStorage, which in the OpenGL 4.6 is said: "An INVALID_ENUM error is generated if internalformat is not one of the color-renderable, depth-renderable, o

Re: [Mesa-dev] [PATCH] mesa: add missing RGB9_E5 format in _mesa_base_fbo_format

On Fri, 2018-01-26 at 11:31 +0100, Antia Puentes wrote: > On 25/01/18 18:56, Roland Scheidegger wrote: > > > Am 25.01.2018 um 17:56 schrieb Roland Scheidegger: > > > Am 25.01.2018 um 16:30 schrieb Michel Dänzer: > > > > On 2018-01-24 05:38 PM, Juan A. Suarez Romero wrote: > > > > > This fixes KHR-

Re: [Mesa-dev] [PATCH] mesa: add missing RGB9_E5 format in _mesa_base_fbo_format

On 25/01/18 18:56, Roland Scheidegger wrote: Am 25.01.2018 um 17:56 schrieb Roland Scheidegger: Am 25.01.2018 um 16:30 schrieb Michel Dänzer: On 2018-01-24 05:38 PM, Juan A. Suarez Romero wrote: This fixes KHR-GL45.internalformat.renderbuffer.rgb9_e5. --- src/mesa/main/fbobject.c | 3 +++

Re: [Mesa-dev] [PATCH v3 2/3] i965: add noise padding to buffer object and function to check if noise is correct

On Fri, Jan 26, 2018 at 12:56 AM, wrote: > From: Kevin Rogovin > > Signed-off-by: Kevin Rogovin > Reviewed-by: Chris Wilson > --- > src/mesa/drivers/dri/i965/brw_bufmgr.c | 115 > - > src/mesa/drivers/dri/i965/brw_bufmgr.h | 13 > 2 files changed, 127 ins

Re: [Mesa-dev] [PATCH v3 1/3] intel/common:add debug flag for adding and checking padding on BO's

On Fri, Jan 26, 2018 at 12:56 AM, wrote: > From: Kevin Rogovin > > Signed-off-by: Kevin Rogovin > --- > src/intel/common/gen_debug.c | 1 + > src/intel/common/gen_debug.h | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/src/intel/common/gen_debug.c b/src/intel/common/gen_debug.c > in

Re: [Mesa-dev] [PATCH] anv_icd.py: improve reproducible builds

On 26.01.2018 09:56, Maxin B. John wrote: @@ -44,4 +44,4 @@ if __name__ == '__main__': } with open(args.out, 'w') as f: -json.dump(json_data, f, indent = 4) +json.dump(json_data, f, indent = 4, sort_keys=True) I'm slightly confused what exactly causes the issue. Ple

Re: [Mesa-dev] [PATCH] nir: mark unused space in packed_tex_data

Reviewed-by: Jason Ekstrand On Fri, Jan 26, 2018 at 1:30 AM, Tapani Pälli wrote: > This change cleans following scary warnings in valgrind output > when disk cache is being written: > >==6532== Uninitialised byte(s) found during client check request >==6532==at 0x14423FAD: blob_writ

Re: [Mesa-dev] [Mesa-stable] [PATCH] anv/pipeline: Don't look at blend state unless we have an attachment

On Fri, Jan 26, 2018 at 1:09 AM, Alex Smith wrote: > That commit is "anv/pipeline: Don't assert on more than 32 samplers"? > https://cgit.freedesktop.org/mesa/mesa/commit/?id= > 4b69ba381766cd911eb1284f1b0332a139ec8a75 > You're right. I'm not sure what I was talking about. I've dug the patch o

Re: [Mesa-dev] [PATCH v2 1/4] anv/descriptor_set: add reference counting for descriptor set layouts

Reviewed-by: Jason Ekstrand Thanks for fixing this! On Fri, Jan 26, 2018 at 1:26 AM, Iago Toral Quiroga wrote: > The spec states that descriptor set layouts can be destroyed almost > at any time: > >"VkDescriptorSetLayout objects may be accessed by commands that > operate on descriptor

Re: [Mesa-dev] [PATCH] anv_icd.py: improve reproducible builds

Pushed. Thanks and welcome to Mesa! --Jason On Fri, Jan 26, 2018 at 12:56 AM, Maxin B. John wrote: > Hi, > > On Thu, Jan 18, 2018 at 3:22 PM, Emil Velikov > wrote: > > On 18 January 2018 at 11:33, wrote: > >> From: "Maxin B. John" > >> > >> Sort the output to ensure build reproducibility >

[Mesa-dev] [PATCH] nir: mark unused space in packed_tex_data

This change cleans following scary warnings in valgrind output when disk cache is being written: ==6532== Uninitialised byte(s) found during client check request ==6532==at 0x14423FAD: blob_write_bytes (blob.c:152) ==6532==by 0x144240FB: blob_write_uint32 (blob.c:194) ==6532==

[Mesa-dev] [PATCH v2 1/4] anv/descriptor_set: add reference counting for descriptor set layouts

The spec states that descriptor set layouts can be destroyed almost at any time: "VkDescriptorSetLayout objects may be accessed by commands that operate on descriptor sets allocated using that layout, and those descriptor sets must not be updated with vkUpdateDescriptorSets after th

Re: [Mesa-dev] [PATCH 1/2] mesa: add blob overrun check to program binary reads

On 26.01.2018 01:56, Timothy Arceri wrote: > --- > src/mesa/main/program_binary.c | 14 ++ > 1 file changed, 14 insertions(+) > > diff --git a/src/mesa/main/program_binary.c b/src/mesa/main/program_binary.c > index 2786487362..68a15ec258 100644 > --- a/src/mesa/main/program_binary.c

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