https://bugs.freedesktop.org/show_bug.cgi?id=98271
--- Comment #12 from John ---
Thankfully having amgdpu working with SI gave me something else to try.
So I ran the same script with amdgpu instead of radeon (alas and a 4.9 kernel
instead of a 4.8...), back on the latest code from mesa's git: the
https://bugs.freedesktop.org/show_bug.cgi?id=56653
Sachin Bhutani changed:
What|Removed |Added
CC||sachinbhutani...@gmail.com
--
You are
---
src/compiler/shader_info.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
index 68800a1..8266fc3 100644
--- a/src/compiler/shader_info.h
+++ b/src/compiler/shader_info.h
@@ -117,6 +117,13 @@ typedef struct shader_info {
---
src/mesa/drivers/dri/i965/brw_context.h | 13 -
src/mesa/drivers/dri/i965/brw_cs.c| 10 --
src/mesa/drivers/dri/i965/brw_program.c | 14 ++
src/mesa/drivers/dri/i965/gen7_cs_state.c | 6 ++
4 files changed, 8 insertions(+), 35 deletions(-)
diff
Here brw_setup_vue_interpolation() is rewritten not to use the InterpQualifier
array in gl_fragment_program which allows us to remove it.
This change also makes the code which is only used by gen4/5 more self contained
as it now has its own gen5_fragment_program struct rather than storing the map
---
src/mesa/drivers/dri/i965/brw_context.h | 26 ---
src/mesa/drivers/dri/i965/brw_program.c | 24 ++---
src/mesa/drivers/dri/i965/brw_tcs.c | 17 ++-
src/mesa/drivers/dri/i965/brw_tcs_surface_state.c | 3 +--
src/
---
src/compiler/glsl/glsl_to_nir.cpp| 6 ---
src/compiler/glsl/ir_set_program_inouts.cpp | 14 ++
src/compiler/shader_enums.h | 5 +-
src/mesa/drivers/common/meta.c | 10 ++--
src/mesa/drivers/common/meta.h | 2 +
---
src/mesa/drivers/dri/i965/brw_context.h | 21 +
src/mesa/drivers/dri/i965/brw_program.c | 10 +-
src/mesa/drivers/dri/i965/brw_wm.c | 10 --
src/mesa/drivers/dri/i965/brw_wm.h | 2 +-
src/mesa/drivers/dri/i965/b
---
src/mesa/drivers/dri/i965/brw_compiler.h | 2 +-
src/mesa/drivers/dri/i965/brw_context.h | 13 -
src/mesa/drivers/dri/i965/brw_gs.c | 10 --
src/mesa/drivers/dri/i965/brw_gs.h | 2 +-
src/mesa/drivers/dri/i965/brw_gs_surface_st
---
src/mesa/drivers/dri/i965/brw_context.h | 17 +
src/mesa/drivers/dri/i965/brw_program.c | 8
src/mesa/drivers/dri/i965/brw_vs.c | 10 --
src/mesa/drivers/dri/i965/brw_vs.h | 2 +-
src/mesa/drivers/dri/i965/brw_vs_
A following patch is going to merge the gl_fragment_program struct into
a common gl_program and we want to avoid all stages having this array.
---
src/gallium/include/pipe/p_shader_tokens.h | 1 +
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 33 +++-
src/mesa/state_tracker/st_
These need to be bitfields for use with gallium.
---
src/compiler/glsl/glsl_to_nir.cpp | 2 +-
src/compiler/shader_info.h| 12 +---
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp
b/src/compiler/glsl/glsl_to_nir.cpp
index de76651.
Rather then messing around creating bitfields and arrays to store
the interpolation location just translate it on the fly.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 22 ++
src/mesa/state_tracker/st_glsl_to_tgsi.h | 1 -
src/mesa/state_tracker/st_program.c| 10
---
src/mesa/drivers/dri/i965/brw_context.h | 6 +++---
src/mesa/drivers/dri/i965/brw_draw.c | 2 +-
src/mesa/drivers/dri/i965/brw_program.c | 2 +-
src/mesa/drivers/dri/i965/brw_tcs.c | 6 +++---
src/mesa/drivers/dri/i965/brw_tes.c
---
src/compiler/glsl/glsl_to_nir.cpp | 8
src/mesa/drivers/dri/i965/brw_context.h| 6 +++---
src/mesa/drivers/dri/i965/brw_cs.c | 22 ++
src/mesa/drivers/dri/i965/brw_program.c| 2 +-
src/mesa/drivers/dri/i965/gen7_cs_state.c | 4 ++--
sr
---
src/mesa/drivers/dri/i965/brw_context.h | 6 ++---
src/mesa/drivers/dri/i965/brw_draw.c | 2 +-
src/mesa/drivers/dri/i965/brw_program.c | 2 +-
src/mesa/drivers/dri/i965/brw_tcs.c | 32 ++-
src/mesa/drivers/dri/i965/brw_tcs_
This was accidently disabled in 832bcc3613 not long after it was added.
Since it's only for gen5 and lower we might as we just remove it rather
than fixing it.
---
src/mesa/drivers/dri/i965/brw_interpolation_map.c | 3 ++-
src/mesa/drivers/dri/i965/intel_debug.h | 31 +++---
---
src/mesa/drivers/dri/i965/brw_context.h | 6 +++---
src/mesa/drivers/dri/i965/brw_draw.c | 2 +-
src/mesa/drivers/dri/i965/brw_gs.c | 19 ---
src/mesa/drivers/dri/i965/brw_gs_surface_state.c | 2 +-
src/mesa/drivers/dri/i965/brw_program.c
---
src/compiler/glsl/ir_set_program_inouts.cpp | 6 +-
src/mesa/main/mtypes.h | 6 --
2 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/src/compiler/glsl/ir_set_program_inouts.cpp
b/src/compiler/glsl/ir_set_program_inouts.cpp
index baa52b1..a177219 10064
Here we move the only field in gl_vertex_program to the
ARB program fields in gl_program.
---
src/mesa/drivers/common/meta.c | 10 +--
src/mesa/drivers/common/meta.h | 2 +-
src/mesa/drivers/dri/i915/i915_fragprog.c| 4 +-
src/mesa/drivers/dri/i965/brw
And use this field as the source for shader info in the nir_shader
this will allow us to set some of these fields from GLSL directly.
It will also simplify restoring from shader cache and allow the
removal of duplicate fields from GLSL.
---
src/compiler/glsl/glsl_to_nir.cpp | 3 ++-
src/mesa/main
And pass in a pointer to the shader info in gl_program for ARB programs.
---
src/amd/vulkan/radv_meta_blit.c | 12
src/amd/vulkan/radv_meta_blit2d.c | 12
src/amd/vulkan/radv_meta_buffer.c | 6 --
src/amd/vulkan/radv_meta_bufimag
InterpQualifier is never set for ARB programs so this will do nothing.
---
src/mesa/program/prog_to_nir.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c
index a675bc6..981d6f9 100644
--- a/src/mesa/program/prog_to_nir.c
+++ b/sr
---
src/compiler/shader_info.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
index 502c7c8..66e06ad 100644
--- a/src/compiler/shader_info.h
+++ b/src/compiler/shader_info.h
@@ -114,6 +114,16 @@ typedef struct shader_info {
This will allow use to stop copying values between structs and
will also simplify handling handling these values in the shader cache.
---
src/compiler/nir/nir.h | 98 +---
src/compiler/shader_info.h | 123
src/mesa
---
src/compiler/shader_info.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
index 8266fc3..502c7c8 100644
--- a/src/compiler/shader_info.h
+++ b/src/compiler/shader_info.h
@@ -78,6 +78,9 @@ typedef struct shader_info {
/**
Having the shader info struct in nir_shader makes things difficult for
the shader cache, and means we are copying values in the glsl->nir pass
unnecessarily. This series creates a shared shader info and makes a bunch
of clean-ups based on this change.
The st changes have been tested against llvmpi
https://bugs.freedesktop.org/show_bug.cgi?id=98242
--- Comment #5 from Tapani Pälli ---
(In reply to Tapani Pälli from comment #4)
> It seems Mesa already supports such expressions for #define's, I wonder if
> same functionality could be hooked up to parse #line .. just a thought
oops this is no
On Tue, Oct 18, 2016 at 12:29 AM, Ilia Mirkin wrote:
> radeonsi also does the same thing. I suspect that this is likely to be a
> no-op in reality, but it brings nouveau code closer to what the blob
> produces. Plus it makes sense to not try to do auto-derivatives on this.
>
> Signed-off-by: Ilia
radeonsi also does the same thing. I suspect that this is likely to be a
no-op in reality, but it brings nouveau code closer to what the blob
produces. Plus it makes sense to not try to do auto-derivatives on this.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_from_t
Signed-off-by: Ilia Mirkin
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
b/src/gallium/drivers/nouveau/codegen/nv5
The indirect handle has to come right after the coordinates, so if there
was a sample/bias/depth compare/offset, everything would end up being
shifted by one argument position.
Signed-off-by: Ilia Mirkin
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_loweri
https://bugs.freedesktop.org/show_bug.cgi?id=98172
--- Comment #23 from Suzuki, Shinji ---
(In reply to Marek Olšák from comment #22)
> It would be better to call fence_finish while not holding the mutex. For
>mtx_unlock(&so->mtx);
>
>if (screen->fence_finish(screen, fence, timeout)) {
>
From: Roland Scheidegger
For the texturing packs, things looked pretty terrible. For every
lerp, we were repacking the values, and while those look sort of cheap
with 128bit, with 256bit we end up with 2 of them instead of just 1 but
worse, plus 2 extracts too (the unpack, however, works fine wit
On 18 October 2016 at 08:45, Thomas Helland wrote:
>
> 18. okt. 2016 00.07 skrev "Jan Ziak" <0xe2.0x9a.0...@gmail.com>:
>>
>> This patch replaces the ir_variable_refcount_entry's linked-list
>> with an array-list.
>>
>> The array-list has local storage which does not require ANY additional
>> allo
https://bugs.freedesktop.org/show_bug.cgi?id=98271
--- Comment #11 from John ---
I tried going back to the commit of 11.0 (so with llvm 3.7) but I still got the
issue.
I'd guess the bug is in the kernel not mesa, because I don't think I've had the
issue for so long, I could be wrong though.
--
https://bugs.freedesktop.org/show_bug.cgi?id=98275
--- Comment #3 from Michel Dänzer ---
(In reply to lesserbrute from comment #2)
> #0 0x7fffc0f9d034 in llvm::cl::AddLiteralOption(llvm::cl::Option&, char
> const*) () from /usr/lib/x86_64-linux-gnu/libLLVM-3.9.so.1
> #1 0x7fff90ca6b0a i
On Mon, Oct 17, 2016 at 05:34:02PM +0100, Emil Velikov wrote:
> On 17 October 2016 at 16:39, Eric Engestrom wrote:
> > On Monday, 2016-10-17 22:53:20 +1100, Jonathan Gray wrote:
> >> On Mon, Oct 17, 2016 at 12:39:11PM +0100, Emil Velikov wrote:
> >> > On 17 October 2016 at 10:53, Eric Engestrom
https://bugs.freedesktop.org/show_bug.cgi?id=98271
--- Comment #10 from John ---
Correct, I have an mpv config with:
hwdec=vdpau
hwdec-codecs=all
vo=opengl-hq
The rest shouldn't matter I believe.
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact
On Tue, Oct 18, 2016 at 12:45 AM, Thomas Helland
wrote:
> I can't quite tell, as Gmail tends to mangle whitespace stuff,
> but it looks like there might be some style issues with
> not everything following the three-space indent, no tabs
> policy that mesa tries to stick to.
I followed the 3-spac
This series is,
Acked-by: Edward O'Callaghan
On 10/18/2016 12:44 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
> src/gallium/drivers/radeon/radeon_llvm.h |9 -
> .../drivers/radeon/radeon_setup_tgsi_llvm.c| 979 +--
> src/gallium/drivers/radeonsi/Mak
18. okt. 2016 00.07 skrev "Jan Ziak" <0xe2.0x9a.0...@gmail.com>:
>
> This patch replaces the ir_variable_refcount_entry's linked-list
> with an array-list.
>
> The array-list has local storage which does not require ANY additional
> allocations if the list has small number of elements. The size of
> The motivation for the series was the high malloc call count for
> glsl_to_tgsi_instruction, which I observed when I was working on the
> GLSL stuff. Decreasing the size of that structure should help with
> malloc overhead as well as cache utilization in theory.
>
> Results with shader-db are bel
On Mon, Oct 17, 2016 at 10:35 AM, Jason Ekstrand wrote:
> This has two primary advantages. First, it means that the batch_chain code
> knows less about the actual command buffer contents which is good because
> improves separation. Second, it means that it only gets re-emitted once
> after all o
On Mon, Oct 17, 2016 at 11:54 PM, Dave Airlie wrote:
> On 18 October 2016 at 05:23, Marek Olšák wrote:
>> On Mon, Oct 17, 2016 at 4:44 PM, Roland Scheidegger
>> wrote:
>>> Am 17.10.2016 um 15:39 schrieb Marek Olšák:
From: Marek Olšák
sizeof(glsl_to_tgsi_instruction): 464 -> 416
This patch replaces the ir_variable_refcount_entry's linked-list
with an array-list.
The array-list has local storage which does not require ANY additional
allocations if the list has small number of elements. The size of this
storage is configurable for each variable.
Benchmark results for "./ru
Reviewed-by: Edward O'Callaghan
On 10/18/2016 12:40 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
> src/gallium/auxiliary/tgsi/tgsi_util.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.h
> b/src/gallium/auxiliary/tgsi/tgsi_util.h
> index
From: Boyuan Zhang
cabac is only supported in the h264 main and higher profiles
Signed-off-by: Boyuan Zhang
---
src/gallium/state_trackers/va/picture.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/gallium/state_trackers/va/picture.c
b/src/gallium/state_trackers/va/picture.c
index ea
On 18 October 2016 at 05:23, Marek Olšák wrote:
> On Mon, Oct 17, 2016 at 4:44 PM, Roland Scheidegger
> wrote:
>> Am 17.10.2016 um 15:39 schrieb Marek Olšák:
>>> From: Marek Olšák
>>>
>>> sizeof(glsl_to_tgsi_instruction): 464 -> 416
>>> ---
>>> src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 33
On 17.10.2016 23:08, Timothy Arceri wrote:
On Mon, 2016-10-17 at 19:25 +0200, Nicolai Hähnle wrote:
From: Nicolai Hähnle
Use a full writemask in this case. This is relevant e.g. when a
function
has an inout argument which is an array of structs.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp
On Mon, 2016-10-17 at 19:25 +0200, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Use a full writemask in this case. This is relevant e.g. when a
> function
> has an inout argument which is an array of structs.
> ---
> src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 --
> 1 file changed, 4
I know know if it will make this patch unnecessary, but I have a GLSL
IR-level lowering pass for 64-bit multiplication. I'm going to send
that out with the rest of the GL_ARB_gpu_shader_int64 series within the
next day or so.
On 10/15/2016 03:24 PM, Pierre Moreau wrote:
> Hardware does not suppor
On Fri, Oct 14, 2016 at 8:08 PM, Kenneth Graunke wrote:
> dEQP-GLES31.functional.geometry_shading.instanced.geometry_1_invocations
> draws using a geometry shader that specifies
>
>layout(points, invocations = 1) in;
>
> and then uses gl_InvocationID. According to the Haswell PRM, the
> "GS I
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/aubinator.c | 6 --
src/intel/tools/decoder.c | 12 +---
src/intel/tools/decoder.h | 5 -
3 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 31c1
Hi,
Here is another quick set of changes to aubinator to help out with
debugging.
Thanks,
Lionel Landwerlin (3):
intel: aubinator: print boolean fields to true with colors
intel: aubinator: load fields values from xml data
intel: aubinator: print field values if available
src/intel/tools
Turning this :
sampler state 0
Sampler Disable: false
Texture Border Color Mode: 0
LOD PreClamp Enable: 1
Base Mip Level: 0.00
Mip Mode Filter: 0
Mag Mode Filter: 1
Min Mode Filter: 1
Texture LOD Bias: foo
Anisotropic Algorithm: 0
into this :
sampler state
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/decoder.c | 31 +++
src/intel/tools/decoder.h | 9 +
2 files changed, 40 insertions(+)
diff --git a/src/intel/tools/decoder.c b/src/intel/tools/decoder.c
index cab5271..88ba5c0 100644
--- a/src/intel/tools/
On Mon, Oct 17, 2016 at 4:16 PM, wrote:
> From: Boyuan Zhang
>
> During dual instance encoding submission, if the second encode task and first
> encode task have no reference dependency, e.g. p following with idr-frame,
> there is a chance the second task will use for its reconstructed picture
>
From: Boyuan Zhang
During dual instance encoding submission, if the second encode task and first
encode task have no reference dependency, e.g. p following with idr-frame,
there is a chance the second task will use for its reconstructed picture
buffer the same buffer used by first task for its re
https://bugs.freedesktop.org/show_bug.cgi?id=98172
--- Comment #22 from Marek Olšák ---
It would be better to call fence_finish while not holding the mutex. For
example:
mtx_lock(&so->mtx);
/* If the fence doesn't exist, assume it's signalled. */
if (so->fence) {
struct pipe_fence_handle *fen
From: Marek Olšák
---
si-report.py | 26 +-
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/si-report.py b/si-report.py
index cc3d4ce..144a229 100755
--- a/si-report.py
+++ b/si-report.py
@@ -506,26 +506,29 @@ class grouped_stats:
format_percen
From: Marek Olšák
---
si-report.py | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/si-report.py b/si-report.py
index 144a229..620b3bd 100755
--- a/si-report.py
+++ b/si-report.py
@@ -535,20 +535,21 @@ def get_shader_name(list, orig):
assert False
return "(err
On Monday, October 17, 2016 11:09:32 AM PDT Jason Ekstrand wrote:
> On Mon, Oct 17, 2016 at 8:46 AM, Lionel Landwerlin
> wrote:
>
> > Up to this point we were using the gen8+ structures. Altough this commit
> > doesn't fixes the border color CTS tests, this is a step in the right
> > direction to
On Mon, 2016-10-17 at 12:34 -0700, Kenneth Graunke wrote:
> On Monday, October 17, 2016 4:46:54 PM PDT Lionel Landwerlin wrote:
> > Hi,
> >
> > Spoiler alert, this series doesn't actually make the border colors
> > work on
> > IvyBridge and Haswell. It still brings some useful changes (I
> > think
On Monday, 17 October 2016, Mark Thompson wrote:
> On 17/10/16 17:33, Julien Isorce wrote:
> > As specified in va.h, default value should be set on attributes
> > not present in the input list.
> >
> > Signed-off-by: Julien Isorce >
> > ---
> > src/gallium/state_trackers/va/config.c | 9 +++
On 29.09.2016 22:55, Anutex wrote:
I tried to debug this issue with changing the condition to check only bad magic
and Error.
And the test passed.
Though i am not sure what is the correct behaviour if we are in this condition.
May be we should make some other condition if the Hash Table have t
On Monday, October 17, 2016 4:46:54 PM PDT Lionel Landwerlin wrote:
> Hi,
>
> Spoiler alert, this series doesn't actually make the border colors work on
> IvyBridge and Haswell. It still brings some useful changes (I think).
>
> On Haswell, it seems the hardware always reads the border color from
On Mon, Oct 17, 2016 at 4:44 PM, Roland Scheidegger wrote:
> Am 17.10.2016 um 15:39 schrieb Marek Olšák:
>> From: Marek Olšák
>>
>> sizeof(glsl_to_tgsi_instruction): 464 -> 416
>> ---
>> src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 33
>> +++---
>> 1 file changed, 16 ins
On Mon, Oct 17, 2016 at 8:41 PM, Ian Romanick wrote:
> The only problem is we're going to need this or something similar if
> we're ever going to fix glsl-vs-inline-explosion.shader_test.
So is it reviewed-by? The variable is unused (at the moment).
Marek
>
> On 10/17/2016 06:39 AM, Marek Olšák
Hi,
The latest branch:
https://cgit.freedesktop.org/~mareko/mesa/log/?h=glsl-alloc-rework2
It contains:
- all review comments resolved
- commits from Tapani's jenkins branch (fixes for glsl, nir, i965)
My updated patches are also on the list if you wanna review them.
Marek
On Thu, Oct 13, 2016
On Mon, Oct 17, 2016 at 11:51 AM, Lionel Landwerlin
wrote:
> On Mon, 2016-10-17 at 11:09 -0700, Jason Ekstrand wrote:
> > On Mon, Oct 17, 2016 at 8:46 AM, Lionel Landwerlin > .com> wrote:
> > > Up to this point we were using the gen8+ structures. Altough this
> > > commit
> > > doesn't fixes the
On Mon, 2016-10-17 at 11:09 -0700, Jason Ekstrand wrote:
> On Mon, Oct 17, 2016 at 8:46 AM, Lionel Landwerlin .com> wrote:
> > Up to this point we were using the gen8+ structures. Altough this
> > commit
> > doesn't fixes the border color CTS tests, this is a step in the
> > right
> > direction to
On Mon, Oct 17, 2016 at 8:21 PM, Brian Paul wrote:
> The series looks OK to me.
>
> Acked-by: Brian Paul
>
> I guess I have a general question though. Over the years of debugging GL
> apps I've seen a few that generate pretty huge shaders (in terms of TGSI
> instructions). I recall one (can't r
I am in favor of these. One of these days I'm planning to remove these
instructions from Mesa IR altogether... unless someone beats me to it.
Patches 8 and 9 are
Reviewed-by: Ian Romanick
On 10/17/2016 06:39 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
> src/mesa/state_tracker/st_mesa
This patch is
Reviewed-by: Ian Romanick
If we ever want to support the noise built-in functions, we'll have to
implement them as functions... that will get inlined. :)
On 10/17/2016 06:39 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> it's always true
> ---
> src/mesa/drivers/dri/i915/i915_c
The only problem is we're going to need this or something similar if
we're ever going to fix glsl-vs-inline-explosion.shader_test.
On 10/17/2016 06:39 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
> src/mesa/main/mtypes.h | 1 -
> src/mesa/state_tracker/st_extensions.c | 1
On Mon, 2016-10-17 at 10:56 -0700, Jason Ekstrand wrote:
>
>
> On Mon, Oct 17, 2016 at 8:46 AM, Lionel Landwerlin .com> wrote:
> > Signed-off-by: Lionel Landwerlin
> > ---
> > src/intel/genxml/gen6.xml | 32
> > src/intel/genxml/gen7.xml | 12
> >
On 17/10/16 17:33, Julien Isorce wrote:
> As specified in va.h, default value should be set on attributes
> not present in the input list.
>
> Signed-off-by: Julien Isorce
> ---
> src/gallium/state_trackers/va/config.c | 9 +
> src/gallium/state_trackers/va/surface.c | 5 +++--
> 2 file
The series looks OK to me.
Acked-by: Brian Paul
I guess I have a general question though. Over the years of debugging
GL apps I've seen a few that generate pretty huge shaders (in terms of
TGSI instructions). I recall one (can't remember the app) in which a
moderate size shader compiled in
On Mon, Oct 17, 2016 at 8:46 AM, Lionel Landwerlin
wrote:
> Up to this point we were using the gen8+ structures. Altough this commit
> doesn't fixes the border color CTS tests, this is a step in the right
> direction to fix the following tests :
>
It's not entirely clear where you're headed but
On Mon, Oct 17, 2016 at 7:10 PM, Emil Velikov wrote:
> On 17 October 2016 at 17:47, Marek Olšák wrote:
>> From: Deepak Sharma
>>
>> This allows building radeonsi driver for surfaceless platform.
>>
>> Signed-off-by: Deepak Sharma
>> Signed-off-by: Marek Olšák
> As I "predicted" from the beginn
On Mon, Oct 17, 2016 at 8:46 AM, Lionel Landwerlin
wrote:
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/genxml/gen6.xml | 32
> src/intel/genxml/gen7.xml | 12
> src/intel/genxml/gen75.xml | 40
> sr
From: Marek Olšák
v2: cosmetic changes
Tested-by: Edmondo Tommasina (v1)
Reviewed-by: Nicolai Hähnle (v1)
---
src/compiler/glsl/glcpp/glcpp-lex.l | 2 +-
src/compiler/glsl/glcpp/glcpp-parse.y | 205 +++---
src/compiler/glsl/glcpp/glcpp.h | 1 +
3 files
https://bugs.freedesktop.org/show_bug.cgi?id=98275
--- Comment #2 from lesserbr...@gmail.com ---
(In reply to Nicolai Hähnle from comment #1)
> Could you please provide a backtrace of the crash? (Make sure that debug
> symbol packages are installed.)
libva info: VA-API version 0.39.2
libva info:
From: Marek Olšák
v2: remove goto, cosmetic changes
Tested-by: Edmondo Tommasina (v1)
---
src/util/ralloc.c | 353 ++
src/util/ralloc.h | 84 -
2 files changed, 433 insertions(+), 4 deletions(-)
diff --git a/src/util/ralloc.c b/
vkBeginCommandBuffer and vkCmdExecuteCommands both call into the
gen-specific emit_state_base_address function and vkEndCommandBuffer
belongs with begin.
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_cmd_buffer.c | 94 +
src/intel/vulkan/anv_dump.c
All code that would have once called this can now call the gen-specific
version. The switching version is no longer needed.
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_cmd_buffer.c | 18 --
src/intel/vulkan/anv_private.h | 2 --
src/intel/vulkan/genX_blorp_exec.
It really should have gone here all along. We were trying a bit too hard
to make it gen-agnostic just because it didn't have any #if's.
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_cmd_buffer.c | 314 ---
src/intel/vulkan/anv_genX.h| 4 -
src/int
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_cmd_buffer.c | 7 +--
src/intel/vulkan/anv_private.h| 8
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/src/intel/vulkan/anv_cmd_buffer.c
b/src/intel/vulkan/anv_cmd_buffer.c
index 3c2d032..98257f8 100644
---
With one small genxml change, the two versions were basically identical.
The only differences were one #define for HSW+ and a field that is missing
on Haswell but exists everywhere else.
Signed-off-by: Jason Ekstrand
---
src/intel/genxml/gen8.xml | 2 +-
src/intel/genxml/gen9.xml
This has two primary advantages. First, it means that the batch_chain code
knows less about the actual command buffer contents which is good because
improves separation. Second, it means that it only gets re-emitted once
after all of the secondaries instead of once after each secondary which is
j
From: Nicolai Hähnle
Use a full writemask in this case. This is relevant e.g. when a function
has an inout argument which is an array of structs.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_gls
From: Nicolai Hähnle
Set the type of the left-hand side to the same as the right-hand side,
so that when the base type is double, the writemask of the MOV instruction
is properly fixed up.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa
From: Marek Olšák
time GALLIUM_NOOP=1 ./run shaders/private/alien_isolation/ >/dev/null
Before (2 takes):
real0m8.734s0m8.773s
user0m34.232s 0m34.348s
sys 0m0.084s0m0.056s
After (2 takes):
real0m8.448s0m8.463s
user0m33.104s 0m33.160s
sys 0m0.088s0m0
On 17 October 2016 at 17:47, Marek Olšák wrote:
> From: Deepak Sharma
>
> This allows building radeonsi driver for surfaceless platform.
>
> Signed-off-by: Deepak Sharma
> Signed-off-by: Marek Olšák
As I "predicted" from the beginning adding require_egl_drm() is a hack
which will inspire even m
https://bugs.freedesktop.org/show_bug.cgi?id=98172
--- Comment #21 from Suzuki, Shinji ---
Created attachment 127366
--> https://bugs.freedesktop.org/attachment.cgi?id=127366&action=edit
Per sync-object mutex. Redundant 'else' and setting of StatusFlag are
eliminated.
--
You are receiving th
https://bugs.freedesktop.org/show_bug.cgi?id=98281
--- Comment #8 from Emil Velikov ---
(In reply to Suzuki, Shinji from comment #6)
> (In reply to Emil Velikov from comment #3)
> > Can you attach a simple program which reproduces this ? Ideally one which
> > does not depend on glew, in order to
https://bugs.freedesktop.org/show_bug.cgi?id=98172
--- Comment #20 from Suzuki, Shinji ---
Thank you. That's certainly easier to read.
Also, now I see that so->b.StatusFlag needs to be set to True only when
so->ference is set to NULL in either st_check_sync() or st_client_wait_sync()
because so->
From: Deepak Sharma
This allows building radeonsi driver for surfaceless platform.
Signed-off-by: Deepak Sharma
Signed-off-by: Marek Olšák
---
configure.ac | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index b414edd..05e4bdc 100644
--- a/c
On 17 October 2016 at 16:27, Mark Thompson wrote:
> On 17/10/16 16:13, Julien Isorce wrote:
> > Hi Mark,
> >
> > Yes I actually saw that too in the intel driver though I think it does
> not add
> > VA_RT_FORMAT_RGB32 ? Or I missed something ?
> > Maybe this is a bug. In any case yes as said befor
1 - 100 of 199 matches
Mail list logo
