Re: [Mesa-dev] [PATCH 2/3] egl: return corresponding offset of EGLImage instead of 0.

From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf Of Axel Davy Sent: Friday, September 9, 2016 2:12 PM To: Weng, Chuanbo ; mesa-dev@lists.freedesktop.org; emil.l.veli...@gmail.com Subject: Re: [Mesa-dev] [PATCH 2/3] egl: return corresponding offset of EGLImage instead of

Re: [Mesa-dev] [PATCH 07/57] i965/fs: Replace fs_inst::regs_written with ::size_written field in bytes.

On Thu, 2016-09-08 at 18:44 -0700, Francisco Jerez wrote: > Iago Toral writes: > > > > > On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote: > > (...) > > > > > > diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp > > > b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp > > > index

Re: [Mesa-dev] [v3 4/6] i965/rbc: Consult rb settings for texture surface setup

On Thu, Sep 08, 2016 at 08:49:56AM -0700, Jason Ekstrand wrote: >On Sep 7, 2016 9:30 PM, "Pohjolainen, Topi" ><[1]topi.pohjolai...@gmail.com> wrote: >> >> On Wed, Sep 07, 2016 at 03:25:30PM -0700, Jason Ekstrand wrote: >> >On Sep 7, 2016 10:24 AM, "Topi Pohjolainen" >> >

Re: [Mesa-dev] [PATCH 06/57] i965/vec4: Add wrapper functions for vec4_instruction::regs_read and ::regs_written.

On Thu, 2016-09-08 at 18:32 -0700, Francisco Jerez wrote: > Iago Toral writes: > > > > > On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote: > > > > > > This is in preparation for dropping vec4_instruction::regs_read > > > and > > > ::regs_written in favor of more accurate alternatives ex

Re: [Mesa-dev] [PATCH 2/3] egl: return corresponding offset of EGLImage instead of 0.

That doesn't seem good to me. With that patch, that means that since no one is implementing __DRI_IMAGE_ATTRIB_OFFSET (yes I know in a later patch you implement it for i965), then what used to work will stop working (as the queryImage will return false). You need to introduce some interface

Re: [Mesa-dev] [PATCH] vbo: Correctly handle attribute offsets in dlist draw.

Hi, On Wednesday, 24 August 2016 08:32:10 CEST mathias.froehl...@gmx.net wrote: > From: Mathias Fröhlich > > Hi all, > > kind of a ping with a rephrased commit message > and the style change. > Please review. Ping Thanks! Mathias > > Thanks! > > Mathias > > > When executing a display li

Re: [Mesa-dev] [PATCH 14/33] intel/blorp: Add an entrypoint for doing bit-for-bit copies

On Thu, Sep 08, 2016 at 11:01:45PM -0700, Jason Ekstrand wrote: >On Sep 8, 2016 10:47 PM, "Pohjolainen, Topi" ><[1]topi.pohjolai...@gmail.com> wrote: >> >> On Thu, Sep 08, 2016 at 10:58:09AM -0700, Jason Ekstrand wrote: >> >On Wed, Sep 7, 2016 at 1:16 PM, Jason Ekstrand >

Re: [Mesa-dev] [PATCH 14/33] intel/blorp: Add an entrypoint for doing bit-for-bit copies

On Sep 8, 2016 10:47 PM, "Pohjolainen, Topi" wrote: > > On Thu, Sep 08, 2016 at 10:58:09AM -0700, Jason Ekstrand wrote: > >On Wed, Sep 7, 2016 at 1:16 PM, Jason Ekstrand > ><[1]ja...@jlekstrand.net> wrote: > > > >On Sep 7, 2016 10:45 AM, "Nanley Chery" <[2]nanleych...@gmail.com> > >

Re: [Mesa-dev] [PATCH] dir-locals.el: show-trailing-whitespace and whitespace support

On Thu, 2016-09-08 at 12:04 -0400, Ilia Mirkin wrote: > On Thu, Sep 8, 2016 at 12:01 PM, Andres Gomez wrote: > > It will highlight malformed indentation > > Malformed meaning what? Usage of tabs, instead of spaces. > > and change color of the > > characters exceeding the line length limit (>78

Re: [Mesa-dev] [PATCH 14/33] intel/blorp: Add an entrypoint for doing bit-for-bit copies

On Thu, Sep 08, 2016 at 10:58:09AM -0700, Jason Ekstrand wrote: >On Wed, Sep 7, 2016 at 1:16 PM, Jason Ekstrand ><[1]ja...@jlekstrand.net> wrote: > >On Sep 7, 2016 10:45 AM, "Nanley Chery" <[2]nanleych...@gmail.com> >wrote: >> >> On Wed, Sep 07, 2016 at 10:26:25AM -0700, Ja

Re: [Mesa-dev] [PATCH] glsl: Make blend_colordodge compare against 1.0 - FLT_EPSILON.

Alejandro Piñeiro writes: > On 02/09/16 23:13, Kenneth Graunke wrote: >> On Friday, August 26, 2016 10:49:18 PM PDT Kenneth Graunke wrote: >>> This fixes a numerical precision issue that was causing two CTS >>> failures: >>> >>> ES31-CTS.blend_equation_advanced.blend_specific.GL_COLORBURN_KHR >>>

[Mesa-dev] [PATCH] intel/aubinator: Properly handle batch buffer chaining

The original aubinator that Kristian wrote had a bug in the handling of MI_BATCH_BUFFER_START that propagated into the version in upstream mesa. Say you have two batch buffers A and B where A calls MI_BATCH_BUFFER_START to jump to B. Now suppose that A and B are placed consecutively in the address

Re: [Mesa-dev] [PATCH] r300g: Set R300_VAP_CNTL on RSxxx to avoid triangle flickering

On 8 September 2016 at 09:53, Max Staudt wrote: > On the RSxxx chip series, HW TCL is missing and r300_emit_vs_state() > is never called. > > However, if R300_VAP_CNTL is never set, the hardware (at least the > RS690 I tested this on) comes up with rendering artifacts, and > parts that are uploade

Re: [Mesa-dev] [PATCH 2/3] egl: return corresponding offset of EGLImage instead of 0.

Hi Axel and Emil, Thanks Axel for your review. Please see my comments below. -Original Message- From: Axel Davy [mailto:axel.d...@ens.fr] Sent: Friday, September 9, 2016 1:25 AM To: Weng, Chuanbo ; mesa-dev@lists.freedesktop.org; emil.l.veli...@gmail.com Subject: Re: [Mesa-dev] [

Re: [Mesa-dev] [RFT PATCH 2/2] nv20: enable ARB_texture_border_clamp support

Ilia Mirkin writes: > Signed-off-by: Ilia Mirkin > --- > > This was tested on a NV25-on-NV34 situation. Should be tested on real hardware > since my test environment relies on accurate emulation in the hw. > Looks okay to me, as long as you get some testing coverage on real hardware patch is: A

Re: [Mesa-dev] [PATCH 00/57] i965/ir: Switch representation of register offsets and sizes to byte units.

Iago Toral writes: > On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote: >> This series reworks the representation of register region offsets in >> the i965 IR to be universally byte-based instead of the rather >> awkward >> split between reg_offset and subreg_offset we have in the FS back-

Re: [Mesa-dev] [PATCH 0/5] *** Aubinator code simplification ***

On Thursday, September 8, 2016 4:15:17 PM PDT Sirisha Gandikota wrote: > From: Sirisha Gandikota > > This patch set simplifies parts of code in the aubinator tool > as per review comments from Ken (Wed Aug 24 04:51:47 UTC 2016) > > Sirisha Gandikota (5): > aubinator: Fix compiler warning > a

Re: [Mesa-dev] [PATCH 3/5] aubinator: Simplify print_dword_val() method

On Thursday, September 8, 2016 4:15:20 PM PDT Sirisha Gandikota wrote: > From: Sirisha Gandikota > > Remove the float/dword union and use the iter->p[f->start / 32] > directly as printf formatter %08x expects uint32_t (Ken) > > Signed-off-by: Sirisha Gandikota > --- > src/intel/tools/aubinator

Re: [Mesa-dev] [PATCH 11/57] i965/vec4: Replace vec4_instruction::regs_read with ::size_read using byte units.

Iago Toral writes: > On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote: >> The previous regs_read value can be recovered by rewriting each >> reference of regs_read() like 'x = i.regs_read(j)' to 'x = >> DIV_ROUND_UP(i.size_read(j), reg_unit)'. >> >> For the same reason as in the previous

Re: [Mesa-dev] [PATCH 4/5] aubinator: Make gen_disasm_disassemble handle split sends

On Thursday, September 8, 2016 4:15:21 PM PDT Sirisha Gandikota wrote: > From: Sirisha Gandikota > > Skylake adds new SENDS and SENDSC opcodes, which should be > handled in the send-with-EOT check. Make an is_send() helper > that checks if the opcode is SEND/SENDC/SENDS/SENDSC (Ken) > > Signed-o

Re: [Mesa-dev] [PATCH 07/57] i965/fs: Replace fs_inst::regs_written with ::size_written field in bytes.

Iago Toral writes: > On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote: > (...) >> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp >> b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp >> index 12ab7b3..a678351 100644 >> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp >> +++

Re: [Mesa-dev] [PATCH] vl/dri3: handle the case of different GPU

On 08/09/16 05:59 PM, Christian König wrote: > Am 08.09.2016 um 10:42 schrieb Michel Dänzer: >> On 08/09/16 05:05 PM, Christian König wrote: >>> Am 08.09.2016 um 08:23 schrieb Michel Dänzer: On 08/09/16 01:13 PM, Nayan Deshmukh wrote: > On Thu, Sep 8, 2016 at 9:03 AM, Michel Dänzer

Re: [Mesa-dev] [PATCH 06/57] i965/vec4: Add wrapper functions for vec4_instruction::regs_read and ::regs_written.

Iago Toral writes: > On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote: >> This is in preparation for dropping vec4_instruction::regs_read and >> ::regs_written in favor of more accurate alternatives expressed in >> byte units.  The main reason these wrappers are useful is that a >> number

Re: [Mesa-dev] [PATCH 05/13] nouveau: Enable EXT_texture_env_dot3 on NV10 and NV20

On 08/28/2016 06:17 PM, Ilia Mirkin wrote: > On Sun, Aug 28, 2016 at 9:05 PM, Ian Romanick wrote: >> On 08/28/2016 08:56 AM, Ilia Mirkin wrote: >>> FWIW this fails for GL_DOT3_RGBA_EXT but works for GL_DOT3_RGB_EXT >>> [according to glean's texCombine test]. (I suspect the existing >> >> Looking a

Re: [Mesa-dev] [PATCH 02/57] i965/vec4: Replace dst/src_reg::reg_offset with dst/src_reg::offset expressed in bytes.

Iago Toral writes: > On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote: > (...) >>  src/mesa/drivers/dri/i965/brw_ir_vec4.h|  4 +- >>  src/mesa/drivers/dri/i965/brw_vec4.cpp | 61 >> -- >>  .../drivers/dri/i965/brw_vec4_cmod_propagation.cpp |  2 +

[Mesa-dev] [RFT PATCH 1/2] nouveau: fix GL_CLAMP

My earlier observations were that this didn't actually do anything useful on nv10. however it seems to help with nv25-on-nv30. should try to test it on "real" hw. --- Note - this needs to be redone so as to avoid returning 0x5 on hw that doesn't support it. According to rnndb, it doesn't exist on

[Mesa-dev] [RFT PATCH 2/2] nv20: enable ARB_texture_border_clamp support

Signed-off-by: Ilia Mirkin --- This was tested on a NV25-on-NV34 situation. Should be tested on real hardware since my test environment relies on accurate emulation in the hw. src/mesa/drivers/dri/nouveau/nv20_context.c | 1 + src/mesa/drivers/dri/nouveau/nv20_state_tex.c | 29 ++

Re: [Mesa-dev] [PATCH 3/7] mesa/st: support lowering multi-planar YUV

On Thu, Sep 8, 2016 at 8:28 PM, Roland Scheidegger wrote: > Am 09.09.2016 um 02:19 schrieb Rob Clark: >> On Thu, Sep 8, 2016 at 7:54 PM, Rob Clark wrote: >>> On Thu, Sep 8, 2016 at 6:41 PM, Roland Scheidegger >>> wrote: Am 08.09.2016 um 23:43 schrieb Rob Clark: > On Thu, Sep 8, 2016 at

Re: [Mesa-dev] [PATCH 01/57] i965/fs: Replace fs_reg::reg_offset with fs_reg::offset expressed in bytes.

Iago Toral writes: > On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote: > (...) >> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp >> b/src/mesa/drivers/dri/i965/brw_shader.cpp >> index ea39252..29435f6 100644 >> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp >> +++ b/src/mesa/driver

[Mesa-dev] [Bug 97643] Shader crashes radeon driver and brings the whole system down

https://bugs.freedesktop.org/show_bug.cgi?id=97643 Michel Dänzer changed: What|Removed |Added Component|Mesa core |Drivers/Gallium/radeonsi QA Cont

Re: [Mesa-dev] [PATCH 3/7] mesa/st: support lowering multi-planar YUV

Am 09.09.2016 um 02:19 schrieb Rob Clark: > On Thu, Sep 8, 2016 at 7:54 PM, Rob Clark wrote: >> On Thu, Sep 8, 2016 at 6:41 PM, Roland Scheidegger >> wrote: >>> Am 08.09.2016 um 23:43 schrieb Rob Clark: On Thu, Sep 8, 2016 at 5:11 PM, Roland Scheidegger wrote: > Am 08.09.2016 um

Re: [Mesa-dev] [PATCH 3/7] mesa/st: support lowering multi-planar YUV

On Thu, Sep 8, 2016 at 7:54 PM, Rob Clark wrote: > On Thu, Sep 8, 2016 at 6:41 PM, Roland Scheidegger wrote: >> Am 08.09.2016 um 23:43 schrieb Rob Clark: >>> On Thu, Sep 8, 2016 at 5:11 PM, Roland Scheidegger >>> wrote: Am 08.09.2016 um 22:30 schrieb Rob Clark: > Support multi-planar Y

Re: [Mesa-dev] [PATCH 3/7] mesa/st: support lowering multi-planar YUV

On Thu, Sep 8, 2016 at 6:41 PM, Roland Scheidegger wrote: > Am 08.09.2016 um 23:43 schrieb Rob Clark: >> On Thu, Sep 8, 2016 at 5:11 PM, Roland Scheidegger >> wrote: >>> Am 08.09.2016 um 22:30 schrieb Rob Clark: Support multi-planar YUV for external EGLImage's (currently just in the dm

[Mesa-dev] [PATCH 0/5] *** Aubinator code simplification ***

From: Sirisha Gandikota This patch set simplifies parts of code in the aubinator tool as per review comments from Ken (Wed Aug 24 04:51:47 UTC 2016) Sirisha Gandikota (5): aubinator: Fix compiler warning aubinator: Simplify gen_disasm_create()'s devinfo handling aubinator: Simplify print_d

[Mesa-dev] [PATCH 2/5] aubinator: Simplify gen_disasm_create()'s devinfo handling

From: Sirisha Gandikota Copy the whole devinfo structure instead of just few fields (Ken) Earlier, copied only couple of fields which added more code. So, simplify code by copying the whole structure. Signed-off-by: Sirisha Gandikota --- src/intel/tools/disasm.c | 8 +--- 1 file changed,

[Mesa-dev] [PATCH 4/5] aubinator: Make gen_disasm_disassemble handle split sends

From: Sirisha Gandikota Skylake adds new SENDS and SENDSC opcodes, which should be handled in the send-with-EOT check. Make an is_send() helper that checks if the opcode is SEND/SENDC/SENDS/SENDSC (Ken) Signed-off-by: Sirisha Gandikota --- src/intel/tools/disasm.c | 22 --

[Mesa-dev] [PATCH 1/5] aubinator: Fix compiler warning

From: Sirisha Gandikota Add 'const' qualifier to gen_field_iterator::p pointer (Ken) Signed-off-by: Sirisha Gandikota --- src/intel/tools/decoder.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/tools/decoder.h b/src/intel/tools/decoder.h index b46e451..4ab0765 1

[Mesa-dev] [PATCH 3/5] aubinator: Simplify print_dword_val() method

From: Sirisha Gandikota Remove the float/dword union and use the iter->p[f->start / 32] directly as printf formatter %08x expects uint32_t (Ken) Signed-off-by: Sirisha Gandikota --- src/intel/tools/aubinator.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/src/inte

[Mesa-dev] [PATCH 5/5] aubinator: Remove bogus "end" parameter in gen_disasm_disassemble()

From: Sirisha Gandikota Earlier, the loop pretends to loop over instructions from "start" to "end", but the callers always pass 8192 for end, which is some huge bogus value. The real loop termination condition is send-with-EOT or 0. (Ken) Signed-off-by: Sirisha Gandikota --- src/intel/tools/au

Re: [Mesa-dev] [PATCH 3/7] mesa/st: support lowering multi-planar YUV

Am 08.09.2016 um 23:43 schrieb Rob Clark: > On Thu, Sep 8, 2016 at 5:11 PM, Roland Scheidegger wrote: >> Am 08.09.2016 um 22:30 schrieb Rob Clark: >>> Support multi-planar YUV for external EGLImage's (currently just in the >>> dma-buf import path) by lowering to multiple texture fetch's for each >

Re: [Mesa-dev] [PATCH 1/3] nir/gcm: Call nir_metadata_preserve

On Tuesday, September 6, 2016 11:08:56 AM PDT Jason Ekstrand wrote: > --- > src/compiler/nir/nir_opt_gcm.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/src/compiler/nir/nir_opt_gcm.c b/src/compiler/nir/nir_opt_gcm.c > index 84e32ef..02a9348 100644 > --- a/src/compiler/nir/nir_opt_g

Re: [Mesa-dev] [Bug 97261] vaapi u/v wrong order since vl/util: add copy func for yv12image to nv12surface

Hi Andy, I verified the bug. You are correct. The u and v are inversed. I checked your patch, and confirmed it fixes the issue. Patch is Reviewed-by: Boyuan Zhang Thanks a lot for the help! Regards, Boyuan From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf Of bugzilla-d

[Mesa-dev] [Bug 97643] Shader crashes radeon driver and brings the whole system down

https://bugs.freedesktop.org/show_bug.cgi?id=97643 --- Comment #4 from Cris --- I don't know then. Is there a way for me to diagnose it myself? -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.__

Re: [Mesa-dev] [PATCH 09/23] glsl: Convert constant_expression to the util hash table

2016-08-16 22:10 GMT+02:00 Thomas Helland : > Signed-off-by: Thomas Helland > --- > src/compiler/glsl/ir_constant_expression.cpp | 24 +--- > 1 file changed, 13 insertions(+), 11 deletions(-) > > diff --git a/src/compiler/glsl/ir_constant_expression.cpp > b/src/compiler/glsl/

Re: [Mesa-dev] [PATCH] i965/fs: Fail the shader compile instead of asserting when we can't spill

Jason Ekstrand writes: > On Thu, Sep 8, 2016 at 2:39 PM, Francisco Jerez > wrote: > >> Jason Ekstrand writes: >> >> > Blorp doesn't handle spilling so we set allow_spilling to false in that >> > case. The blorp 16x MSAA resolve shader spills in 16-wide but not >> 8-wide. >> > This commit makes

Re: [Mesa-dev] [PATCH] i965/fs: Fail the shader compile instead of asserting when we can't spill

On Thu, Sep 8, 2016 at 2:39 PM, Francisco Jerez wrote: > Jason Ekstrand writes: > > > Blorp doesn't handle spilling so we set allow_spilling to false in that > > case. The blorp 16x MSAA resolve shader spills in 16-wide but not > 8-wide. > > This commit makes it so that we fail the 16-wide comp

Re: [Mesa-dev] [PATCH] i965/fs: Fail the shader compile instead of asserting when we can't spill

Jason Ekstrand writes: > Blorp doesn't handle spilling so we set allow_spilling to false in that > case. The blorp 16x MSAA resolve shader spills in 16-wide but not 8-wide. > This commit makes it so that we fail the 16-wide compile and successfully > fall back to 8-wide instead of just assert-fa

Re: [Mesa-dev] [PATCH 3/7] mesa/st: support lowering multi-planar YUV

On Thu, Sep 8, 2016 at 5:11 PM, Roland Scheidegger wrote: > Am 08.09.2016 um 22:30 schrieb Rob Clark: >> Support multi-planar YUV for external EGLImage's (currently just in the >> dma-buf import path) by lowering to multiple texture fetch's for each >> plane and CSC in shader. >> >> Signed-off-by:

Re: [Mesa-dev] [PATCH] nir/lower_tex: fix typo with sample_dim

On Thu, Sep 8, 2016 at 12:53 PM, Rob Clark wrote: > Numeric 2 is actually GLSL_SAMPLER_DIM_3D, which I don't think is what > was intended. > > Signed-off-by: Rob Clark > --- > src/compiler/nir/nir_lower_tex.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/compiler/

[Mesa-dev] [PATCH] i965/fs: Fail the shader compile instead of asserting when we can't spill

Blorp doesn't handle spilling so we set allow_spilling to false in that case. The blorp 16x MSAA resolve shader spills in 16-wide but not 8-wide. This commit makes it so that we fail the 16-wide compile and successfully fall back to 8-wide instead of just assert-failing when trying to compile the

Re: [Mesa-dev] [PATCH 3/7] mesa/st: support lowering multi-planar YUV

Am 08.09.2016 um 22:30 schrieb Rob Clark: > Support multi-planar YUV for external EGLImage's (currently just in the > dma-buf import path) by lowering to multiple texture fetch's for each > plane and CSC in shader. > > Signed-off-by: Rob Clark > --- > src/gallium/auxiliary/util/u_inlines.h

Re: [Mesa-dev] [PATCH 02/11] mesa/main: add support for ARB_compute_variable_groups_size

On 09/08/2016 01:31 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/mesa/main/api_validate.c | 94 > > src/mesa/main/api_validate.h | 4 ++ > src/mesa/main/compute.c | 17 > src/mesa/main/context.c

Re: [Mesa-dev] [PATCH 01/11] glapi: add entry points for GL_ARB_compute_variable_group_size

On 09/08/2016 01:31 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > .../glapi/gen/ARB_compute_variable_group_size.xml | 25 > ++ > src/mapi/glapi/gen/Makefile.am | 1 + > src/mapi/glapi/gen/gl_API.xml | 2 ++ > s

Re: [Mesa-dev] [PATCH] st/va: also honors interlaced preference when providing a video format

Hi Leo, Christian and Julien, I tested the patch with Vaapi Encoding and Transcoding, it seems working fine. We are using "VAAPI_DISABLE_INTERLACE" env, so interlaced is always disabled. Regards, Boyuan -Original Message- From: Liu, Leo Sent: September-08-16 9:50 AM To: Koenig, Christi

[Mesa-dev] [PATCH 02/11] mesa/main: add support for ARB_compute_variable_groups_size

Signed-off-by: Samuel Pitoiset --- src/mesa/main/api_validate.c | 94 src/mesa/main/api_validate.h | 4 ++ src/mesa/main/compute.c | 17 src/mesa/main/context.c | 6 +++ src/mesa/main/dd.h | 9 src/m

[Mesa-dev] [PATCH 11/11] nv50/ir: use 1024 threads/block for variable local size

When a variable local size is defined as specified by ARB_compute_variable_group_size, the fixed local size is set to 0 and a SIGFPE occurs when we compute the maximum number of regs. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/codegen/nv50_ir_target.h | 3 ++- 1 file changed,

[Mesa-dev] [PATCH 03/11] glsl: add enable flags for ARB_compute_variable_group_size

This also initializes the default values for the standalone compiler. Signed-off-by: Samuel Pitoiset --- src/compiler/glsl/glsl_parser_extras.cpp | 1 + src/compiler/glsl/glsl_parser_extras.h | 2 ++ src/compiler/glsl/standalone.cpp | 4 src/compiler/glsl/standalone_sc

[Mesa-dev] [PATCH 09/11] st/mesa: add support for dispatching a variable local size

Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_cb_compute.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/src/mesa/state_tracker/st_cb_compute.c b/src/mesa/state_tracker/st_cb_compute.c index 88c1ee2..ccc5dc2 100644 --- a/src/mesa/state_tracke

[Mesa-dev] [PATCH 5/7] mesa/st: pass st_compute_program to st_get_cp_variant

Makes it more consistent with vp/fp variants, and will be needed in a following patch. Signed-off-by: Rob Clark --- src/mesa/state_tracker/st_atom_shader.c | 2 +- src/mesa/state_tracker/st_program.c | 12 ++-- src/mesa/state_tracker/st_program.h | 3 +-- 3 files changed, 8 ins

[Mesa-dev] [PATCH 05/11] glsl: reject compute shaders with fixed and variable local size

The ARB_compute_variable_group_size specification explains that when a compute shader includes both a fixed and a variable local size, a compile-time error occurs. Signed-off-by: Samuel Pitoiset --- src/compiler/glsl/ast_to_hir.cpp | 14 ++ 1 file changed, 14 insertions(+) diff --gi

[Mesa-dev] [PATCH 10/11] st/mesa: expose ARB_compute_variable_group_size

This extension is only exposed if the underlying driver supports ARB_compute_shader. Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_extensions.c | 13 + 1 file changed, 13 insertions(+) diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_ex

[Mesa-dev] [PATCH 07/11] glsl: add gl_LocalGroupSizeARB as a system value

Signed-off-by: Samuel Pitoiset --- src/compiler/glsl/builtin_variables.cpp | 2 ++ src/compiler/shader_enums.h | 1 + 2 files changed, 3 insertions(+) diff --git a/src/compiler/glsl/builtin_variables.cpp b/src/compiler/glsl/builtin_variables.cpp index f47daab..a1768fc 100644 --- a/s

[Mesa-dev] [PATCH 06/11] glsl/linker: handle errors when a variable local size is used

Compute shaders can now include a fixed local size as defined by ARB_compute_shader or a variable size as defined by ARB_compute_variable_group_size. Signed-off-by: Samuel Pitoiset --- src/compiler/glsl/linker.cpp | 23 +-- 1 file changed, 21 insertions(+), 2 deletions(-) di

[Mesa-dev] [PATCH 08/11] st/mesa: add mapping for SYSTEM_VALUE_LOCAL_GROUP_SIZE

gl_LocalGroupSizeARB can be translated into TGSI_SEMANTIC_BLOCK_SIZE which represents the block size in threads. Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/m

[Mesa-dev] [PATCH 4/7] mesa/st: a bit of basic_variant refactoring

Add a helper to initialize the key, and pass the key into the helper that iterates the variants, similar to how it works for vp/fp variants. The 'prog' arg to the helper gets used in a following patch, and is the reason to pass the key into st_get_basic_variant(). Signed-off-by: Rob Clark --- s

[Mesa-dev] [PATCH 04/11] glsl: process local_size_variable input qualifier

This is the new layout qualifier introduced by ARB_compute_variable_group_size which allows to use a variable work group size. Signed-off-by: Samuel Pitoiset --- src/compiler/glsl/ast.h | 5 + src/compiler/glsl/ast_type.cpp | 6 ++ src/compiler/glsl/glsl_pars

[Mesa-dev] [PATCH 6/7] mesa/st: pass prog to st_get_basic_variant()

Needed in a following patch. Signed-off-by: Rob Clark --- src/mesa/state_tracker/st_atom_shader.c | 6 +++--- src/mesa/state_tracker/st_program.c | 16 src/mesa/state_tracker/st_program.h | 2 +- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/mesa

[Mesa-dev] [PATCH 3/7] mesa/st: support lowering multi-planar YUV

Support multi-planar YUV for external EGLImage's (currently just in the dma-buf import path) by lowering to multiple texture fetch's for each plane and CSC in shader. Signed-off-by: Rob Clark --- src/gallium/auxiliary/util/u_inlines.h | 4 +- src/gallium/include/pipe/p_state.h |

[Mesa-dev] [PATCH 7/7] mesa/st: support for YUV in VS/VS/GS/TCS/TEC..

maybe we don't keep these bits? Signed-off-by: Rob Clark --- src/mesa/state_tracker/st_atom_shader.c | 2 ++ src/mesa/state_tracker/st_context.c | 20 +++ src/mesa/state_tracker/st_program.c | 63 ++--- src/mesa/state_tracker/st_program.h | 4 +++

[Mesa-dev] [PATCH 00/11] add support for ARB_compute_variable_group_size

Hi, This series implements ARB_compute_variable_group_size written against GL 4.3. This extension allows to dispatch variable work group size via a new function called glDispatchComputeGroupSizeARB(). Because this extension is pretty similar to ARB_compute_shader, all Gallium drivers which alread

[Mesa-dev] [PATCH 01/11] glapi: add entry points for GL_ARB_compute_variable_group_size

Signed-off-by: Samuel Pitoiset --- .../glapi/gen/ARB_compute_variable_group_size.xml | 25 ++ src/mapi/glapi/gen/Makefile.am | 1 + src/mapi/glapi/gen/gl_API.xml | 2 ++ src/mesa/main/compute.c| 8 +++

[Mesa-dev] [PATCH 2/7] mesa/st: add nir pass to lower tex_src_plane

Signed-off-by: Rob Clark --- Note: the alternative is to fold this logic into nir_lower_tex (ie. make nir_lower_tex support either multiple samplers or the extra nir_tex_src_plane arg. That probably means changing around the order so that nir_lower_tex runs after nir_lower_samplers, but I guess t

[Mesa-dev] [PATCH 1/7] mesa/st: add lowering pass for YUV samplers

Signed-off-by: Rob Clark --- src/mesa/Makefile.sources | 2 + src/mesa/state_tracker/st_tgsi_lower_yuv.c | 447 + src/mesa/state_tracker/st_tgsi_lower_yuv.h | 34 +++ 3 files changed, 483 insertions(+) create mode 100644 src/mesa/state_tracker/st_t

[Mesa-dev] [PATCH 0/7] mesa/st: support for YUV EGLImages

Since original RFC: + fixed up TODOs, review comments, and added support for NIR path as well as TGSI + Change how we pick which samplers to use for the U/V plane(s), to fill in any holes in SamplersUsed + changed CSC constants to match ITU-R BT.601 conversion (to align with what nir_lo

Re: [Mesa-dev] [PATCH 00/23] Remove the hash table in mesa/program

2016-08-23 1:38 GMT+02:00 Timothy Arceri : > Did you get my previous reply about this series breaking a whole bunch > of tests in piglit/cts? It looked like and issue with builtin > functions. > > I attached the results file from jenkins which was rather large so it > didn't get to the list but I a

[Mesa-dev] [PATCH 2/2] i915g: add dma-buf support to i915_drm_buffer_get_handle

The implementation of i915_drm_buffer_get_handle now handles DRM_API_HANDLE_TYPE_FD in the same way that intel_winsys_import_handle does, by calling drm_intel_bo_gem_create_from_prime. Tested by successfully running Chrome's ozone_demo [1] with the ozone-gbm backend on an Intel Pineview M machine.

[Mesa-dev] [PATCH 1/2] gbm/dri2: propagate errors when creating a DMA-BUF fd

Changed dri2_query_image to check the return value of resource_get_handle and return GL_FALSE if an error occurs. Similarly changed gbm_dri_bo_get_fd to check the return value of queryImage and return -1 (an invalid file descriptor) if an error occurs. Updated the comment for gbm_bo_get_fd to say

[Mesa-dev] [PATCH] nir/lower_tex: fix typo with sample_dim

Numeric 2 is actually GLSL_SAMPLER_DIM_3D, which I don't think is what was intended. Signed-off-by: Rob Clark --- src/compiler/nir/nir_lower_tex.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c index a405758

[Mesa-dev] [PATCH] doc: document GALLIUM_DRIVER

v2: Add dot at end of sentence --- docs/envvars.html | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/envvars.html b/docs/envvars.html index 789f5e9..cf57ca5 100644 --- a/docs/envvars.html +++ b/docs/envvars.html @@ -217,6 +217,8 @@ Mesa EGL supports different sets of environment variabl

[Mesa-dev] [PATCH] doc: document GALLIUM_DRIVER

--- docs/envvars.html | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/envvars.html b/docs/envvars.html index 789f5e9..24f4d0d 100644 --- a/docs/envvars.html +++ b/docs/envvars.html @@ -217,6 +217,8 @@ Mesa EGL supports different sets of environment variables. See the disable for

Re: [Mesa-dev] [PATCH] Disable the code that allocates W|X memory on OpenBSD

> From: Emil Velikov > Date: Thu, 8 Sep 2016 18:57:44 +0100 > > On 1 September 2016 at 18:23, Jonathan Gray wrote: > > OpenBSD now has strict W^X enforcement. Processes that violate > > the policy get killed by the kernel. Don't attempt to use > > executable memory on OpenBSD to avoid this. >

Re: [Mesa-dev] swr: RDTSC StopCapture hangs

I’ve seen the bucket hang on stop in the past, but thought this was now a thing of the past. Is there a particular workload that was making this easy to trigger? What workload of glmark2 were you looking at? Watching it run, most of the scenes appear very light in geometry, which would cause

Re: [Mesa-dev] [PATCH v4] i965: Fix calculation of the image height at start level

Reviewed-by: Jason Ekstrand Sorry for ignoring you. :( On Fri, Sep 2, 2016 at 6:04 PM, Antia Puentes wrote: > - Fixes CTS tests: > > * GL44-CTS.shader_image_size.advanced-nonMS-cs-float > * GL44-CTS.shader_image_size.advanced-nonMS-cs-int > * GL44-CTS.shader_image_size.advanced-nonMS-cs-uint >

[Mesa-dev] [Bug 97643] Shader crashes radeon driver and brings the whole system down

https://bugs.freedesktop.org/show_bug.cgi?id=97643 --- Comment #3 from Iaroslav Andrusyak --- still works vo=opengl-hq:user-shaders="/home/pont/CrossBilateral.glsl":cscale=bilinear:dscale=mitchell:tscale=sinc:tscale-radius=2:interpolation-threshold=0.01:scale-radius=3:dither-depth=8:deband-iter

Re: [Mesa-dev] [PATCH 2/2] nir: move tex_instr_remove_src

On Thu, Sep 8, 2016 at 11:21 AM, Jason Ekstrand wrote: > > > On Thu, Sep 8, 2016 at 11:14 AM, Rob Clark wrote: > >> I want to re-use this in a different pass, so move to nir.h >> >> Signed-off-by: Rob Clark >> --- >> src/compiler/nir/nir.h | 16 >> src/compiler/nir/n

Re: [Mesa-dev] [PATCH 2/2] nir: move tex_instr_remove_src

On Thu, Sep 8, 2016 at 11:14 AM, Rob Clark wrote: > I want to re-use this in a different pass, so move to nir.h > > Signed-off-by: Rob Clark > --- > src/compiler/nir/nir.h | 16 > src/compiler/nir/nir_lower_tex.c | 20 ++-- > 2 files changed, 18 insert

[Mesa-dev] [PATCH] EGL: Fix some errors in eglDebugMessageControlKHR.

Check if the attribute list is valid even if the callback is NULL. Set the callback pointer whether or not the attribute list is NULL. --- src/egl/main/eglapi.c | 45 +++-- 1 file changed, 23 insertions(+), 22 deletions(-) diff --git a/src/egl/main/eglapi.

[Mesa-dev] [PATCH 2/2] nir: move tex_instr_remove_src

I want to re-use this in a different pass, so move to nir.h Signed-off-by: Rob Clark --- src/compiler/nir/nir.h | 16 src/compiler/nir/nir_lower_tex.c | 20 ++-- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/src/compiler/nir/nir.h b/s

[Mesa-dev] [PATCH 1/2] nir/lower_tex: remove tex_instr_find_src()

Turns out it already exists.. so don't duplicate it. Signed-off-by: Rob Clark --- src/compiler/nir/nir_lower_tex.c | 17 +++-- 1 file changed, 3 insertions(+), 14 deletions(-) diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c index 93637a3..b570598 100

Re: [Mesa-dev] [PATCH] Disable the code that allocates W|X memory on OpenBSD

On Thu, Sep 08, 2016 at 06:57:44PM +0100, Emil Velikov wrote: > On 1 September 2016 at 18:23, Jonathan Gray wrote: > > OpenBSD now has strict W^X enforcement. Processes that violate > > the policy get killed by the kernel. Don't attempt to use > > executable memory on OpenBSD to avoid this. > >

Re: [Mesa-dev] [PATCH 3/7] EGL: Implement remaining functions from EGL_KHR_debug

On Thu, 2016-09-08 at 11:57 -0600, Kyle Brenneman wrote: > This one has the a bug in it where it doesn't set the callback if  > (attrib_list == NULL), plus the more minor bug where it doesn't check  > for invalid attributes if (callback == NULL). The first one is the same  > bug you noticed in libg

Re: [Mesa-dev] [PATCH 3/7] EGL: Implement remaining functions from EGL_KHR_debug

This one has the a bug in it where it doesn't set the callback if (attrib_list == NULL), plus the more minor bug where it doesn't check for invalid attributes if (callback == NULL). The first one is the same bug you noticed in libglvnd, which got copied over when I adapted it for Mesa. I can fi

Re: [Mesa-dev] [PATCH 14/33] intel/blorp: Add an entrypoint for doing bit-for-bit copies

On Wed, Sep 7, 2016 at 1:16 PM, Jason Ekstrand wrote: > On Sep 7, 2016 10:45 AM, "Nanley Chery" wrote: > > > > On Wed, Sep 07, 2016 at 10:26:25AM -0700, Jason Ekstrand wrote: > > > On Wed, Sep 7, 2016 at 9:50 AM, Jason Ekstrand > wrote: > > > > > > > On Wed, Sep 7, 2016 at 9:36 AM, Nanley Chery

Re: [Mesa-dev] [PATCH] Disable the code that allocates W|X memory on OpenBSD

On 1 September 2016 at 18:23, Jonathan Gray wrote: > OpenBSD now has strict W^X enforcement. Processes that violate > the policy get killed by the kernel. Don't attempt to use > executable memory on OpenBSD to avoid this. > > Patch from Mark Kettenis. > > --- a/src/gallium/auxiliary/rtasm/rtasm

[Mesa-dev] [Bug 97643] Shader crashes radeon driver and brings the whole system down

https://bugs.freedesktop.org/show_bug.cgi?id=97643 --- Comment #2 from Cris --- (In reply to Iaroslav Andrusyak from comment #1) > works fine on 7970 and mesa-git,llvm-git > vo=opengl-hq:user-shaders="/home/pont/CrossBilateral.glsl" > > http://pastebin.com/6TNTa6ry I forgot to mention that fo

[Mesa-dev] [PATCH 2/2] intel/isl: Divide QPitch by 2 for 3-D stencil textures on SKL+

--- src/intel/isl/isl_surface_state.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index f8ea122..22fef3d 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_sta

[Mesa-dev] [PATCH 1/2] isl/state: Don't set QPitch for GEN4_3D surfaces

--- src/intel/isl/isl_surface_state.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index 979e140..f8ea122 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_s

[Mesa-dev] [PATCH 6/7] EGL: Fix some command names for EGL_KHR_debug

From: Kyle Brenneman Change a few EGL entrypoints to call a common internal function instead of forwarding to another entrypoint. If one EGL entrypoint calls another, then the second entrypoint would overwrite the current function name in the _EGLThreadInfo struct. That would cause it to pass th

[Mesa-dev] [PATCH 7/7] egl: Fix DebugMessageControl(callback, NULL)

Treat a null attribute list as meaning "don't change attributes". This is semantically equivalent to a list consisting of just EGL_NONE. Signed-off-by: Adam Jackson --- src/egl/main/eglapi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/egl/main/eglapi.c b/src/egl/main/

[Mesa-dev] [PATCH 2/7] EGL: Implement eglLabelObjectKHR

From: Kyle Brenneman Added a label to the _EGLThreadInfo, _EGLDisplay, and EGLResource structs. Implemented the function eglLabelObjectKHR. Reviewed-by: Adam Jackson --- src/egl/main/eglapi.c | 63 +++ src/egl/main/eglcurrent.c | 9 +++ src/

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