Blorp doesn't handle spilling so we set allow_spilling to false in that
case. The blorp 16x MSAA resolve shader spills in 16-wide but not 8-wide.
This commit makes it so that we fail the 16-wide compile and successfully
fall back to 8-wide instead of just assert-failing when trying to compile
the 16-wide shader.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index d0b55ae..73aa5d2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -5906,6 +5906,11 @@ fs_visitor::allocate_registers(bool allow_spilling)
}
if (!allocated_without_spills) {
+ if (!allow_spilling) {
+ assert(dispatch_width > 8);
+ fail("Failure to register allocate and spilling is not allowed.");
+ }
+
/* We assume that any spilling is worse than just dropping back to
* SIMD8. There's probably actually some intermediate point where
* SIMD16 with a couple of spills is still better.
@@ -5930,8 +5935,6 @@ fs_visitor::allocate_registers(bool allow_spilling)
}
}
- assert(last_scratch == 0 || allow_spilling);
-
/* This must come after all optimization and register allocation, since
* it inserts dead code that happens to have side effects, and it does
* so based on the actual physical registers in use.
--
2.5.0.400.gff86faf
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