[Mesa-dev] [PATCH] i965: Make TCS precompile use the TES primitive mode when available.

If there's a linked TES program, we should just use the actual primitive mode. If not, just guess triangles (as we did before). Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_tcs.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [Bug 92850] Segfault loading War Thunder

https://bugs.freedesktop.org/show_bug.cgi?id=92850 --- Comment #56 from bellamort...@gmail.com --- Still occurs with latest mesa git and llvm. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. ___

Re: [Mesa-dev] mesa: Add MESA_VERBOSE=api for several indexed BindBuffer variants

Hello Jordan, after your last commit I get this: main/bufferobj.c: In function '_mesa_BindBufferRange': main/bufferobj.c:3918:19: warning: format '%d' expects argument of type 'int', but argument 6 has type 'GLintptr' [-Wformat=] _mesa_enum_to_string(target), index, buffer, o

Re: [Mesa-dev] [PATCH] glsl: count attributes for vertex inputs properly.

On Friday, January 1, 2016 1:42:50 PM PST Kenneth Graunke wrote: > On Saturday, December 19, 2015 11:32:41 AM PST Dave Airlie wrote: > > From: Dave Airlie > > > > This function deals with vertex inputs and fragment > > outputs, so we should count the attribute locations > > correctly for the vert

Re: [Mesa-dev] [PATCH] glsl: count attributes for vertex inputs properly.

On Saturday, December 19, 2015 11:32:41 AM PST Dave Airlie wrote: > From: Dave Airlie > > This function deals with vertex inputs and fragment > outputs, so we should count the attribute locations > correctly for the vertex inputs. > > Signed-off-by: Dave Airlie > --- > src/glsl/linker.cpp | 2

Re: [Mesa-dev] [PATCH 1/3] i965: Move 3-src subnr swizzle handling into the vec4 backend.

On Friday, January 1, 2016 2:31:56 PM PST Matt Turner wrote: > On Fri, Jan 1, 2016 at 4:46 AM, Kenneth Graunke wrote: > > While most align16 instructions only support a SubRegNum of 0 or 4 > > (using swizzling to control the other channels), 3-src instructions > > actually support arbitrary SubRe

Re: [Mesa-dev] [shader-db PATCH 1/5] run: create debug contexts

On Friday, January 1, 2016 12:29:06 PM PST Marek Olšák wrote: > On Thu, Dec 31, 2015 at 6:49 PM, Ilia Mirkin wrote: > > On Thu, Dec 31, 2015 at 12:36 PM, Matt Turner wrote: > >> On Thu, Dec 31, 2015 at 12:25 PM, Ilia Mirkin wrote: > >>> On Thu, Dec 31, 2015 at 12:17 PM, Matt Turner wrote: > >

Re: [Mesa-dev] [PATCH] nir: extract out helper macros for running passes

On Wed, Dec 30, 2015 at 9:04 AM, Rob Clark wrote: > On Wed, Dec 30, 2015 at 10:32 AM, Rob Clark wrote: > > diff --git a/src/mesa/drivers/dri/i965/brw_nir.c > b/src/mesa/drivers/dri/i965/brw_nir.c > > index e031173..a8bed70 100644 > > --- a/src/mesa/drivers/dri/i965/brw_nir.c > > +++ b/src/mesa/d

Re: [Mesa-dev] [PATCH 1/3] i965: Move 3-src subnr swizzle handling into the vec4 backend.

On Fri, Jan 1, 2016 at 4:46 AM, Kenneth Graunke wrote: > While most align16 instructions only support a SubRegNum of 0 or 4 > (using swizzling to control the other channels), 3-src instructions > actually support arbitrary SubRegNums. When the RepCtrl bit is set, > we believe it ignores the swizz

Re: [Mesa-dev] [PATCH 1/4] vbo: create a new draw function interface for indirect draws

Thanks! I'd also like to get an ack from someone on the Intel crew as well to make sure this interface will work for them as well. On Fri, Jan 1, 2016 at 6:49 AM, Marek Olšák wrote: > Acked-by: Marek Olšák > > On Thu, Dec 31, 2015 at 8:55 PM, Ilia Mirkin wrote: >> This is optional for now in th

Re: [Mesa-dev] [PATCH 2/6] radeonsi: pass si_context down into si_shader_binary_read

On 31.12.2015 20:14, Marek Olšák wrote: On Thu, Dec 31, 2015 at 3:30 AM, Nicolai Hähnle wrote: From: Nicolai Hähnle This will allow us to send shader debug info via the context's debug callback. Could we please pass struct pipe_debug_callback to si_shader_create instead of si_context? This

Re: [Mesa-dev] [PATCH 0/9] RadeonSI: Some shaders cleanups

On Fri, Jan 1, 2016 at 3:47 PM, wrote: > Well can't disagree with anything in this series and it certainly makes > `si_shader.c' a tiny bit easier to understand for me. > Hopefully not too much fallout with the debug callback patch series as they > will need to be rebased on top of this :| I'll

Re: [Mesa-dev] [PATCH 0/9] RadeonSI: Some shaders cleanups

Well can't disagree with anything in this series and it certainly makes `si_shader.c' a tiny bit easier to understand for me. Hopefully not too much fallout with the debug callback patch series as they will need to be rebased on top of this :| Thus this series is, Reviewed-by: Edward O'Callagh

[Mesa-dev] [PATCH 3/9] radeonsi: pass TGSI processor type to si_shader_binary_read for dumping

From: Marek Olšák the parameter will be used later --- src/gallium/drivers/radeonsi/si_compute.c | 3 ++- src/gallium/drivers/radeonsi/si_shader.c | 5 +++-- src/gallium/drivers/radeonsi/si_shader.h | 3 ++- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/rad

[Mesa-dev] [PATCH 0/9] RadeonSI: Some shaders cleanups

Hi, These are shader cleanups mostly around si_compile_llvm. You may wonder why the "move si_shader_binary_upload out of xxx" patches. They are part of my one-variant-per-shader rework, which needs a lot of restructuring. Besides this, I have 2 more series of cleanup patches, which I will send

[Mesa-dev] [PATCH 2/9] radeonsi: pass TGSI processor type to si_compile_llvm for dumping

From: Marek Olšák the parameter will be used later --- src/gallium/drivers/radeonsi/si_compute.c | 2 +- src/gallium/drivers/radeonsi/si_shader.c | 7 --- src/gallium/drivers/radeonsi/si_shader.h | 2 +- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/rad

[Mesa-dev] [PATCH 1/9] radeonsi: rename shader parameter definitions and variables for more clarity

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 8 ++-- src/gallium/drivers/radeonsi/si_shader.c | 62 +-- src/gallium/drivers/radeonsi/si_shader.h | 16 +++ 3 files changed, 43 insertions(+), 43 deletions(-) diff --git a/src/gallium/

[Mesa-dev] [PATCH 7/9] radeonsi: move si_shader_binary_upload out of si_shader_binary_read

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_compute.c | 1 + src/gallium/drivers/radeonsi/si_shader.c | 15 +++ src/gallium/drivers/radeonsi/si_shader.h | 4 ++-- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c

[Mesa-dev] [PATCH 9/9] radeonsi: remove unused parameter from si_shader_binary_read_config

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_compute.c | 5 ++--- src/gallium/drivers/radeonsi/si_shader.c | 7 +++ src/gallium/drivers/radeonsi/si_shader.h | 5 ++--- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/

[Mesa-dev] [PATCH 6/9] gallium/radeon: dump LLVM module outside of radeon_llvm_compile

From: Marek Olšák --- src/gallium/drivers/r600/r600_llvm.c | 4 +++- src/gallium/drivers/radeon/radeon_llvm_emit.c | 6 ++ src/gallium/drivers/radeon/radeon_llvm_emit.h | 3 +-- src/gallium/drivers/radeonsi/si_shader.c | 8 +--- 4 files changed, 11 insertions(+), 10 deletio

[Mesa-dev] [PATCH 5/9] gallium/radeon: always add +DumpCode to the LLVM target machine for LLVM <= 3.5

From: Marek Olšák It's the same behavior that we use for later LLVM. --- src/gallium/drivers/r600/r600_llvm.c | 2 +- src/gallium/drivers/radeon/radeon_llvm_emit.c | 5 ++--- src/gallium/drivers/radeon/radeon_llvm_emit.h | 2 +- src/gallium/drivers/radeonsi/si_shader.c | 2 +- 4 fi

[Mesa-dev] [PATCH 4/9] gallium/radeon: r600_can_dump_shader should get TGSI processor type directly

From: Marek Olšák --- src/gallium/drivers/r600/r600_shader.c| 6 -- src/gallium/drivers/radeon/r600_pipe_common.c | 8 ++-- src/gallium/drivers/radeon/r600_pipe_common.h | 2 +- src/gallium/drivers/radeonsi/si_shader.c | 9 +++-- 4 files changed, 10 insertions(+), 15 del

[Mesa-dev] [PATCH 8/9] radeonsi: move si_shader_binary_upload out of si_compile_llvm

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_compute.c | 1 + src/gallium/drivers/radeonsi/si_shader.c | 12 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index 939c7c2

Re: [Mesa-dev] [PATCH 4/4] st/mesa: add support for new mesa indirect draw interface

On Thu, Dec 31, 2015 at 8:55 PM, Ilia Mirkin wrote: > This shifts all indirect draws to go through the new function. If the > driver doesn't have support for multi draws, we break those up and > perform N draws. Otherwise, we pass everything through for just a single > draw call. > > Signed-off-by

[Mesa-dev] [PATCH] nv50/ir: Fix scratch allocation size and file

Signed-off-by: Pierre Moreau --- src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp | 4 ++-- src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp b/src

Re: [Mesa-dev] [PATCH 3/4] gallium: add caps to expose support for multi indirect draws

Reviewed-by: Marek Olšák On Thu, Dec 31, 2015 at 8:55 PM, Ilia Mirkin wrote: > Signed-off-by: Ilia Mirkin > --- > src/gallium/docs/source/screen.rst | 5 + > src/gallium/drivers/freedreno/freedreno_screen.c | 2 ++ > src/gallium/drivers/i915/i915_screen.c | 2 ++ >

Re: [Mesa-dev] [PATCH 2/4] gallium: add sufficient draw interface to allow new indirect features

Reviewed-by: Marek Olšák On Thu, Dec 31, 2015 at 8:55 PM, Ilia Mirkin wrote: > This makes it possible to support indirect multidraws as well as having > the number of such draws to come from a separate GPU resource. > > Signed-off-by: Ilia Mirkin > --- > src/gallium/include/pipe/p_state.h | 11

Re: [Mesa-dev] [PATCH 1/4] vbo: create a new draw function interface for indirect draws

Acked-by: Marek Olšák On Thu, Dec 31, 2015 at 8:55 PM, Ilia Mirkin wrote: > This is optional for now in the transition period, but optimally all > backends that support indirect draws would switch over to it and we can > remove the support for indirect in the "regular" draw function. > > This sh

Re: [Mesa-dev] [PATCH] st/mesa: sort extensions enablement array

Reviewed-by: Marek Olšák Marek On Thu, Dec 31, 2015 at 11:36 PM, Ilia Mirkin wrote: > Signed-off-by: Ilia Mirkin > --- > src/mesa/state_tracker/st_extensions.c | 22 +++--- > 1 file changed, 11 insertions(+), 11 deletions(-) > > diff --git a/src/mesa/state_tracker/st_extension

Re: [Mesa-dev] [shader-db PATCH 2/5] si-report.py: speed up and adjust to debug message reporting, allowing multi-threaded runs

On Thu, Dec 31, 2015 at 3:32 AM, Nicolai Hähnle wrote: > Benefit from recent changes to Mesa master which allows correct reporting > in multi-threaded runs, and generally more robust reporting when comparing > different runs, e.g. that differ in the set of tests that were run. > > Parsing also bec

Re: [Mesa-dev] [shader-db PATCH 1/5] run: create debug contexts

On Thu, Dec 31, 2015 at 6:49 PM, Ilia Mirkin wrote: > On Thu, Dec 31, 2015 at 12:36 PM, Matt Turner wrote: >> On Thu, Dec 31, 2015 at 12:25 PM, Ilia Mirkin wrote: >>> On Thu, Dec 31, 2015 at 12:17 PM, Matt Turner wrote: On Thu, Dec 31, 2015 at 9:45 AM, Ilia Mirkin wrote: > On Dec 31,

Re: [Mesa-dev] [PATCH 1/6] gallium/radeon: implement set_debug_callback

If the context pointer is replaced by struct pipe_debug_callback* in the shader translation code (as I noted at patch 2), patches 1-5 are: Reviewed-by: Marek Olšák Marek On Thu, Dec 31, 2015 at 3:30 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > --- > src/gallium/drivers/radeon/r600_pi

Re: [Mesa-dev] [PATCH 6/6] gallium/radeon: cleanup dump parameters to radeon_llvm_compile

Sorry, but I think this can be dropped. I have a bigger cleanup of these functions. I should send that soon. Marek On Thu, Dec 31, 2015 at 3:30 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > Now that the functions gets a context pointer, it can determine IR and ASM > dumping by itself. >

[Mesa-dev] [PATCH 2/3] i965: Use LOAD_PAYLOAD for SIMD8 TES input loads, not MOV.

We need a MOV to replicate g0.0<0,1,0> to all 8 channels. Since the message payload is a single register, MOV seemed more sensible than LOAD_PAYLOAD. However, MOV cannot be CSE'd, while LOAD_PAYLOAD can. All input loads can use the same header - we don't need to re-expand g0 every time. CSE acc

[Mesa-dev] [PATCH 1/3] i965: Move 3-src subnr swizzle handling into the vec4 backend.

While most align16 instructions only support a SubRegNum of 0 or 4 (using swizzling to control the other channels), 3-src instructions actually support arbitrary SubRegNums. When the RepCtrl bit is set, we believe it ignores the swizzle and uses the equivalent of a <0,1,0> region from the subnr.

[Mesa-dev] [PATCH 3/3] i965: Push most TES inputs in SIMD8 mode.

Using the push model for inputs is much more efficient than pulling inputs - the hardware can simply copy a large chunk into URB registers at thread creation time, rather than having the thread send messages to request data from the L3 cache. Unfortunately, it's possible to have more TES inputs th