On 20/02/2015 02:12, Laura Ekstrand wrote:
On Wed, Feb 18, 2015 at 7:40 AM, Martin Peres
mailto:martin.pe...@linux.intel.com>>
wrote:
On 12/02/15 04:05, Laura Ekstrand wrote:
v2: review from Ian Romanick
- Fix space in ARB_direct_state_access.xml.
- Rem
On 20/02/2015 02:15, Laura Ekstrand wrote:
This is NamedBufferStorage, not NamedBufferData. The storage function
uses a bitfield instead of an enum.
Oops, sorry. I was trying to match these patches with their relative
piglit tests and as the order is not always the same, I must have got
confu
On Tue, Feb 17, 2015 at 11:46 AM, Matt Turner wrote:
> total instructions in shared programs: 8013221 -> 8010869 (-0.03%)
> instructions in affected programs: 475925 -> 473573 (-0.49%)
> helped:2350
> ---
Patches 1 and 3 have been reviewed, but I'm this one has
On 18/02/2015 20:10, Ian Romanick wrote:
On 02/17/2015 07:59 AM, Martin Peres wrote:
Hey Laura,
Thanks for this code. I'll be sending reviews throughout the week :)
On 12/02/15 04:05, Laura Ekstrand wrote:
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index 336feff..ce6f446
On Thu, Feb 19, 2015 at 11:25:56PM -0800, Jordan Justen wrote:
> On 2015-02-19 21:40:37, Ben Widawsky wrote:
> > On Thu, Feb 19, 2015 at 03:42:05PM -0800, Jordan Justen wrote:
> > > For fragment programs, we pull this mask from the payload header. The same
> > > mask doesn't exist for compute shade
On Fri, Feb 20, 2015 at 08:21:25AM +0100, Iago Toral Quiroga wrote:
> In gen6 we need to compute the primitive count in the generated GS program.
> The current implementation only counts full primitives, that is, if the
> output primitive type is a triangle strip, it won't count individual
> triang
On 2015-02-19 21:40:37, Ben Widawsky wrote:
> On Thu, Feb 19, 2015 at 03:42:05PM -0800, Jordan Justen wrote:
> > For fragment programs, we pull this mask from the payload header. The same
> > mask doesn't exist for compute shaders, so we set all bits to enabled.
> >
> > Note: this mask is ANDed wi
In gen6 we need to compute the primitive count in the generated GS program.
The current implementation only counts full primitives, that is, if the
output primitive type is a triangle strip, it won't count individual
triangles in the strip, only complete strips.
If we want to count basic primitive
On Thursday 19 February 2015 11:39:13 Ian Romanick wrote:
> On 12/09/2014 02:52 AM, Eduardo Lima Mitev wrote:
> > From: Samuel Iglesias Gonsalvez
> >
> > GLSL 1.50 and GLSL 4.40 specs, they both say the same in
> > "Interface Blocks" section:
> >
> > "If no optional qualifier is used in a member
On Wednesday 18 February 2015 11:51:45 Matt Turner wrote:
> On Tue, Dec 9, 2014 at 2:52 AM, Eduardo Lima Mitev wrote:
> > From: Samuel Iglesias Gonsalvez
> >
> > GLSL 1.50 and GLSL 4.40 specs, they both say the same in
> > "Interface Blocks" section:
> >
> > "If no optional qualifier is used in
On Thu, Feb 19, 2015 at 11:01 PM, Connor Abbott wrote:
> I agree with Ken that the regressions are small enough, and it seems
> they're mostly stuff we can prevent by being smarter when doing the
> sel peephole, so it seems like the cleanup that will probably help
> other passes is worth it.
So,
I agree with Ken that the regressions are small enough, and it seems
they're mostly stuff we can prevent by being smarter when doing the
sel peephole, so it seems like the cleanup that will probably help
other passes is worth it.
Reviewed-by: Connor Abbott
On Fri, Feb 20, 2015 at 1:03 AM, Jason
When under dispatch_width=16 the previous code would allocate 2 registers for
the payload when only one is needed. This manifested itself through bugs on SKL
which needs to mess with this instruction.
Ken though this might impact shader-db, but apparently it doesn't
Cc: Kenneth Graunke
Bugzilla:
On Thursday, February 19, 2015 10:03:15 PM Jason Ekstrand wrote:
> We were already do this for ALU operations but we haven't for non-ALU
> operations. This changes that.
>
> total NIR instructions in shared programs: 2039883 -> 2022338 (-0.86%)
> NIR instructions in affected programs: 1768850
On Thu, Feb 19, 2015 at 3:42 PM, Jordan Justen
wrote:
> For fragment programs, we pull this mask from the payload header. The same
> mask doesn't exist for compute shaders, so we set all bits to enabled.
>
> Note: this mask is ANDed with the execution mask, so some channels may not end
> up issuin
We were already do this for ALU operations but we haven't for non-ALU
operations. This changes that.
total NIR instructions in shared programs: 2039883 -> 2022338 (-0.86%)
NIR instructions in affected programs: 1768850 -> 1751305 (-0.99%)
helped:14244
HURT:
On Thu, Feb 19, 2015 at 03:42:05PM -0800, Jordan Justen wrote:
> For fragment programs, we pull this mask from the payload header. The same
> mask doesn't exist for compute shaders, so we set all bits to enabled.
>
> Note: this mask is ANDed with the execution mask, so some channels may not end
>
On Thu, Feb 19, 2015 at 11:54 PM, Dave Airlie wrote:
> On 20 February 2015 at 14:46, Ilia Mirkin wrote:
>> Missed a few drivers in the earlier changes, this should fix up all the
>> ones that print unknown caps or don't have a default statement.
>>
>
>
>> +++ b/src/gallium/drivers/vc4/vc4_screen.
On 20 February 2015 at 14:46, Ilia Mirkin wrote:
> Missed a few drivers in the earlier changes, this should fix up all the
> ones that print unknown caps or don't have a default statement.
>
> +++ b/src/gallium/drivers/vc4/vc4_screen.c
> @@ -318,6 +318,10 @@ vc4_screen_get_shader_param(struct pi
Missed a few drivers in the earlier changes, this should fix up all the
ones that print unknown caps or don't have a default statement.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/freedreno_screen.c | 2 ++
src/gallium/drivers/i915/i915_screen.c | 4
src/gallium/d
From: Dave Airlie
I'm not sure we really care about this, but we need to
write better support if we do. For now just disable it.
piglit test:
tests/spec/arb_gpu_shader_fp64/execution/vs-out-fs-in-double-2.shader_test
v2: move code down below to avoid getting array type.
Signed-off-by: Dave Ai
On 20 February 2015 at 12:49, Ilia Mirkin wrote:
> On Thu, Feb 19, 2015 at 9:43 PM, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> I'm not sure we really care about this, but we need to
>> write better support if we do. For now just disable it.
>>
>> piglit test:
>> tests/spec/arb_gpu_shader_fp6
From: Dave Airlie
This hack for fixing gl_FragDepth apparantly caused a GLSL shader
outputting a single double to try and output a dvec4, but we hadn't
assigned outputs for the secondary bit.
This avoids going into the hack code for scalar doubles.
Signed-off-by: Dave Airlie
---
src/mesa/stat
From: Marius Predut
For 32-bit builds, floating point operations use x86 FPU registers,
not SSE registers. If we're actually storing an integer in a float
variable, the value might get modified when written to memory. This
patch changes the VBO code to use the fi_type (float/int union) to
store
https://bugs.freedesktop.org/show_bug.cgi?id=89238
--- Comment #2 from Connor Abbott ---
See this thread:
http://lists.freedesktop.org/archives/mesa-dev/2015-February/077137.html
looks like there are a few (mostly trivial) patches needed.
--
You are receiving this mail because:
You are the QA
On Fri, 20 Feb 2015 01:54:03 +0100, Dave Airlie wrote:
From: Dave Airlie
Only a subset of AMD GPUs supported by r600g support doubles,
CAYMAN and CYPRESS are probably all we'll try and support, however
I don't have a CYPRESS so ignore that for now.
This disables SB support for doubles, as we
On Thu, Feb 19, 2015 at 9:43 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> I'm not sure we really care about this, but we need to
> write better support if we do. For now just disable it.
>
> piglit test:
> tests/spec/arb_gpu_shader_fp64/execution/vs-out-fs-in-double-2.shader_test
>
> Signed-of
From: Dave Airlie
I'm not sure we really care about this, but we need to
write better support if we do. For now just disable it.
piglit test:
tests/spec/arb_gpu_shader_fp64/execution/vs-out-fs-in-double-2.shader_test
Signed-off-by: Dave Airlie
---
src/glsl/lower_packed_varyings.cpp | 3 +++
https://bugs.freedesktop.org/show_bug.cgi?id=89238
Jason Ekstrand changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #1 from Jason Ekst
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 8546ac8..686d892 100644
--- a/src/gallium/dr
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
index 944ceb
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 +
.../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 4 +-
.../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 4 +-
.../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 4 +-
.../nouveau/codegen/nv50_ir
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index 817ceb8..7d4a859 100644
v2: drop DDIV
Signed-off-by: Ilia Mirkin
---
.../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 196 +
1 file changed, 196 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
inde
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
index 9f4c435..73a65fa 100644
---
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
index 73a65fa.
Because the TGSI interface creates merges for each instruction source
and then splits them back out, there are a lot of unnecessary
merge/split pairs which do essentially nothing. The various modifier/etc
propagation doesn't know how to walk though those, so just remove them
when they're unnecessar
Signed-off-by: Ilia Mirkin
---
.../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp| 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.
Signed-off-by: Ilia Mirkin
---
.../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 80 +-
1 file changed, 77 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
in
Signed-off-by: Ilia Mirkin
---
.../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 66 +-
1 file changed, 63 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
inde
https://bugs.freedesktop.org/show_bug.cgi?id=89238
Bug ID: 89238
Summary: "nir/nir.h", line 643: Error: In this declaration
"src" is of an incomplete type "nir_alu_src[]".
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
On Thu, Feb 19, 2015 at 7:54 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> This allows drivers to work out if a shader contains any
> double opcodes easily.
>
> Signed-off-by: Dave Airlie
> ---
> src/gallium/auxiliary/tgsi/tgsi_scan.c | 4
> src/gallium/auxiliary/tgsi/tgsi_scan.h | 2 +-
>
From: Dave Airlie
Only a subset of AMD GPUs supported by r600g support doubles,
CAYMAN and CYPRESS are probably all we'll try and support, however
I don't have a CYPRESS so ignore that for now.
This disables SB support for doubles, as we think we need to
make the scheduler smarter to introduce d
From: Dave Airlie
This allows drivers to work out if a shader contains any
double opcodes easily.
Signed-off-by: Dave Airlie
---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 4
src/gallium/auxiliary/tgsi/tgsi_scan.h | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/gal
This just implements FP64 on cayman but disables the sb compiler
for now.
Dave.
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On Thu, Feb 5, 2015 at 4:02 AM, Ian Romanick wrote:
> On 01/24/2015 05:46 AM, Vinson Lee wrote:
>> Fix build error.
>>
>> CCLD libGL.la
>> libglapi.a(glapi_libglapi_la-glapi_gentable.o): In function
>> `__glapi_gentable_NoOp':
>> glapi_gentable.c:76: undefined reference to `backtrace'
>>
>>
I'm still a little pensive. But
Reviewed-by: Jason Ekstrand
Now for a little aside. I have come to the conclusion that I made a grave
mistake when I did the LOAD_PAYLOAD stuff. In retrospect, I should have
just subclassed fs_inst for load_payload. The problem is that we need to
snag a bunch
On 20 February 2015 at 09:52, Ilia Mirkin wrote:
> With these features, nvc0 can implement fp64 fairly easily (will send
> patches after these are in). The st/mesa changes depend on the fp64
> enablement page Dave just sent out.
Apart from the style nitpick and the using 0.0 in the docs I mention
This is NamedBufferStorage, not NamedBufferData. The storage function uses
a bitfield instead of an enum.
On Wed, Feb 18, 2015 at 7:04 AM, Martin Peres
wrote:
> On 12/02/15 04:05, Laura Ekstrand wrote:
>
>> ---
>> src/mapi/glapi/gen/ARB_direct_state_access.xml | 7 +++
>> src/mesa/main/buff
On Wed, Feb 18, 2015 at 7:40 AM, Martin Peres
wrote:
>
> On 12/02/15 04:05, Laura Ekstrand wrote:
>
>> v2: review from Ian Romanick
>> - Fix space in ARB_direct_state_access.xml.
>> - Remove "_mesa" from the name of buffer_data static fallback.
>> - Restore VBO_DEBUG and BOUNDS_CHECK.
https://bugs.freedesktop.org/show_bug.cgi?id=89199
--- Comment #4 from Vinson Lee ---
$ gcc --version
gcc (NetBSD nb2 20110806) 4.5.3
Copyright (C) 2010 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY
With these features, nvc0 can implement fp64 fairly easily (will send
patches after these are in). The st/mesa changes depend on the fp64
enablement page Dave just sent out.
Ilia Mirkin (6):
gallium: add some more double opcodes to avoid unnecessary lowering
gallium: add a cap to enable double
Signed-off-by: Ilia Mirkin
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index e170217..4d91ca6 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
Signed-off-by: Ilia Mirkin
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 63b779d..e170217 100644
--- a/src/mesa/state_
Signed-off-by: Ilia Mirkin
---
src/gallium/auxiliary/gallivm/lp_bld_limits.h | 1 +
src/gallium/auxiliary/tgsi/tgsi_exec.h | 2 ++
src/gallium/docs/source/screen.rst | 2 ++
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 4
src/gallium/drivers/r600/r600_pipe.c
Signed-off-by: Ilia Mirkin
---
src/gallium/auxiliary/tgsi/tgsi_info.c | 5
src/gallium/docs/source/tgsi.rst | 39 ++
src/gallium/include/pipe/p_shader_tokens.h | 7 +-
3 files changed, 50 insertions(+), 1 deletion(-)
diff --git a/src/gallium/a
Not having SQRT is assumed to tacitly mean that RSQ is available.
Signed-off-by: Ilia Mirkin
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgs
Signed-off-by: Ilia Mirkin
---
src/gallium/auxiliary/gallivm/lp_bld_limits.h | 1 +
src/gallium/auxiliary/tgsi/tgsi_exec.h | 1 +
src/gallium/docs/source/screen.rst | 2 ++
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 ++
src/gallium/drivers/r600/r600_pipe.c |
Yes, please.
Reviewed-by: Ian Romanick
On 02/19/2015 03:38 PM, Dave Airlie wrote:
> This just fills in some blanks to avoid warnings in the i965 driver.
>
> Signed-off-by: Dave Airlie
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
> src/mesa/drivers/dri/i965/brw_fs_c
On 02/19/2015 03:38 PM, Matt Turner wrote:
> On Thu, Feb 19, 2015 at 3:31 PM, Ian Romanick wrote:
>> On 02/10/2015 11:09 AM, Matt Turner wrote:
>>> We were special casing OPCODE_END but no other instructions that have no
>>> destination, like OPCODE_KIL, leading us to emitting MOVs with null
>>> d
Looks reasonable, if it's going to be a while before an i965 backend is ready..
Reviewed-by: Chris Forbes
On Fri, Feb 20, 2015 at 12:38 PM, Dave Airlie wrote:
> This just fills in some blanks to avoid warnings in the i965 driver.
>
> Signed-off-by: Dave Airlie
> ---
> src/mesa/drivers/dri/i96
For fragment programs, we pull this mask from the payload header. The same
mask doesn't exist for compute shaders, so we set all bits to enabled.
Note: this mask is ANDed with the execution mask, so some channels may not end
up issuing the atomic operation.
Signed-off-by: Jordan Justen
Cc: Ben W
On Thu, Feb 19, 2015 at 6:09 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> v2 : add double to int/unsigned conversion
> v3: handle fp64 consts better
> v4: use DRSQ
> v4.1: add d2b
> v4.2: drop DDIV
>
> v5: split out some prep patches.
> v5.1: add some comments.
> v5.2: more comments
>
> v6: sim
FWIW, this patch is
Reviewed-by: Ian Romanick
On 02/11/2015 06:17 PM, Matt Turner wrote:
> Previously we were using a B/UB source in an Align16 instruction, which
> is illegal. It for some reason works on all platforms, except Broadwell.
>
> Cc: "10.5"
> Bugzilla: https://bugs.freedesktop.org/
On Thu, Feb 19, 2015 at 3:35 PM, Ian Romanick wrote:
> Assuming that my assumption / recollection that blorp is only for GEN6+,
> this patch is
Indeed, that's correct.
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This just fills in some blanks to avoid warnings in the i965 driver.
Signed-off-by: Dave Airlie
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 13 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
On Thu, Feb 19, 2015 at 3:31 PM, Ian Romanick wrote:
> On 02/10/2015 11:09 AM, Matt Turner wrote:
>> We were special casing OPCODE_END but no other instructions that have no
>> destination, like OPCODE_KIL, leading us to emitting MOVs with null
>> destinations.
>
> Should we (or do we somehow alre
Assuming that my assumption / recollection that blorp is only for GEN6+,
this patch is
Reviewed-by: Ian Romanick
On 02/10/2015 11:10 AM, Matt Turner wrote:
> Low hanging fruit: cuts a couple of instructions.
> ---
> src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 6 ++
> src/mesa/drivers/dr
On 02/19/2015 03:29 PM, Matt Turner wrote:
> On Thu, Feb 19, 2015 at 3:25 PM, Ian Romanick wrote:
>> On 02/11/2015 02:54 PM, Matt Turner wrote:
>>> This is safer and matches the conditional_mod propagation pass.
>>>
>>> Cc:
>>> ---
>>> .../dri/i965/brw_fs_saturate_propagation.cpp | 8 ++--
This patch is
Reviewed-by: Ian Romanick
On 02/10/2015 11:09 AM, Matt Turner wrote:
> Each emit_cond_mov() emits a CMP of its first to arguments using the
> specified conditional mod, followed by a predicated MOV of the fifth
> argument into the fourth. In all four cases here, it was just
> imple
This patch is
Reviewed-by: Ian Romanick
On 02/10/2015 11:09 AM, Matt Turner wrote:
> The docs specifically call out SEL with .l and .ge as the
> implementations of MIN and MAX respectively. Among other things, SEL
> with these conditional mods are commutative.
> ---
> src/mesa/drivers/dri/i965/
On 02/10/2015 11:09 AM, Matt Turner wrote:
> We were special casing OPCODE_END but no other instructions that have no
> destination, like OPCODE_KIL, leading us to emitting MOVs with null
> destinations.
Should we (or do we somehow already) handle instructions with null
destinations? So...
On Thu, Feb 19, 2015 at 3:25 PM, Ian Romanick wrote:
> On 02/11/2015 02:54 PM, Matt Turner wrote:
>> This is safer and matches the conditional_mod propagation pass.
>>
>> Cc:
>> ---
>> .../dri/i965/brw_fs_saturate_propagation.cpp | 8 ++---
>> .../dri/i965/test_fs_saturate_propagation.cpp
This patch is
Reviewed-by: Ian Romanick
On 02/11/2015 02:54 PM, Matt Turner wrote:
> The saturate propagation pass recognizes that the second instruction
> below does not interfere with an attempt to propagate the saturate
> modifier from instruction 3 to 1.
>
> 1: add(8) dst0 src0 src
On 02/11/2015 02:54 PM, Matt Turner wrote:
> This is safer and matches the conditional_mod propagation pass.
>
> Cc:
> ---
> .../dri/i965/brw_fs_saturate_propagation.cpp | 8 ++---
> .../dri/i965/test_fs_saturate_propagation.cpp | 40
> ++
> 2 files changed, 44 i
This patch is
Reviewed-by: Ian Romanick
On 02/11/2015 02:54 PM, Matt Turner wrote:
> Cc:
> ---
> src/mesa/drivers/dri/i965/Makefile.am | 7 +
> .../dri/i965/test_fs_saturate_propagation.cpp | 355
> +
> 2 files changed, 362 insertions(+)
> create mode
From: Dave Airlie
v2 : add double to int/unsigned conversion
v3: handle fp64 consts better
v4: use DRSQ
v4.1: add d2b
v4.2: drop DDIV
v5: split out some prep patches.
v5.1: add some comments.
v5.2: more comments
v6: simplify down the double instruction
generation loop.
v7: Merge Ilia's two
Correctly set _BaseFormat field when creating a gl_renderbuffer
with EGLImage storage.
Signed-off-by: Frank Henigman
Reviewed-by: Stéphane Marchesin
---
src/mesa/drivers/dri/i915/intel_fbo.c | 3 +--
src/mesa/drivers/dri/i965/intel_fbo.c | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
On Thu, Feb 19, 2015 at 5:47 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> It looks like no hw does div anyways, so we should just
> lower at the GLSL level.
Sounds like radeonsi has helpers for DDIV, but they can work this out
when they add support in mesa. Like not using DIV_TO_MUL_RCP loweri
From: Dave Airlie
It looks like no hw does div anyways, so we should just
lower at the GLSL level.
Signed-off-by: Dave Airlie
---
src/glsl/lower_instructions.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/glsl/lower_instructions.cpp b/src/glsl/lower_instructi
On 02/19/2015 02:55 PM, Ilia Mirkin wrote:
On Wed, Feb 18, 2015 at 1:20 PM, Brian Paul wrote:
Use pipe_sampler_view_reference() instead of ordinary assignment.
Also add a new sanity check assertion.
Fixes piglit gl-1.0-drawpixels-color-index test crash. But note
that the test still fails.
F
On Thu, Feb 19, 2015 at 4:53 PM, Dave Airlie wrote:
> This patch adds support for a set of double opcodes
> to TGSI. It is an update of work done originally
> by Michal Krol on the gallium-double-opcodes branch.
>
> The opcodes have a hint where they came from in the
> header file.
>
> v2: add uns
On Wed, Feb 18, 2015 at 9:00 PM, Kenneth Graunke wrote:
> Every VS system value has type D. We can always add this back if that
> changes, but for now, it's extra typing.
>
> Signed-off-by: Kenneth Graunke
> ---
> src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
> src/mesa/drivers/dri/i965/
On Wed, Feb 18, 2015 at 1:20 PM, Brian Paul wrote:
> Use pipe_sampler_view_reference() instead of ordinary assignment.
> Also add a new sanity check assertion.
>
> Fixes piglit gl-1.0-drawpixels-color-index test crash. But note
> that the test still fails.
Fails on nvc0 as well, for the record.
Reviewed-by: Jason Ekstrand
On Thu, Feb 19, 2015 at 12:51 PM, Brian Paul wrote:
> To silence compiler warning about unhandled switch case.
> v2: move GLSL_TYPE_DOUBLE to the "not reached" section, per Ilia.
> ---
> src/glsl/nir/nir_lower_io.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --
On Thu, Feb 19, 2015 at 1:25 PM, Francisco Jerez
wrote:
> Jason Ekstrand writes:
>
> > On Thu, Feb 19, 2015 at 12:13 PM, Francisco Jerez >
> > wrote:
> >
> >> Jason Ekstrand writes:
> >>
> >> > On Fri, Feb 6, 2015 at 4:01 PM, Francisco Jerez <
> curroje...@riseup.net>
> >> > wrote:
> >> >
> >>
This patch adds support for a set of double opcodes
to TGSI. It is an update of work done originally
by Michal Krol on the gallium-double-opcodes branch.
The opcodes have a hint where they came from in the
header file.
v2: add unsigned/int <-> double
v2.1: update docs.
v3: add DRSQ (Glenn), fix
I've addressed most of these,
>>
>> + /* double modifiers handled by caller */
>> + if (dtype)
>> + return;
>
> Should the below code just get moved to fetch_source? Or does it rely
> on local args which makes that a pain? If it's not too hard, I think
> it'd be a lot cleaner / clearer th
Jason Ekstrand writes:
> On Thu, Feb 19, 2015 at 12:13 PM, Francisco Jerez
> wrote:
>
>> Jason Ekstrand writes:
>>
>> > On Fri, Feb 6, 2015 at 4:01 PM, Francisco Jerez
>> > wrote:
>> >
>> >> Hey Matt,
>> >>
>> >> Matt Turner writes:
>> >>
>> >> > On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jere
Ping.
On 02/18/2015 11:20 AM, Brian Paul wrote:
Use pipe_sampler_view_reference() instead of ordinary assignment.
Also add a new sanity check assertion.
Fixes piglit gl-1.0-drawpixels-color-index test crash. But note
that the test still fails.
Cc: "10.4, 10.5"
---
src/mesa/state_tracker/st
On Thu, Feb 19, 2015 at 11:57 AM, Timothy Arceri wrote:
> ---
> src/glsl/ir.h | 7 ++-
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
> index a0f48b2..9c60b07 100644
> --- a/src/glsl/ir.h
> +++ b/src/glsl/ir.h
> @@ -450,11 +450,8 @@ public:
>
On Thu, Feb 19, 2015 at 12:13 PM, Francisco Jerez
wrote:
> Jason Ekstrand writes:
>
> > On Fri, Feb 6, 2015 at 4:01 PM, Francisco Jerez
> > wrote:
> >
> >> Hey Matt,
> >>
> >> Matt Turner writes:
> >>
> >> > On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez <
> curroje...@riseup.net>
> >> wrote:
Series is Reviewed-by: Ilia Mirkin
On Thu, Feb 19, 2015 at 3:51 PM, Brian Paul wrote:
> To silence compiler warning about unhandled switch case.
> v2: move GLSL_TYPE_DOUBLE to the "not reached" section, per Ilia.
> ---
> src/glsl/nir/nir_lower_io.c | 1 +
> 1 file changed, 1 insertion(+)
>
> di
To silence compiler warnings about unhandled switch cases.
v2: move GSL_TYPE_DOUBLE case to the "Invalid type in type_size" section,
per Ilia.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 12
1 file changed, 12 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
To silence compiler warning about unhandled switch case.
v2: move GLSL_TYPE_DOUBLE to the "not reached" section, per Ilia.
---
src/glsl/nir/nir_lower_io.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/nir/nir_lower_io.c b/src/glsl/nir/nir_lower_io.c
index ddbc249..207f8da 100644
---
On Thu, Feb 19, 2015 at 11:27 AM, Brian Paul wrote:
> To silence compiler warnings about unhandled switch cases.
> ---
> src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> b/src/mesa/state
Jason Ekstrand writes:
> On Fri, Feb 6, 2015 at 4:01 PM, Francisco Jerez
> wrote:
>
>> Hey Matt,
>>
>> Matt Turner writes:
>>
>> > On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez
>> wrote:
>> >> MRFs cannot be read from anyway so they cannot possibly be a valid
>> >> source of LOAD_PAYLOAD.
>>
---
src/glsl/ir.h | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index a0f48b2..9c60b07 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -450,11 +450,8 @@ public:
*/
inline bool is_interface_instance() const
{
- const gls
On 02/19/2015 11:43 AM, Ian Romanick wrote:
> On 02/18/2015 09:00 PM, Kenneth Graunke wrote:
>> This is similar to _mesa_shader_stage_to_string(), but returns "VS"
>> instead of "vertex".
>>
>> Signed-off-by: Kenneth Graunke
>> ---
>> src/glsl/glsl_parser_extras.cpp | 17 +
>> src
On 02/18/2015 09:00 PM, Kenneth Graunke wrote:
> This is similar to _mesa_shader_stage_to_string(), but returns "VS"
> instead of "vertex".
>
> Signed-off-by: Kenneth Graunke
> ---
> src/glsl/glsl_parser_extras.cpp | 17 +
> src/glsl/glsl_parser_extras.h | 3 +++
> 2 files cha
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