[Mesa-dev] [Bug 80848] [dri3] Building mesa fails with dri3 enabled

https://bugs.freedesktop.org/show_bug.cgi?id=80848 --- Comment #21 from Tapani Pälli --- (In reply to comment #20) > (In reply to comment #19) > > (In reply to comment #18) > > > I had cross-compilation problems on Ubuntu (building 32bit Mesa on 64bit > > > environment) and my problems went away

Re: [Mesa-dev] [PATCH] targets/dri: resolve the scons build

Am 02.08.2014 05:49, schrieb Emil Velikov: > With earlier commit we've conditionally enabled/added the kms_dri target > for automake builds. Unfortunately the we forgot to add the appropriate > define in the scons build, resulting in a broken library due to the > undefined symbol 'kms_swrast_create

[Mesa-dev] sampler objects and texture rectangles

I've discovered by accident that the mesa state tracker is trying to use REPEAT wrap mode with texture rectangles - this happens with piglit tex-miplevel-selection texture() 2DRectShadow -fbo -auto for instance though I guess others as well. Needless to say the test fails in llvmpipe because I was

Re: [Mesa-dev] [PATCH] mesa: guard better when building with sse4.1 optimisations

On 01/08/14 17:06, Emil Velikov wrote: > When the compiler is not capable/does not accept -msse4.1 while the target > has the instruction set we'll blow up as _mesa_streaming_load_memcpy is > going to be undefined. > > To make sure that never happens, wrap the runtime cpu check+caller in an > ifde

[Mesa-dev] [PATCH] targets/dri: resolve the scons build

With earlier commit we've conditionally enabled/added the kms_dri target for automake builds. Unfortunately the we forgot to add the appropriate define in the scons build, resulting in a broken library due to the undefined symbol 'kms_swrast_create_screen'. Reported-by: Roland Scheidegger Signed-

[Mesa-dev] [Bug 79039] [TRACKER] Mesa 10.2 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=79039 Bug 79039 depends on bug 78466, which changed state. Bug 78466 Summary: [ILK Bisected]Piglit glean/makeCurrent fails https://bugs.freedesktop.org/show_bug.cgi?id=78466 What|Removed |Added --

Re: [Mesa-dev] [PATCH v2 3/4] ra: consider all spillable nodes for spilling

On Wednesday, July 30, 2014 10:50:59 PM Eric Anholt wrote: > Connor Abbott writes: > > > Before, we would only consider nodes for spilling if they were > > optimistically pushed onto the stack. But the logic for this was > > complicated, and duplicated some things; also, we might want to spill >

[Mesa-dev] [PATCH 3/3] gallium/docs: Document TEX2/TXL2/TXB2 instructions and fix up other tex doc

From: Roland Scheidegger Add documentation for TEX2/TXL2/TXB2 tgsi opcodes. Also, the texture opcode documentation wasn't very accurate so fix this up a bit. --- src/gallium/docs/source/tgsi.rst | 127 +++ 1 file changed, 102 insertions(+), 25 deletions(-) di

[Mesa-dev] [PATCH 2/3] gallivm: fix cube map array (and cube map shadow with bias) handling

From: Roland Scheidegger In particular need to handle TEX2/TXB2/TXL2 opcodes (cube map shadow could already have used TXB2 which clearly couldn't have worked, despite that no piglit change), and add a bunch more switch cases. The actual sampling code still won't handle cube map arrays. --- src/g

[Mesa-dev] [PATCH 1/3] llvmpipe: implement support for cube map arrays

From: Roland Scheidegger This just covers the resource side of things, not the actual sampling. Here things are trivial as cube map arrays are identical to 2d arrays in all respects. --- src/gallium/drivers/llvmpipe/lp_screen.c| 3 ++- src/gallium/drivers/llvmpipe/lp_setup.c | 6

[Mesa-dev] [PATCH 5/5] mesa: Fold _mesa_uniform_merge_location_offset into its only caller

From: Ian Romanick Also delete the comment before that function. Everything in that comment was either stale, wrong, or captured elsewhere. Signed-off-by: Ian Romanick --- src/mesa/main/uniform_query.cpp | 4 +--- src/mesa/main/uniforms.c| 3 ++- src/mesa/main/uniforms.h| 44

[Mesa-dev] [PATCH 3/5] glsl_to_tgsi: Delete unused function set_uniform_initializer

From: Ian Romanick Signed-off-by: Ian Romanick --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 72 -- 1 file changed, 72 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 5ea1465..ea30ce7 100644

[Mesa-dev] [PATCH 4/5] mesa: Fold _mesa_uniform_split_location_offset into its only caller

From: Ian Romanick Signed-off-by: Ian Romanick --- src/mesa/main/uniform_query.cpp | 9 ++--- src/mesa/main/uniforms.h| 19 --- 2 files changed, 6 insertions(+), 22 deletions(-) diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp index 2d

[Mesa-dev] [PATCH 1/5] mesa: Have validate_uniform_parameters return the gl_uniform_storage pointer

From: Ian Romanick This simplifies all the callers, and it enables the removal of one of the function parameters. Signed-off-by: Ian Romanick --- src/mesa/main/uniform_query.cpp | 61 - 1 file changed, 30 insertions(+), 31 deletions(-) diff --git a/src/

[Mesa-dev] [PATCH 2/5] mesa: Use MAX2 to calculate maximum uniform element

From: Ian Romanick Signed-off-by: Ian Romanick --- src/mesa/main/uniform_query.cpp | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp index 7b089fa..2dc9f27 100644 --- a/src/mesa/main/uniform_query.cpp +++ b/s

Re: [Mesa-dev] [PATCH 1/2] c11/threads: add missing brackets around _MTX_INITIALIZER_NP

On 02/08/14 00:26, Ian Romanick wrote: > On 08/01/2014 09:41 AM, Emil Velikov wrote: >> ... for win32 builds. Spotted this warning when I've imported the >> library into waffle, and gave mingw-w64-gcc a bash at compiling it. >> >> src/waffle/core/wcore_display.c:37:5: warning: missing braces around

Re: [Mesa-dev] [PATCH 12/15] mesa: Add a gles3 error condition for sized internalformat in glCopyTexImage*()

On Fri, Aug 1, 2014 at 3:03 PM, Jason Ekstrand wrote: > > On Wed, Jun 11, 2014 at 11:09 AM, Anuj Phogat wrote: >> >> Adding mesa-dev to the conversation. >> >> On Wed, Jun 11, 2014 at 10:52 AM, Anuj Phogat >> wrote: >> > >> > On Wed, Jun 11, 2014 at 10:28 AM, Courtney Goeltzenleuchter >> > wrot

Re: [Mesa-dev] [PATCH 1/2] c11/threads: add missing brackets around _MTX_INITIALIZER_NP

On 08/01/2014 09:41 AM, Emil Velikov wrote: > ... for win32 builds. Spotted this warning when I've imported the > library into waffle, and gave mingw-w64-gcc a bash at compiling it. > > src/waffle/core/wcore_display.c:37:5: warning: missing braces around > initializer [-Wmissing-braces] > static m

Re: [Mesa-dev] [PATCH 2/2] c11/threads: correct assertion

On 08/01/2014 09:41 AM, Emil Velikov wrote: > We should assert when either the function or the flag pointer > is null or we'll end up with a null reference a few lines later. > > Currently unused by mesa thus it has gone unnoticed. > > Signed-off-by: Emil Velikov > --- > include/c11/threads_win

Re: [Mesa-dev] [PATCH] egl: Fix OpenGL ES version checks in _eglParseContextAttribList()

On 06/18/2014 05:49 PM, Anuj Phogat wrote: > Fixes gles3 Khronos CTS test: > egl_create_context.egl_create_context > > Cc: > Signed-off-by: Anuj Phogat > --- > src/egl/main/eglcontext.c | 11 --- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/src/egl/main/eglcontext

Re: [Mesa-dev] [PATCH 12/15] mesa: Add a gles3 error condition for sized internalformat in glCopyTexImage*()

On Wed, Jun 11, 2014 at 11:09 AM, Anuj Phogat wrote: > Adding mesa-dev to the conversation. > > On Wed, Jun 11, 2014 at 10:52 AM, Anuj Phogat > wrote: > > > > On Wed, Jun 11, 2014 at 10:28 AM, Courtney Goeltzenleuchter > > wrote: > >> > >> On Fri, Jun 6, 2014 at 5:57 PM, Anuj Phogat > wrote: >

Re: [Mesa-dev] [PATCH 07/15] mesa: Add error condition for using compressed internalformat in glTexStorage3D()

On Wed, Jul 30, 2014 at 2:29 PM, Ian Romanick wrote: > On 07/29/2014 05:02 PM, Jason Ekstrand wrote: > > > > > > > > On Fri, Jun 6, 2014 at 4:57 PM, Anuj Phogat > > wrote: > > > > Fixes gles3 Khronos CTS test: > texture_storage_texture_internal_formats > > > >

[Mesa-dev] [PATCH 5/5 v2] i965: Add support for ARB_copy_image

This, together with the meta path, provides a almost-complete implemetation of ARB_copy_image. The only case that won't work is if one of the textures is compressed and has a pitch greater than INT16_MAX. I think that's good enough to justify turning on the extension. v2: Add a fallback memcpy p

Re: [Mesa-dev] [PATCH 3/5] mesa/meta: Add support for storing the current read buffer

On Fri, Aug 1, 2014 at 6:44 AM, Neil Roberts wrote: > Is this patch necessary? I think the read buffer is part of the > framebuffer state so any meta function that binds its own framebuffer > won't need to save the read buffer, right? This is the case for > _mesa_meta_CopyImageSubData_uncompresse

Re: [Mesa-dev] [PATCH v2 3/4] ra: consider all spillable nodes for spilling

On Fri, Aug 1, 2014 at 12:25 PM, Eric Anholt wrote: > Connor Abbott writes: > >> On Fri, Aug 1, 2014 at 11:51 AM, Eric Anholt wrote: >>> Connor Abbott writes: >>> On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt wrote: > Connor Abbott writes: >> That's not necessarily true - you coul

Re: [Mesa-dev] [PATCH 4/5] mesa/meta: Add a partial implementation of CopyImageSubData

On Fri, Aug 1, 2014 at 6:48 AM, Neil Roberts wrote: > Jason Ekstrand writes: > > > +bool > > +_mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx, > > + struct gl_texture_image > *src_tex_image, > > + int

Re: [Mesa-dev] [PATCH 5/5] i965: Add support for ARB_copy_image

On Fri, Aug 1, 2014 at 7:21 AM, Neil Roberts wrote: > Jason Ekstrand writes: > > > This, together with the meta path, provides a almost-complete > > implemetation of ARB_copy_image. The only case that won't work is if > > one of the textures is compressed and has a pitch greater than > > INT16_M

Re: [Mesa-dev] [PATCH 3/3] gallium: Fix compiler warning.

On Mon, 2014-07-28 at 10:56 -0600, Brian Paul wrote: > On 07/25/2014 08:33 AM, Jan Vesely wrote: > > warning: type qualifiers ignored on function return type > > > > Signed-off-by: Jan Vesely > > --- > > src/gallium/auxiliary/tgsi/tgsi_ureg.c | 2 +- > > src/gallium/auxiliary/tgsi/tgsi_ureg.h |

Re: [Mesa-dev] [PATCH v3 13/19] i965/gen6 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surface

On Fri, Aug 1, 2014 at 1:53 AM, Pohjolainen, Topi wrote: > On Fri, Aug 01, 2014 at 12:53:43AM -0700, Jordan Justen wrote: >> (bf25ee2 for gen6) >> >> Previously we would always find the 2D sub-surface of interest, >> and then program the surface to this location. Now we always >> program the 3DSTA

Re: [Mesa-dev] [PATCH v3 06/19] i965/gen6_depth_state.c: Remove (gen < 6) code paths

On Fri, Aug 1, 2014 at 9:28 AM, Pohjolainen, Topi wrote: > On Fri, Aug 01, 2014 at 09:18:00AM -0700, Jordan Justen wrote: >> On Fri, Aug 1, 2014 at 2:28 AM, Pohjolainen, Topi >> wrote: >> > On Fri, Aug 01, 2014 at 12:53:36AM -0700, Jordan Justen wrote: >> >> Since this code was branched from brw_

Re: [Mesa-dev] [PATCH v3 10/19] i965/gen6 depth surface: calculate minimum array element being rendered

On Fri, Aug 1, 2014 at 2:44 AM, Pohjolainen, Topi wrote: > On Fri, Aug 01, 2014 at 12:53:40AM -0700, Jordan Justen wrote: >> (a23cfb8 for gen6) >> >> In layered rendering this will be 0. Otherwise it will be the >> selected slice. >> >> Signed-off-by: Jordan Justen >> --- >> src/mesa/drivers/dri

Re: [Mesa-dev] [PATCH v2 3/4] ra: consider all spillable nodes for spilling

Connor Abbott writes: > On Fri, Aug 1, 2014 at 11:51 AM, Eric Anholt wrote: >> Connor Abbott writes: >> >>> On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt wrote: Connor Abbott writes: > That's not necessarily true - you could want to spill a trivially > colored register that interf

Re: [Mesa-dev] [PATCH v2 3/4] ra: consider all spillable nodes for spilling

On Fri, Aug 1, 2014 at 11:51 AM, Eric Anholt wrote: > Connor Abbott writes: > >> On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt wrote: >>> Connor Abbott writes: That's not necessarily true - you could want to spill a trivially colored register that interferes with a non trivially colore

Re: [Mesa-dev] [PATCH v2 3/4] ra: consider all spillable nodes for spilling

Connor Abbott writes: > On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt wrote: >> Connor Abbott writes: >>> That's not necessarily true - you could want to spill a trivially >>> colored register that interferes with a non trivially colored >>> register, especially if the spill cost of the non triv

[Mesa-dev] [PATCH v3] winsys/radeon: fix nop packet padding for hawaii

The initial firmware for hawaii does not support type3 nop packet. Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2. If the returned value is 3, then the new firmware is used. This patch uses type2 for the old firmware and type3 for the new firmware. It fixes the cases when th

[Mesa-dev] Mesa 10.3 release plan strawman

So... going by our usual release cycle, I should make the 10.3 release branch... today. I don't think that's a good idea due, at the very least, to the short notice. Here's my proposal: 8/15: Create 10.3 release branch, RC1 8/22: RC2 8/29: RC3 9/5: Mesa 10.3 final The previous release cycle

[Mesa-dev] [PATCH] meta: Remove dither bit from blit paths that do not need it

Similarly to an older patch. This is the minimum needed to fix the bug but there are other meta-paths remaining that have the bit since its introduction but not before. commit e526ebf35c113d59eb0b860e492c1308d3862ee9 Author: Kenneth Graunke Date: Mon May 5 14:03:46 2014 -0700 meta: Add a n

Re: [Mesa-dev] [PATCH 1/5] Add GL API support for ARB_copy_image

On Fri, Aug 1, 2014 at 2:56 AM, Juha-Pekka Heikkila < juhapekka.heikk...@gmail.com> wrote: > On 01.08.2014 06:39, Jason Ekstrand wrote: > > This adds the API entrypoint, error checking logic, and a driver hook for > > the ARB_copy_image extension. > > > > v2: Fix a typo in ARB_copy_image.xml and a

Re: [Mesa-dev] [PATCH v3 14/19] i965: Change mipmap array_spacing_lod0 to array_layout (enum)

On Fri, Aug 01, 2014 at 12:53:44AM -0700, Jordan Justen wrote: > We will want to setup gen6 separate stencil and hiz miptrees in a > layout that is similar to array_spacing_lod0. This is needed because > gen6 hiz and stencil only support a single mip-level. > > In both use cases (gen7+ LOD0 spacin

[Mesa-dev] [PATCH 1/2] c11/threads: add missing brackets around _MTX_INITIALIZER_NP

... for win32 builds. Spotted this warning when I've imported the library into waffle, and gave mingw-w64-gcc a bash at compiling it. src/waffle/core/wcore_display.c:37:5: warning: missing braces around initializer [-Wmissing-braces] static mtx_t mutex = _MTX_INITIALIZER_NP; ^ Signed-off-by: Emil

[Mesa-dev] [PATCH 2/2] c11/threads: correct assertion

We should assert when either the function or the flag pointer is null or we'll end up with a null reference a few lines later. Currently unused by mesa thus it has gone unnoticed. Signed-off-by: Emil Velikov --- include/c11/threads_win32.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [Mesa-dev] [Mesa-stable] Patches queued up for upcoming 10.2.5 release

Marek Olšák writes: > I have a few things. Thanks for the feedback, Marek I appreciate this. > 1) Please apply the first attached patch, which fixes is a build > failure caused by one of the recent fixes in the branch. (that driver > is not built by default) ... > 2) Please cherry-pick this. It'

Re: [Mesa-dev] [PATCH v3 06/19] i965/gen6_depth_state.c: Remove (gen < 6) code paths

On Fri, Aug 01, 2014 at 09:18:00AM -0700, Jordan Justen wrote: > On Fri, Aug 1, 2014 at 2:28 AM, Pohjolainen, Topi > wrote: > > On Fri, Aug 01, 2014 at 12:53:36AM -0700, Jordan Justen wrote: > >> Since this code was branched from brw_misc_state.c, it had support for > >> gen < 6. We can now remove

Re: [Mesa-dev] [PATCH v3 06/19] i965/gen6_depth_state.c: Remove (gen < 6) code paths

On Fri, Aug 1, 2014 at 2:28 AM, Pohjolainen, Topi wrote: > On Fri, Aug 01, 2014 at 12:53:36AM -0700, Jordan Justen wrote: >> Since this code was branched from brw_misc_state.c, it had support for >> gen < 6. We can now remove this. >> >> Signed-off-by: Jordan Justen >> --- >> src/mesa/drivers/dr

[Mesa-dev] [PATCH] mesa: guard better when building with sse4.1 optimisations

When the compiler is not capable/does not accept -msse4.1 while the target has the instruction set we'll blow up as _mesa_streaming_load_memcpy is going to be undefined. To make sure that never happens, wrap the runtime cpu check+caller in an ifdef thus do not compile that hunk of the code. Fix t

Re: [Mesa-dev] [PATCH 19/29] glsl: Don't use strtod_l in Mesa on Android.

On 30/07/14 05:30, Ian Romanick wrote: > I think we should replace all the #ifdef garbage around this with a > HAVE_STRTOD_L macro. Having lots of platform knowledge sprinkled around > the code is ugly, at best. > Asking for the last guy to refactor it because the previous N people before him did

Re: [Mesa-dev] [Mesa-stable] [PATCH] winsys/radeon: fix nop packet padding for hawaii

2014-08-01 16:50 GMT+02:00 Michel Dänzer : > On 01.08.2014 23:46, Andreas Boll wrote: >> 2014-08-01 16:32 GMT+02:00 Michel Dänzer : >>> On 01.08.2014 22:09, Andreas Boll wrote: The initial firmware for hawaii does not support type3 nop packet. Detect the new hawaii firmware with query RAD

Re: [Mesa-dev] [PATCH] Remove XA state tracker support for Radeon

On 01/08/14 14:45, Marek Olšák wrote: > From: Marek Olšák > > We don't support this type of X acceleration and we never did. > Other drivers might want to do the same thing. Practically XA+radeon is a thing since mesa 10.2, which uses a dynamic method (so called pipe-loader) of loading the pipe-d

Re: [Mesa-dev] [PATCH] r300/compiler: recursive look for RC_OPCODE_S**

On Fri, Aug 01, 2014 at 03:55:56PM +0200, Marek Olšák wrote: > From: David Heidelberger > > Get rid of error "Failed to build loop info" by fixing failure in cases > like > 4: SGE temp[2].x, temp[0]., const[0].; > 5: CMP temp[1].x, -temp[2]., const[0]., temp[1].; > 6: IF

[Mesa-dev] [Bug 80848] [dri3] Building mesa fails with dri3 enabled

https://bugs.freedesktop.org/show_bug.cgi?id=80848 --- Comment #20 from Emil Velikov --- (In reply to comment #19) > (In reply to comment #18) > > I had cross-compilation problems on Ubuntu (building 32bit Mesa on 64bit > > environment) and my problems went away by reverting > > > > 3ecd9e1a9381

Re: [Mesa-dev] [PATCH] winsys/radeon: fix nop packet padding for hawaii

On 01.08.2014 23:46, Andreas Boll wrote: > 2014-08-01 16:32 GMT+02:00 Michel Dänzer : >> On 01.08.2014 22:09, Andreas Boll wrote: >>> The initial firmware for hawaii does not support type3 nop packet. >>> Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2. >>> If the returned valu

Re: [Mesa-dev] [PATCH] winsys/radeon: fix nop packet padding for hawaii

2014-08-01 16:32 GMT+02:00 Michel Dänzer : > On 01.08.2014 22:09, Andreas Boll wrote: >> The initial firmware for hawaii does not support type3 nop packet. >> Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2. >> If the returned value is 2, then the new firmware is used. >> >> Th

[Mesa-dev] [PATCH] winsys/radeon: fix nop packet padding for hawaii

The initial firmware for hawaii does not support type3 nop packet. Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2. If the returned value is 2, then the new firmware is used. This patch uses type2 for the old firmware and type3 for the new firmware. It fixes the cases when th

Re: [Mesa-dev] [PATCH] winsys/radeon: fix nop packet padding for hawaii

On 01.08.2014 22:09, Andreas Boll wrote: > The initial firmware for hawaii does not support type3 nop packet. > Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2. > If the returned value is 2, then the new firmware is used. > > This patch uses type2 for the old firmware and type

Re: [Mesa-dev] [PATCH] mesa/st: add support for dynamic ubo selection

Acked-by: Marek Olšák Marek On Sun, Jul 20, 2014 at 5:45 AM, Ilia Mirkin wrote: > Signed-off-by: Ilia Mirkin > --- > > Brian reviewed the first bits of this, but it turns out I had to change > src_register as well. Also I realized that instead of doing the UADD I could > just index2D to 1 in o

Re: [Mesa-dev] [PATCH 5/5] i965: Add support for ARB_copy_image

Jason Ekstrand writes: > This, together with the meta path, provides a almost-complete > implemetation of ARB_copy_image. The only case that won't work is if > one of the textures is compressed and has a pitch greater than > INT16_MAX. I think that's good enough to justify turning on the > extens

Re: [Mesa-dev] [PATCH] r600g: Implement gpu_shader5 textureGather

Pushed, thanks. Marek On Sun, Jul 20, 2014 at 3:59 PM, Glenn Kennard wrote: > Adds 0-3 textureGather component selection and non-constant offsets > > Caveat: 0 and 1 texture swizzles only work if textureGather component > select is 3 or a component that does not exist in the sampler texture > fo

Re: [Mesa-dev] [PATCH] main/mesa: missing atomic buffer bindings to mesa are added in this patch

Pushed, thanks. Marek On Thu, Jul 24, 2014 at 9:18 PM, Aditya Atluri wrote: > --- > src/mesa/main/bufferobj.c | 31 +++ > 1 file changed, 31 insertions(+) > > diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c > index 7b1bba0..1dfcda3 100644 > --- a

Re: [Mesa-dev] [PATCH 2/5] mesa/meta: Make _mesa_meta_bind_fbo_image also take a framebuffer target

Looks good to me. Reviewed-by: Neil Roberts Regards, - Neil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] r300/compiler: recursive look for RC_OPCODE_S**

From: David Heidelberger Get rid of error "Failed to build loop info" by fixing failure in cases like 4: SGE temp[2].x, temp[0]., const[0].; 5: CMP temp[1].x, -temp[2]., const[0]., temp[1].; 6: IF temp[1].; On RS690 - fixes piglit glean "do-loop with continue and b

Re: [Mesa-dev] [PATCH 1/5] Add GL API support for ARB_copy_image

There is one line that is 116 characters long (!) but apart from that: Reviewed-by: Neil Roberts Regards, - Neil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 4/5] mesa/meta: Add a partial implementation of CopyImageSubData

Jason Ekstrand writes: > +bool > +_mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx, > + struct gl_texture_image > *src_tex_image, > + int src_x, int src_y, int src_z, > +

[Mesa-dev] [PATCH] Remove XA state tracker support for Radeon

From: Marek Olšák We don't support this type of X acceleration and we never did. Other drivers might want to do the same thing. --- configure.ac | 6 +++--- src/gallium/targets/xa/Makefile.am | 32 2 files changed, 3 insertions(+), 35 delet

Re: [Mesa-dev] [PATCH 3/5] mesa/meta: Add support for storing the current read buffer

Is this patch necessary? I think the read buffer is part of the framebuffer state so any meta function that binds its own framebuffer won't need to save the read buffer, right? This is the case for _mesa_meta_CopyImageSubData_uncompressed which binds both a read and write FBO so I think it shouldn'

Re: [Mesa-dev] [PATCH] winsys/radeon: fix nop packet padding for hawaii

On Fri, Aug 1, 2014 at 3:09 PM, Andreas Boll wrote: > The initial firmware for hawaii does not support type3 nop packet. > Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2. > If the returned value is 2, then the new firmware is used. > > This patch uses type2 for the old firmwa

[Mesa-dev] [PATCH] winsys/radeon: fix nop packet padding for hawaii

The initial firmware for hawaii does not support type3 nop packet. Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2. If the returned value is 2, then the new firmware is used. This patch uses type2 for the old firmware and type3 for the new firmware. It fixes the cases when th

[Mesa-dev] [Bug 80848] [dri3] Building mesa fails with dri3 enabled

https://bugs.freedesktop.org/show_bug.cgi?id=80848 --- Comment #19 from Tapani Pälli --- (In reply to comment #18) > I had cross-compilation problems on Ubuntu (building 32bit Mesa on 64bit > environment) and my problems went away by reverting > > 3ecd9e1a93817180fa5b280e5fe11c903cca38ba > > Fo

[Mesa-dev] [Bug 80848] [dri3] Building mesa fails with dri3 enabled

https://bugs.freedesktop.org/show_bug.cgi?id=80848 Tapani Pälli changed: What|Removed |Added CC||lem...@gmail.com --- Comment #18 from Tap

Re: [Mesa-dev] [PATCH 5/5] i965: Add support for ARB_copy_image

On 31.07.2014 21:28, Jason Ekstrand wrote: > This, together with the meta path, provides a almost-complete implemetation > of ARB_copy_image. The only case that won't work is if one of the textures > is compressed and has a pitch greater than INT16_MAX. I think that's good > enough to justify tur

Re: [Mesa-dev] [PATCH 1/5] Add GL API support for ARB_copy_image

On 01.08.2014 06:39, Jason Ekstrand wrote: > This adds the API entrypoint, error checking logic, and a driver hook for > the ARB_copy_image extension. > > v2: Fix a typo in ARB_copy_image.xml and add it to the makefile > v3: Put ARB_copy_image.xml in the right place alphebetically in the makefile

Re: [Mesa-dev] [PATCH v3 10/19] i965/gen6 depth surface: calculate minimum array element being rendered

On Fri, Aug 01, 2014 at 12:53:40AM -0700, Jordan Justen wrote: > (a23cfb8 for gen6) > > In layered rendering this will be 0. Otherwise it will be the > selected slice. > > Signed-off-by: Jordan Justen > --- > src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3 +++ > src/mesa/drivers/dri/i965/gen

Re: [Mesa-dev] [PATCH v3 11/19] i965/gen6 blorp depth: calculate base surface width/height

On Fri, Aug 01, 2014 at 12:53:41AM -0700, Jordan Justen wrote: > (e3a49e1 for gen6) > > This will be used in 3DSTATE_DEPTH_BUFFER in a later patch. > > Signed-off-by: Jordan Justen Reviewed-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/gen6_blorp.cpp | 13 + > 1 file cha

Re: [Mesa-dev] [PATCH v3 06/19] i965/gen6_depth_state.c: Remove (gen < 6) code paths

On Fri, Aug 01, 2014 at 12:53:36AM -0700, Jordan Justen wrote: > Since this code was branched from brw_misc_state.c, it had support for > gen < 6. We can now remove this. > > Signed-off-by: Jordan Justen > --- > src/mesa/drivers/dri/i965/gen6_depth_state.c | 40 > +--- >

Re: [Mesa-dev] [PATCH 11/17] i965/gen6 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surface

On Thu, Jul 31, 2014 at 01:09:17AM -0700, Jordan Justen wrote: > On Tue, Jul 22, 2014 at 3:09 AM, Pohjolainen, Topi > wrote: > > On Fri, Jul 18, 2014 at 02:16:46PM -0700, Jordan Justen wrote: > >> (bf25ee2 for gen6) > >> > >> Previously we would always find the 2D sub-surface of interest, > >> and

Re: [Mesa-dev] [PATCH v3 13/19] i965/gen6 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surface

On Fri, Aug 01, 2014 at 12:53:43AM -0700, Jordan Justen wrote: > (bf25ee2 for gen6) > > Previously we would always find the 2D sub-surface of interest, > and then program the surface to this location. Now we always > program the 3DSTATE_DEPTH_BUFFER at the start of the surface. > To select the lod

Re: [Mesa-dev] Status of external image with yuv format support in Mesa

On Tue, Jul 29, 2014 at 05:10:09PM -0400, enpeng xu wrote: >Hi Topi, > >On mesa mailing list,I saw you posted some patches for supporting >OES_external_image externsion, you also added yuv buffer format support, >it's really useful, but looks like just part of codes merged into mes

[Mesa-dev] [PATCH v3 16/19] i965: Support array_layout == ALL_SLICES_AT_EACH_LOD for multiple LODs

Previously array_layout ALL_SLICES_AT_EACH_LOD was only used for array spacing lod0 on gen7+ and therefore was only used with a single mip level. gen6 separate stencil & hiz only support LOD0, so we need to allocate the miptree similar to gen7+ array spacing lod0, except we also need space for mul

[Mesa-dev] [PATCH v3 07/19] i965/gen6 depth surface: calculate more specific surface type

(171e633 for gen6) This will be used in 3DSTATE_DEPTH_BUFFER in a later patch. Note: Cube maps are treated as 2D arrays with 6 times as many array elements as the cube map array would have. Signed-off-by: Jordan Justen Reviewed-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke --- src/mesa/d

[Mesa-dev] [PATCH v3 10/19] i965/gen6 depth surface: calculate minimum array element being rendered

(a23cfb8 for gen6) In layered rendering this will be 0. Otherwise it will be the selected slice. Signed-off-by: Jordan Justen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3 +++ src/mesa/drivers/dri/i965/gen6_depth_state.c | 10 ++ 2 files changed, 13 insertions(+) diff --git a/

[Mesa-dev] [PATCH v3 05/19] i965: Split gen6 depth hiz state out from brw

We will program the gen6 hiz depth state differently to enable layered rendering on gen6. v2: * Remove unneeded gen6_emit_depthbuffer as suggested by Topi Signed-off-by: Jordan Justen Reviewed-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/

[Mesa-dev] [PATCH v3 03/19] i965/gen6: add support for layered renderbuffers

Rather than pointing the surface_state directly at a single sub-image of the texture for rendering, we now point the surface_state at the top level of the texture, and configure the surface_state as needed based on this. v2: * Use SET_FIELD as suggested by Topi * Simplify min_array_element assig

[Mesa-dev] [PATCH v3 17/19] i965/gen6: Force tile alignment for each stencil/hiz LOD

Gen6 doesn't support multiple miplevels for hiz and stencil. Therefore, we must point to the LOD directly during rendering. But, we also have removed the tile offsets from normal depth surfaces, so we need to align each LOD to a tile boundary for hiz and stencil. v3: * Use new array_layout enum

[Mesa-dev] [PATCH v3 02/19] i965/gen6_surface_state.c: Remove (gen < 6) code path

Since this code was branched from brw_wm_surface_state.c, it had support for gen < 6. We can now remove this. Signed-off-by: Jordan Justen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen6_surface_state.c | 22 -- 1 file changed, 22 deletions(-) diff --git a/s

[Mesa-dev] [PATCH v3 08/19] i965/gen6 depth surface: calculate depth (array size) for depth surface

(bc1acaa for gen6) This will be used in 3DSTATE_DEPTH_BUFFER in a later patch. Note: Cube maps are treated as 2D arrays with 6 times as many array elements as the cube map array would have. Signed-off-by: Jordan Justen Reviewed-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke --- src/mesa/d

[Mesa-dev] [PATCH v3 15/19] i965: Allow forcing miptree->array_layout = ALL_SLICES_AT_EACH_LOD

gen6 does not support multiple miplevels with separate stencil/hiz. Therefore we need to layout its miptree with no mipmap spacing between the slices of each miplevel. v3: * Use new array_layout enum Signed-off-by: Jordan Justen Reviewed-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/inte

[Mesa-dev] [PATCH v3 14/19] i965: Change mipmap array_spacing_lod0 to array_layout (enum)

We will want to setup gen6 separate stencil and hiz miptrees in a layout that is similar to array_spacing_lod0. This is needed because gen6 hiz and stencil only support a single mip-level. In both use cases (gen7+ LOD0 spacing & gen6 separate stencil/hiz), the array slices will be packed at each L

[Mesa-dev] [PATCH v3 11/19] i965/gen6 blorp depth: calculate base surface width/height

(e3a49e1 for gen6) This will be used in 3DSTATE_DEPTH_BUFFER in a later patch. Signed-off-by: Jordan Justen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 13 + 1 file changed, 13 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_

[Mesa-dev] [PATCH v3 00/19] Gen6 render surface state changes

v3 has some changes suggested by Topi and Ken on the July 18 version. These patches do not have Reviewed-by: * 04 i965/gen6: Adjust render height in errata case for MSAA * 06 i965/gen6_depth_state.c: Remove (gen < 6) code paths * 10 i965/gen6 depth surface: calculate minimum array element being

[Mesa-dev] [PATCH v3 12/19] i965/gen6 fbo: make unmatched depth/stencil configs return unsupported

(f3c886b for gen6) Signed-off-by: Jordan Justen Reviewed-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index e43e18b..164d6c1

[Mesa-dev] [PATCH v3 13/19] i965/gen6 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surface

(bf25ee2 for gen6) Previously we would always find the 2D sub-surface of interest, and then program the surface to this location. Now we always program the 3DSTATE_DEPTH_BUFFER at the start of the surface. To select the lod/slice, we utilize the lod & minimum array element fields. We also must di

[Mesa-dev] [PATCH v3 19/19] i965/gen6: Force ALL_SLICES_AT_EACH_LOD for separate stencil/hiz

For gen6 we will use the ALL_SLICES_AT_EACH_LOD miptree layout for separate stencil/hiz. This is needed because gen6 hiz and separate stencil only support a single miplevel. When accessing the other LODs, we will program a tile aligned offset for the bo. PRM Volume 1, Part 1, 7.18.3.7.2 For separa

[Mesa-dev] [PATCH v3 18/19] i965/gen6: Stencil/hiz needs an offset for LOD > 0

Since gen6 separate stencil & hiz only supports LOD0, we need to program an offset to the LOD when emitting the separate stencil/hiz. v3: * Use new array_layout enum Signed-off-by: Jordan Justen Reviewed-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 10 +++- src/

[Mesa-dev] [PATCH v3 06/19] i965/gen6_depth_state.c: Remove (gen < 6) code paths

Since this code was branched from brw_misc_state.c, it had support for gen < 6. We can now remove this. Signed-off-by: Jordan Justen --- src/mesa/drivers/dri/i965/gen6_depth_state.c | 40 +--- 1 file changed, 13 insertions(+), 27 deletions(-) diff --git a/src/mesa/driver

[Mesa-dev] [PATCH v3 04/19] i965/gen6: Adjust render height in errata case for MSAA

In the gen6 PRM Volume 1 Part 1: Graphics Core, Section 7.18.3.7.1 (Surface Arrays For all surfaces other than separate stencil buffer): "[DevSNB] Errata: Sampler MSAA Qpitch will be 4 greater than the value calculated in the equation above , for every other odd Surface Height starting from 1

[Mesa-dev] [PATCH v3 09/19] i965/gen6 depth surface: calculate LOD being rendered to

(08ef1dd for gen6) This will be used in 3DSTATE_DEPTH_BUFFER in a later patch. Signed-off-by: Jordan Justen Reviewed-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3 +++ src/mesa/drivers/dri/i965/gen6_depth_state.c | 3 +++ 2 files change

[Mesa-dev] [PATCH v3 01/19] i965: Split gen6 renderbuffer surface state from gen5 and older

We will program the gen6 renderbuffer surface state differently to enable layered rendering on gen6. Signed-off-by: Jordan Justen Reviewed-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_context.c