On Sat, Jun 28, 2014 at 9:34 PM, Kenneth Graunke wrote:
> Apparently INTEL_DEBUG=fs has crashed on Broadwell for anything using
> ARB_fragment_program since commit 9cee3ff5. We need to NULL-check the
> right field.
>
> Signed-off-by: Kenneth Graunke
> Cc: "10.2"
> ---
Nice work. The whole seri
Making a helper function saves us from cut and pasting this four times.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 115 -
1 file changed, 26 insertions(+), 89 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src
We should print something properly, but I'm not sure how to properly
print an HF, and we don't have any DFs today to test with.
This is at least better than the current Gen8 disassembler, which would
simply assert fail.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c |
Previously, flow control instructions generated output like:
(+f0) if(8) 12 8 null 0x000c0008UD { align16 WE_normal 1Q };
which included a dissasembly of the register fields, even though those
are meaningless for flow control instructions---those bits are reused
for another purpose.
It
I never bothered implementing the disassembler for Gen7+ URB opcodes, so
we were just disassembling them as Ironlake/Sandybridge ones. This
looked pretty bad when running Paul's GS EndPrimitive tests, as the
"write OWord" message was decoded at ff_sync, which doesn't exist.
Signed-off-by: Kenneth
Previously, we decoded render target write messages as:
render ( RT write, 0, 16, 12, 0) mlen 8 rlen 0
which made you remember (or look up) what the numbers meant:
1. The binding table index
2. The raw message control, undecoded:
- Last Render Target Select
- Slot Group Select
- Mess
Apparently INTEL_DEBUG=fs has crashed on Broadwell for anything using
ARB_fragment_program since commit 9cee3ff5. We need to NULL-check the
right field.
Signed-off-by: Kenneth Graunke
Cc: "10.2"
---
src/mesa/drivers/dri/i965/gen8_fs_generator.cpp | 2 +-
1 file changed, 1 insertion(+), 1 delet
The name of this message is "Render Target UNORM Write" (Sandybridge
PRM, Volume 4 Part 1, Page 210). Drop the bogus 'c'.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_d
At this point, brw_disassemble can do everything gen8_disassemble can
do - and, thanks to the new brw_inst API, it supports all generations.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp| 3 +--
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 3 +--
Previously, our dissasembly for flow control instructions looked like:
0x0040: else(8) ip 65540D { align16 switch };
It didn't print InstCount properly for ELSE/ENDIF, and didn't even
attempt to disassemble PopCount.
Now it looks like:
0x0040: else(8) Jump:
We haven't used the name "message target" in a while - there are a lot
of things called "target", and it gets confusing. SFID ("Shared
Function ID") is the term commonly used in the modern documentation.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 20
opcode is just a pointer to opcode_descs; we may as well use that
directly.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri
These have existed since Ivybridge. We don't use them today, but the
Gen8+ disassembler supports them, and I'd like to use symbolic names
rather than magic numbers.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_defines.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/s
While we're at it, use proper names rather than magic numbers for the
existing fields.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 40 --
1 file changed, 24 insertions(+), 16 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_
This backports the atomic message disassembly support from
gen8_disasm.c, which additionally offers support for decoding atomic
surface read/write messages, and showing SIMD modes and other details.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 28 ++
This is a port of Abdiel's 6f9f916b9b042a294813ab0542390846a38739da
to brw_disasm.c.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 53 +++---
1 file changed, 49 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_dis
Most developers will recognize the Gen6+ SFID names more quickly than
the Gen4-5 ones. Given that they're the same values, just use the new
names.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index 26b60b6..b651120 100644
--- a/src/mesa/drivers/dri/i965/brw_dis
This saves typing brw_inst_opcode(brw, inst) everywhere.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 61 +-
1 file changed, 30 insertions(+), 31 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/d
Now that Matt has ported brw_disasm.c to use the new brw_inst API, we no
longer need a separate Gen8+ disassembler using gen8_instruction. The
old one should more or less work for all generations.
However, it was missing a few bits here and there, and I made a variety
of small improvements to gen
While we're adding things, use symbolic constants rather than magic
numbers.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa
This makes brw_disasm.c able to disassemble ELSE instructions correctly
on Broadwell. (gen8_disasm.c already handles this correctly.)
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_disas
We don't use these yet, but we may as well disassemble them.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index b651120..14cb687 100
The functionality has been merged into brw_disasm.c; use that instead.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.sources |1 -
src/mesa/drivers/dri/i965/gen8_disasm.c | 1026 --
src/mesa/drivers/dri/i965/gen8_instruction.h |4 -
On Saturday, June 28, 2014 04:49:01 PM Matt Turner wrote:
>text data bss dec hex filename
> 4270747123200 39648 4433595 43a6bb i965_dri.so
> 4244821123200 39648 4407669 434175 i965_dri.so
>
> Cuts 25k of .text and saves a bunch of useless struct copie
textdata bss dec hex filename
4270747 123200 39648 4433595 43a6bb i965_dri.so
4244821 123200 39648 4407669 434175 i965_dri.so
Cuts 25k of .text and saves a bunch of useless struct copies.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 13 +---
src/mesa/drivers/dri/i965/
textdata bss dec hex filename
4244821 123200 39648 4407669 434175 i965_dri.so
4231165 123200 39648 4394013 430c1d i965_dri.so
Cuts 13k of .text and saves a bunch of useless struct copies.
---
src/mesa/drivers/dri/i965/brw_vec4.h | 8
src/mesa/drivers/
textdata bss dec hex filename
4231165 123200 39648 4394013 430c1d i965_dri.so
4186277 123200 39648 4349125 425cc5 i965_dri.so
Cuts 43k of .text and saves a bunch of useless struct copies.
---
src/mesa/drivers/dri/i965/brw_vec4.h | 92 --
https://bugs.freedesktop.org/show_bug.cgi?id=80614
--- Comment #6 from yas...@windowslive.com ---
Thank you for the fix!
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https://bugs.freedesktop.org/show_bug.cgi?id=80614
Emil Velikov changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=80614
Alain Perrot changed:
What|Removed |Added
CC||alain.per...@gmail.com
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We already have PIPE_CAP_GLSL_FEATURE_LEVEL. Once everybody (who can) supports
GLSL 4.00, we can drop some caps in favor of that.
Marek
On Sat, Jun 28, 2014 at 2:44 PM, Roland Scheidegger wrote:
> 3-4 look alright to me. I wonder if the cap name is actually "correct"
> or if it should have some
3-4 look alright to me. I wonder if the cap name is actually "correct"
or if it should have some STREAM_OUT in it. But doesn't really matter I
guess.
Longer term I think we might want to merge some caps. Everybody
(supporting stream out) will either support 1 or 4 streams along with
other functiona
https://bugs.freedesktop.org/show_bug.cgi?id=80614
--- Comment #4 from yas...@windowslive.com ---
Created attachment 101914
--> https://bugs.freedesktop.org/attachment.cgi?id=101914&action=edit
gdb output
Ok, gdb output attached.
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On 06/27/2014 06:49 PM, Jason Ekstrand wrote:
As far as I can tell, the Intel mesa driver is the only driver in the world
still supporting this legacy extension. If someone wants to do bump
mapping, they can use shaders.
Signed-off-by: Jason Ekstrand
---
src/glsl/builtin_variables.cpp
The one that increases the number of input SGPRs to 22 (16 user + 6
streamout) in the calling convention. I don't remember the name.
Please "git blame" on the calling convention.
Marek
On Fri, Jun 27, 2014 at 5:26 PM, Tom Stellard wrote:
> On Tue, Jun 17, 2014 at 01:51:10AM +0200, Marek Olšák wr
https://bugs.freedesktop.org/show_bug.cgi?id=80614
--- Comment #3 from Emil Velikov ---
(In reply to comment #2)
> I did attach the installation log, which contains a backtrace.
>
Should have been more explicit - can you run the program in gdb (gdb --args
omxregister-bellagio -v) and attach the b
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