Kenneth Graunke writes:
> I'm trying to decide whether we need to implement MemoryBarrier().
>
> Reading through the spec, it definitely seems to apply to us:
>
> Add to the list of flags accepted by the parameter to
> MemoryBarrier in Section 7.12.2, "Shader Memory Access Synchronizatio
On Fri, Mar 14, 2014 at 08:15:33PM +0200, Pohjolainen, Topi wrote:
> On Tue, Mar 11, 2014 at 11:48:54PM -0700, Kenneth Graunke wrote:
> > Previously, remove_dead_constants() would renumber the UNIFORM registers
> > to be sequential starting from zero, and the resulting register number
> > would be
On Tue, Mar 11, 2014 at 11:48:51PM -0700, Kenneth Graunke wrote:
> Previously, both move_uniform_array_access_to_pull_constants() and
> setup_pull_constants() maintained stack-local arrays with this
> information. Storing this information will allow it to be used from
> multiple functions, allowin
Kenneth Graunke writes:
> On 02/27/2014 02:52 PM, Eric Anholt wrote:
>> One thing I noticed while working on this was that we only reallocate buffer
>> storage for INVALIDATE_BUFFER_BIT when UNSYNCHRONIZED_BIT is unset. The
>> ARB_mbr spec says that the contents "may be discarded", not "must be
On Tue, Mar 11, 2014 at 11:48:54PM -0700, Kenneth Graunke wrote:
> Previously, remove_dead_constants() would renumber the UNIFORM registers
> to be sequential starting from zero, and the resulting register number
> would be used directly as an index into the params[] array.
>
> This renumbering ma
With only 2 bits available, dithering causes undesirable results
for RGB10_A2 render targets.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74700
Signed-off-by: Jordan Justen
---
Tested on Haswell.
We likely need a change for gen8 too. I'll work with Ken on this.
src/mesa/drivers/dri/
Signed-off-by: Gwenole Beauchesne
---
src/mesa/drivers/dri/i965/intel_screen.c | 77 --
1 file changed, 72 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_screen.c
index 464cebf..1e3d58f 100644
-
DRM tuple-based formats are useful to express non-presentable memory
used with dma_buf sharing for EGL or OpenCL interop, but also for planar
YUV surfaces when it is desired to map each of their individual plane
separately.
Note: this also fixes the case where an EGL image is the storage of a
rend
---
src/gallium/include/pipe/p_config.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/include/pipe/p_config.h
b/src/gallium/include/pipe/p_config.h
index d603681..cd6f560 100644
--- a/src/gallium/include/pipe/p_config.h
+++ b/src/gallium/include/pipe/p_config.h
This is a follow-up to:
http://lists.freedesktop.org/archives/mesa-dev/2014-March/055742.html
Add formats meant to convey a "compute" dimension when a DRM fourcc
format is needed for dma_buf interop (EGL, OpenCL).
Intended FOURCC format: ('T',,,).
- : number of elements in the tuple. Range: [0..3
Fix eglCreateImage() from a packed dma_buf surface with a non-zero offset
to pixels data. In particular, this fixes support for planar YUV surfaces
when they are individually mapped on a per-plane basis, i.e. when the
OES_EGL_image_external is not used and user application wants to use its
own shad
This partially reverts patch 02cb04c68f. This fixes an unresolved
symbol error when using older builds of libGL.
---
src/mapi/glapi/glapi.h |5 +
src/mapi/mapi_glapi.c | 10 ++
2 files changed, 15 insertions(+)
diff --git a/src/mapi/glapi/glapi.h b/src/mapi/glapi/glapi.h
index
I'm going to drop this patch and will fix the problematic piglit tests
by not using the framebuffer size queries for intensity and luminance
formats.
Marek
On Mon, Mar 10, 2014 at 11:34 PM, Marek Olšák wrote:
> On Mon, Mar 10, 2014 at 6:07 PM, Brian Paul wrote:
>> On 03/09/2014 01:03 PM, Marek
On 03/13/2014 04:28 PM, Kenneth Graunke wrote:
> On 03/13/2014 03:30 PM, Kenneth Graunke wrote:
>> On 03/04/2014 01:08 AM, Ian Romanick wrote:
>>> From: Ian Romanick
>>>
>>> Volume 4, part 1 of the Ivybridge PRM says, "Generally, the EWA
>>> approximation algorithm results in higher image quality
Thanks. I pushed these patches.
Marek
On Thu, Mar 13, 2014 at 8:07 PM, Niels Ole Salscheider
wrote:
> Signed-off-by: Niels Ole Salscheider
> ---
> src/gallium/drivers/radeonsi/si_pipe.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
> b/
From: Christian König
Signed-off-by: Christian König
---
src/gallium/state_trackers/omx/vid_dec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/state_trackers/omx/vid_dec.c
b/src/gallium/state_trackers/omx/vid_dec.c
index e2a2891..de1c3825 100644
--- a/src/gal
I don't know how my make check did not fail earlier but today I needed
this to be added with Ian's patch:
diff --git a/src/glsl/Makefile.am b/src/glsl/Makefile.am
index f8d4ef2..2cd98a5 100644
--- a/src/glsl/Makefile.am
+++ b/src/glsl/Makefile.am
@@ -113,7 +113,8 @@ libglcpp_la_SOURCES =
On Wed, Mar 12, 2014 at 11:56:05PM -0700, Kenneth Graunke wrote:
> On 03/12/2014 03:14 AM, Pohjolainen, Topi wrote:
> > On Tue, Mar 11, 2014 at 11:48:54PM -0700, Kenneth Graunke wrote:
> >> Previously, remove_dead_constants() would renumber the UNIFORM registers
> >> to be sequential starting from
https://bugs.freedesktop.org/show_bug.cgi?id=75989
Kenneth Graunke changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |intel-3d-bugs@lists.freedes
On Thu, Mar 13, 2014 at 08:46:24PM -0700, Kenneth Graunke wrote:
> On 03/13/2014 05:55 PM, Pohjolainen, Topi wrote:
> > On Tue, Mar 11, 2014 at 11:48:51PM -0700, Kenneth Graunke wrote:
> >> Previously, both move_uniform_array_access_to_pull_constants() and
> >> setup_pull_constants() maintained sta
On 03/10/2014 11:48 AM, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat
> ---
> src/glsl/linker.cpp | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
> index f6b2661..a619bc8 100644
> --- a/src/glsl/linker.cpp
> +++ b/src/glsl/link
On 03/10/2014 07:59 AM, Juha-Pekka Heikkila wrote:
>
I might add this to the commit message:
This allows us to emit ADD/MUL/MAC instead of MUL/ADD/MUL/ADD, saving
one instruction and two temporary registers.
> Signed-off-by: Juha-Pekka Heikkila
> ---
> src/mesa/drivers/dri/i965/brw_vec4_visito
On 03/10/2014 07:59 AM, Juha-Pekka Heikkila wrote:
> This change MACH, ADDC and SUBB opcodes to use added accumulator
> flag and add new opcode MAC which use accumulator flag.
>
> Signed-off-by: Juha-Pekka Heikkila
I'm going to be a bit pedantic here (sorry!). Normally, commit messages
are of t
On 02/27/2014 02:53 PM, Eric Anholt wrote:
> It turns out we can allow COHERENT storage/mappings all the time,
> regardless of LLC vs non-LLC. It just means never using temporary
> mappings to avoid GPU stalls,
> and on non-LLC we have to use the GTT intead
> of CPU mappings. If we were to use CP
I'm trying to decide whether we need to implement MemoryBarrier().
Reading through the spec, it definitely seems to apply to us:
Add to the list of flags accepted by the parameter to
MemoryBarrier in Section 7.12.2, "Shader Memory Access Synchronization":
* CLIENT_MAPPED_BUFFER_
On 02/27/2014 02:53 PM, Eric Anholt wrote:
> While in expected usage patterns nobody will ever hit this path, doubling
> our bandwidth usedd used seems like a waste, and it cost us extra code too.
> ---
> src/mesa/drivers/dri/i965/intel_buffer_objects.c | 103
> ---
> src/mesa
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