On 12/02/2013 10:36 PM, Francisco Jerez wrote:
Would you prefer 'this->operator=(reg);'?
I just remembered... The reason this wouldn't work is that it would
trigger an implicit conversion from 'backend_reg' to 'fs_reg', causing
infinite recursion into the fs_reg constructor.
For the record,
On 12/02/2013 11:06 PM, Chad Versace wrote:
On 12/01/2013 01:53 AM, Tapani Pälli wrote:
Commit a594cec broke EGL X11 backend by adding dependency between
X11 and DRM backends requiring HAVE_EGL_PLATFORM_DRM defined for X11.
This patch fixes the issue by adding additional define for libdrm
detec
Hi again, it's about one week these patches are receiving feedback and
they (v2) look fine to reviewers. May I send a v3 for final review?
Best regards,
Siavash Eliasi.
On 11/28/2013 12:26 PM, Siavash Eliasi wrote:
Hello, this is V2 series of patches to accomplish *Enable
ARB_map_buffer_alig
Thank you for reviewing these patches, changes to commit messages are done:
http://lists.freedesktop.org/archives/mesa-dev/2013-December/049581.html
http://lists.freedesktop.org/archives/mesa-dev/2013-December/049582.html
Best regards,
Siavash Eliasi.
On 12/03/2013 06:36 AM, Stéphane Marchesi
Revision 2:
- Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT
incorrectly.
---
src/gallium/drivers/i915/i915_screen.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/i915/i915_screen.c
b/src/gallium/drivers/i915/i915_screen.c
index
---
src/gallium/drivers/i915/i915_resource_buffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/i915/i915_resource_buffer.c
b/src/gallium/drivers/i915/i915_resource_buffer.c
index 80ec43a..fd29524 100644
--- a/src/gallium/drivers/i915/i915_resource_buff
5 and 6 look good. One nitpick, please prefix the i915g changes with
"i915g" instead of "i915" so it's obvious which driver is being
changed from just looking at a git log.
Stéphane
On Thu, Nov 28, 2013 at 12:56 AM, Siavash Eliasi
wrote:
> ---
> src/gallium/drivers/i915/i915_resource_buffer.c
From: Tom Stellard
CC: "9.2" "10.0"
---
src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
b/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
index a
Other than that,
Reviewed-by: Chris Forbes
On Tue, Dec 3, 2013 at 3:45 PM, Chris Forbes wrote:
> Where you have the magic 0x3f80u, could you add a comment:
>
> /* 1.0f */
>
> The bit pattern is well-known, but only immediately obvious on a good day :)
>
> On Tue, Dec 3, 2013 at 2:03 PM, Ken
From: Tom Stellard
CC: "9.2" "10.0"
---
.../r300/compiler/tests/radeon_compiler_regalloc_tests.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git
a/src/gallium/drivers/r300/compiler/tests/radeon_compiler_regalloc_tests.c
b/src/gallium/drivers/r300/compiler/te
Where you have the magic 0x3f80u, could you add a comment:
/* 1.0f */
The bit pattern is well-known, but only immediately obvious on a good day :)
On Tue, Dec 3, 2013 at 2:03 PM, Kenneth Graunke wrote:
> On 12/02/2013 01:46 PM, Matt Turner wrote:
>> total instructions in shared programs: 15
On Mon, Dec 2, 2013 at 9:31 PM, Chris Forbes wrote:
> + *
> + * Also marks vbo/cb dirty if the buffer's binding
>
> Looks like this stops mid-sentence.
Hah, yeah. I kinda trailed off there, didn't I. Not sure how to finish
that sentence though -- it's if pipe_resource->bind &
PIPE_BIND_INDEX/VERT
+ *
+ * Also marks vbo/cb dirty if the buffer's binding
Looks like this stops mid-sentence.
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Well you could detect if it belongs to the current fb, in which case you
wouldn't need to change the fb.
And if not (which shouldn't happen with OpenGL state tracker admittedly)
then if you wouldn't have that function the state tracker would need to
swap out the fb instead, which isn't going to be
On 12/02/2013 01:46 PM, Matt Turner wrote:
> total instructions in shared programs: 1519751 -> 1519442 (-0.02%)
> instructions in affected programs: 10154 -> 9845 (-3.04%)
> ---
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 23 +++
> src/mesa/drivers/dri/i965/brw_vec4_
Hello,
I'm trying to bring the intel-gpu-tools/assembler and i965 code back
in sync. As part of that, I noticed that Damien dropped trailing
whitespace, nuked the GL types, and replaced INLINE with inline.
I plan to merge the 'whitespace' branch of ~kwg/mesa in a day or so,
unless there are stro
The glClearBuffer functions don't change the framebuffer state in most
cases, but the clear_render_target function does, so using it is out
of the question.
Yeah, the implementation of glClearBuffer seems to be incomplete.
Marek
On Tue, Dec 3, 2013 at 12:54 AM, Roland Scheidegger wrote:
> Am 02
Am 02.12.2013 23:08, schrieb Andreas Hartmetz:
> Hello,
>
> I've been lurking for a while, this seems to be my first post.
>
> While trying to make some "easy" (ha) improvements in radeonsi I
> looked around in all the surrounding code to get a good picture of
> how things work. So I noticed some
clear_render_target and clear_depth_stencil require changing the
framebuffer state, which is more costly than just drawing the quad in
the state tracker. Also, separate color and depth clear isn't very
efficient if you can do both with a single quad.
Adding scissor support to the clear function is
On Mon, Dec 2, 2013 at 11:08 PM, Andreas Hartmetz wrote:
> Hello,
>
> I've been lurking for a while, this seems to be my first post.
>
> While trying to make some "easy" (ha) improvements in radeonsi I looked
> around in all the surrounding code to get a good picture of how things
> work. So I not
Chris Forbes writes:
> This series adds the mesa and glsl compiler support for the new
> 'sample in' and 'sample out' qualifiers from GLSL 4.0 / ARB_gpu_shader5.
>
> Driver support (beyond triggering per-sample fragment shader evaluation)
> is not yet implemented.
>
The series is:
Reviewed-by:
Neat -- I was about to mention the dead_control_flow_eliminate
interaction, but you beat me to it.
On Tue, Dec 3, 2013 at 10:43 AM, Matt Turner wrote:
> And since this change makes ENDIF start blocks, I'll squash this
> change in as well to make sure dead_control_flow_eliminate continues
> workin
Hello,
I've been lurking for a while, this seems to be my first post.
While trying to make some "easy" (ha) improvements in radeonsi I looked
around in all the surrounding code to get a good picture of how things
work. So I noticed something:
All the Gallium drivers need to implement clear_depth_
On 2 December 2013 13:46, Matt Turner wrote:
> total instructions in shared programs: 1519751 -> 1519442 (-0.02%)
> instructions in affected programs: 10154 -> 9845 (-3.04%)
> ---
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 23
> +++
> src/mesa/drivers/dri/i965/brw
total instructions in shared programs: 1519751 -> 1519442 (-0.02%)
instructions in affected programs: 10154 -> 9845 (-3.04%)
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 23 +++
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 23 ---
2 files cha
And since this change makes ENDIF start blocks, I'll squash this
change in as well to make sure dead_control_flow_eliminate continues
working:
diff --git a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
index ad8ed82..63a3e5b 100644
--- a/
On Mon, Dec 2, 2013 at 11:53 AM, Emil Velikov wrote:
> The VERSION file is tracked by git (git ls-files), thus
> adding it to EXTRA_FILES will result in a duplicate copy
> within the final tarball.
Reviewed-by: Matt Turner
Ugh. :(
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---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 60 ++
1 file changed, 60 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index fed6e61..551f0a2 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/m
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_disasm.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 0a45f05..d25e145 100644
--- a/src/mesa/drivers/d
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +-
src/mesa/drivers/dri/i965/brw_vec4.cpp | 6 +-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index c21239f..f10f5c0 100644
--- a/src/mesa/driver
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 48 ++--
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index b59ab82..c21239f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 71f5307..13f69f1 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drive
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 551f0a2..71f5307 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4.cpp | 6 +-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index f10f5c0..f3b121a 100644
--- a/src/mesa/drivers/dri
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_disasm.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 97f8906..0a45f05 100644
--- a/src/mesa/drivers/d
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++--
src/mesa/drivers/dri/i965/brw_vec4.cpp | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 2d41c3f..b59ab82 100644
--- a/src/mesa/drivers/dri
On 12/01/2013 01:53 AM, Tapani Pälli wrote:
Commit a594cec broke EGL X11 backend by adding dependency between
X11 and DRM backends requiring HAVE_EGL_PLATFORM_DRM defined for X11.
This patch fixes the issue by adding additional define for libdrm
detection independent of which backend is being co
Francisco Jerez writes:
> Chris Forbes writes:
>
>> +fs_reg::fs_reg(const backend_reg ®)
>> +{
>> + init();
>> + *static_cast(this) = reg;
>>
>> This is a bit gross...
>
> Would you prefer 'this->operator=(reg);'?
>
I just remembered... The reason this wouldn't work is that it would
trigger
Chris Forbes writes:
> Ideally, we wouldn't need init() and you could just have a
> copy-constructor do the right thing, I think -- currently, all the
> backend_reg fields get initialized 3 times:
>
> - backend_reg ctor
> - init() blasting everything to zero
> - this assignment
>
Yeah, I complete
Ideally, we wouldn't need init() and you could just have a
copy-constructor do the right thing, I think -- currently, all the
backend_reg fields get initialized 3 times:
- backend_reg ctor
- init() blasting everything to zero
- this assignment
On Tue, Dec 3, 2013 at 9:22 AM, Francisco Jerez wr
Chris Forbes writes:
> +fs_reg::fs_reg(const backend_reg ®)
> +{
> + init();
> + *static_cast(this) = reg;
>
> This is a bit gross...
Would you prefer 'this->operator=(reg);'?
Meh... :)
pgphocK2Fll37.pgp
Description: PGP signature
___
mesa-dev m
+fs_reg::fs_reg(const backend_reg ®)
+{
+ init();
+ *static_cast(this) = reg;
This is a bit gross...
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https://bugs.freedesktop.org/show_bug.cgi?id=72230
--- Comment #2 from Patrick Steinhardt ---
I can confirm the attached patch fixes the problem. Thanks.
--
You are receiving this mail because:
You are the assignee for the bug.
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mesa-dev mailing li
The VERSION file is tracked by git (git ls-files), thus
adding it to EXTRA_FILES will result in a duplicate copy
within the final tarball.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72230
Cc: 10.0
Signed-off-by: Emil Velikov
---
Makefile.am | 1 -
1 file changed, 1 deletion(-)
diff
https://bugs.freedesktop.org/show_bug.cgi?id=72230
--- Comment #1 from Emil Velikov ---
Created attachment 90116
--> https://bugs.freedesktop.org/attachment.cgi?id=90116&action=edit
include only one copy of VERSION in tarball
Seems like adding VERSION to EXTRA_FILES was an overkill.
Can you g
---
src/mesa/drivers/dri/i965/intel_extensions.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index ab27d43..5145034 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++
---
src/mesa/drivers/dri/i965/brw_program.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index 094deeb..44af46f 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/m
---
src/mesa/drivers/dri/i965/brw_context.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 6de6759..ce8c311 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/br
---
src/mesa/drivers/dri/i965/intel_reg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/intel_reg.h
b/src/mesa/drivers/dri/i965/intel_reg.h
index 13b68cc..23bf0ac 100644
--- a/src/mesa/drivers/dri/i965/intel_reg.h
+++ b/src/mesa/drivers/dri/i965/intel_reg.h
@@ -70,
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 54 ---
src/mesa/drivers/dri/i965/intel_batchbuffer.h | 2 +
2 files changed, 34 insertions(+), 22 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 20
1 file changed, 20 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 26300a6..dc6d35e 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/dr
Until now atomic counter built-ins were handled in a way that
prevented the visitor from encountering atomic counter IR variables
and dereferences directly. In the new surface lowering code it's
going to be more convenient to be able to call back into the visitor
to let it handle the ugly details
---
src/mesa/drivers/dri/i965/brw_context.h | 10 ++
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 175 ++
2 files changed, 185 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 3f2edcf..0816912
---
src/mesa/drivers/dri/i965/brw_defines.h| 4 +
src/mesa/drivers/dri/i965/brw_eu.h | 25
src/mesa/drivers/dri/i965/brw_eu_emit.c| 166 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 3 +
src/mesa/drivers/dri/i965/brw_f
---
src/mesa/drivers/dri/i965/brw_fs.h | 9 --
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 38 --
src/mesa/drivers/dri/i965/brw_vec4.h | 9 --
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 40
4 files chan
Change brw_untyped_atomic() and brw_untyped_surface_read() to take the
surface index as a register instead of a constant, construct the
message descriptor dynamically by OR'ing the surface index and other
descriptor bits together and use the non-immediate variant of SEND to
submit the surface messa
---
src/mesa/drivers/dri/i965/brw_fs.h | 9 --
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 138 ---
2 files changed, 18 insertions(+), 129 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index eb71676..ae4a6
Until now atomic counter built-ins were handled in a way that
prevented the visitor from encountering atomic counter IR variables
and dereferences directly. In the new surface lowering code it's
going to be more convenient to be able to call back into the visitor
to let it handle the ugly details
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 36 +++--
src/mesa/drivers/dri/i965/brw_fs.h | 4 +++
src/mesa/drivers/dri/i965/brw_shader.cpp | 25 +++
src/mesa/drivers/dri/i965/brw_shader.h | 4 +++
src/mesa/drivers/dri/i965/brw_vec4.h
---
src/mesa/drivers/dri/i965/brw_vec4.h | 9 --
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 109 +
2 files changed, 19 insertions(+), 99 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 989c1a9..
---
src/mesa/drivers/dri/i965/brw_defines.h | 2 +
src/mesa/drivers/dri/i965/brw_eu.h | 4 ++
src/mesa/drivers/dri/i965/brw_eu_emit.c | 69
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +
src/mesa/drivers/dri/i965/brw_fs_generator
---
src/mesa/drivers/dri/i965/brw_context.h | 2 +
src/mesa/drivers/dri/i965/brw_gs_surface_state.c | 24
src/mesa/drivers/dri/i965/brw_state.h| 3 ++
src/mesa/drivers/dri/i965/brw_state_upload.c | 6 +++
src/mesa/drivers/dri/i965/brw_vs_surface_state.c | 2
---
src/mesa/drivers/dri/i965/brw_tex_layout.c| 51 +--
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 10 ++
2 files changed, 50 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
i
---
src/mesa/drivers/dri/i965/brw_defines.h | 3 +++
src/mesa/drivers/dri/i965/gen7_gs_state.c | 4 +++-
src/mesa/drivers/dri/i965/gen7_vs_state.c | 13 -
src/mesa/drivers/dri/i965/gen7_wm_state.c | 3 +++
4 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/src/mesa/dr
This will be used to pass image information to the shader when we
cannot use typed surface reads and writes. All entries except
surface_idx and size are otherwise unused and will get eliminated by
the uniform packing pass. size will be used for bounds checking with
some image formats and will be
And remove duplicated definition of OWORD_DUAL_BLOCK_WRITE.
---
src/mesa/drivers/dri/i965/brw_defines.h | 8 +++-
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 2 +-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa
This moves most of the surface state set-up logic that can be shared
between textures and shader images to a separate function.
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 102 +-
1 file changed, 62 insertions(+), 40 deletions(-)
diff --git a/src/mesa/drivers/dri/i
---
src/mesa/drivers/dri/i965/brw_defines.h| 1 +
src/mesa/drivers/dri/i965/brw_eu.h | 8
src/mesa/drivers/dri/i965/brw_eu_emit.c| 49 ++
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs_g
There doesn't seem to be any reason for nr_params, nr_pull_params,
param, and pull_param to be duplicated in the stage-specific
subclasses of brw_stage_prog_data. Moving their definition to the
common base class will allow some code sharing in a future commit, the
removal of brw_vec4_prog_data_com
This is a series of assorted clean-up and refactoring changes in
preparation for the actual series implementing shader images. The
most important changes in this series are PATCH 06, that defines the
register representation class used by the image built-in lowering
code, and PATCH 07-08, that add
This defines a backend_reg class that contains most of the common
member variables present in the fs and vec4 register classes. It's
simply a location in the register file and doesn't know about indirect
addressing or funky align1/align16 access modes.
Some of the image lowering code coming up is
---
src/mesa/drivers/dri/i965/brw_context.h | 5 +
src/mesa/drivers/dri/i965/brw_shader.cpp | 7 +++
2 files changed, 12 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 1387aa9..3f2edcf 100644
--- a/src/mesa/drivers/dri/
Add assertion that the register is not in the HW_REG or IMM file,
calculate the conjunction of the old and new mask instead of replacing
the old [consistent with the behavior of brw_writemask(), causes no
functional changes right now], make it static inline to let the
compiler do a slightly better
---
src/mesa/drivers/dri/i965/brw_reg.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index 37a2ca9..2591cbf 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_
---
src/mesa/drivers/dri/i965/brw_clip_util.c | 2 +-
src/mesa/drivers/dri/i965/brw_reg.h | 40 +++
2 files changed, 31 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c
b/src/mesa/drivers/dri/i965/brw_clip_util.c
index 24d05
This will be used by the generic implementation of the image and
atomic counter built-ins to extract the register location of its
arguments without having to be aware of the actual visitor type.
---
src/mesa/drivers/dri/i965/brw_fs.h | 3 +++
src/mesa/drivers/dri/i965/brw_fs_visitor.cp
---
src/mesa/drivers/dri/i965/brw_reg.h | 2 ++
src/mesa/drivers/dri/i965/brw_vec4_vp.cpp | 33 +--
2 files changed, 11 insertions(+), 24 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index 66f6aad..37a2ca9
---
src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index 951560b..b19b40d 100644
--- a/src/mesa/drivers/dri/i965/brw_v
---
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 131 +++-
1 file changed, 62 insertions(+), 69 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index b537a5a..5433023 100644
--- a/src/mesa/drivers/dri/i965/brw_f
Until now it was only being taken into account in the VEC4 back-end
but not in the FS back-end. Do it in both cases.
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 10 ++
src/mesa/drivers/dri/i965/brw_shader.h | 7
Most of the VEC4 back-end agrees on src_reg::swizzle being one of the
BRW_SWIZZLE macros defined in brw_reg.h, except in two places where we
use Mesa's SWIZZLE macros. There is even a doxygen comment saying
that Mesa's macros are the right ones. They are incompatible swizzle
representations (3 bi
---
src/mesa/drivers/dri/i965/brw_vec4.h | 24
1 file changed, 24 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index db1604a..8ce3a5e 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i9
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 8
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 73f91a0..4458e76 100644
--- a/src/mesa/drivers/dri/i965/brw_v
It would be nice if we could have a single 'reg_offset' field
expressed in bytes that would serve the purpose of both, but the
semantics of 'reg_offset' are quite complex currently (it's measured
in units of one, eight or sixteen dwords depending on the register
file and the dispatch width) and cha
This way it can be used anywhere. I need it from the visitor.
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 --
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 28 +---
src/mesa/drivers/dri/i965/brw_program.c | 10 +
src/mesa/drivers/dri/i965/br
There doesn't seem to be any reason for it to be a method, and it's
surprising that the expression 'reg.retype(t)' doesn't retype its
object but rather it creates a temporary with the new type. Use
'retype(reg, t)' instead.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 8
src/mesa/
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 29 +++---
src/mesa/drivers/dri/i965/brw_fs.h | 3 +++
.../drivers/dri/i965/brw_fs_copy_propagation.cpp | 7 +-
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 8 +++---
.../drivers/dri/i965/brw_
Like the VEC4 back-end does. It will make dynamic allocation of the
param_size array easier in a future commit.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 51 +---
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++
src/mesa/drivers/dri/i965/brw_fs_fp.cpp |
Yes, we could avoid having four copies of essentially the same code by
using templates here.
---
src/mesa/drivers/dri/i965/brw_fs.h | 8
src/mesa/drivers/dri/i965/brw_shader.h | 8
src/mesa/drivers/dri/i965/brw_vec4.h | 16
3 files changed, 32 insertions(
Useful because the total number of uniform components might exceed
MAX_UNIFORMS * 4 in some cases because of the image metadata we'll be
passing as push constants.
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 +-
src/mesa/drivers/dri/i96
The same effect can be achieved using a combination of ::stride and
::subreg_offset. Remove the less flexible ::smear to keep the data
members of fs_reg orthogonal.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 23 +-
src/mesa/drivers/dri/i965/brw_fs.h
The same effect can be achieved using ::subreg_offset. Remove the
less flexible alternative and define a convenience function to keep
the fs_reg interface sane.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 9 ++---
src/mesa/drivers/dri/i965/brw_fs.h | 11 ++-
src/
And define non-mutating helper functions to retype fixed and normal
regs with a common interface. At some point we may want to get rid of
::fixed_hw_reg completely and have fixed regs use the normal register
data members (e.g. backend_reg::reg to select a fixed GRF number,
src_reg::swizzle to stor
On 25 November 2013 11:08, Ian Romanick wrote:
> On 11/22/2013 03:08 PM, Paul Berry wrote:
> > The ARB_geometry_shader4 spec says, in the list of conditions necessary
> > for framebuffer completeness:
> >
> > * If any framebuffer attachment is layered, all attachments must
> have
> >
On 11/26/2013 09:34 PM, Kenneth Graunke wrote:
On 11/26/2013 05:34 PM, Chad Versace wrote:
Pre-patch, the workaround was applied to only HSW GT3. However, the
workaround also fixes render corruption on the HSW GT1 Chromebook,
codenamed Falco.
CC: Anuj Phogat
CC: Paul Berry
OTC-Tracker: CHRMOS
On 11/26/2013 07:13 PM, Paul Berry wrote:
On 26 November 2013 17:34, Chad Versace wrote:
Pre-patch, the workaround was applied to only HSW GT3. However, the
workaround also fixes render corruption on the HSW GT1 Chromebook,
codenamed Falco.
CC: Anuj Phogat
CC: Paul Berry
OTC-Tracker: CHRMOS-
parent_mem_ctx was unused since db47074a, so remove the two wrappers
around create() and make create() the constructor.
---
src/mesa/drivers/dri/i965/brw_cfg.cpp | 13 +
src/mesa/drivers/dri/i965/brw_cfg.h | 5 +
src/mesa/drivers/dri/i965/brw_dead
---
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
b/src/mesa/drivers/dri/i965/brw_fs_copy_propagat
I translated copysign(0.0f, x) a little too literally.
---
src/glsl/lower_instructions.cpp | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/glsl/lower_instructions.cpp b/src/glsl/lower_instructions.cpp
index d01879c..8f8d448 100644
--- a/src/glsl/lower_instructions.cpp
++
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 10 +-
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index ad1323c..2d41c3f 100644
--- a/src/mesa/drivers/d
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