https://bugs.freedesktop.org/show_bug.cgi?id=58446
Priority: medium
Bug ID: 58446
Keywords: regression
CC: emil.l.veli...@gmail.com
Assignee: mesa-dev@lists.freedesktop.org
Summary: src/glsl/glcpp/imports.h:161: undefined referen
https://bugs.freedesktop.org/show_bug.cgi?id=54626
Alexandre Demers changed:
What|Removed |Added
Summary|llvmpipe's Makefile:|[PATCH] llvmpipe's
https://bugs.freedesktop.org/show_bug.cgi?id=54626
--- Comment #2 from Alexandre Demers ---
Created attachment 71708
--> https://bugs.freedesktop.org/attachment.cgi?id=71708&action=edit
Add missing CXXFLAGS
Fixes cross compiling 32 bit on 64 bit for llvm driver.
--
You are receiving this mai
This patch fixes a case when blitting to a framebuffer with
renderbuffers/textures attached to GL_COLOR_ATTACHMENT{1, 2, ...}.
Earlier we were incorrectly blitting to GL_COLOR_ATTACHMENT0 by default.
It also fixes a blitting case when drawAttachment->Texture ==
readAttachment->Texture. This was ca
This patch rewrites _mesa_meta_BlitFrameBuffer() function to add support
for blitting with GLSL/GLSL ES shaders. These changes were required to
support glBlitFrameBuffer() in gles3. This patch, along with other patches
in this series, make 16 failing framebuffer_blit test cases in gles3
conformance
This intrinsic is translated to ALLOC_EXPORT_WORD1_SWIZ, hence its
name. It is used to store vs/fs outputs
---
lib/Target/AMDGPU/R600ISelLowering.cpp | 23 +--
lib/Target/AMDGPU/R600Instructions.td | 11 +++
lib/Target/AMDGPU/R600Intrinsics.td| 2 ++
3 files chang
---
src/gallium/drivers/r600/r600_llvm.c | 197 ++-
src/gallium/drivers/r600/r600_shader.c | 6 +-
src/gallium/drivers/radeon/radeon_llvm.h | 1 +
3 files changed, 147 insertions(+), 57 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_llvm.c
b/src/gal
AFAICS, your KC registers still represent the constant indices, same as
Cxxx registers previously. The problem with such representation is that
hw supports 16 buffers * 4096 constants per buffer = 65536 constants. So
we'll need 65536 registers for full support, and it looks like a bit too
much of r
On 12/17/2012 02:24 PM, Carl Worth wrote:
Patches 2 and 3 are
Reviewed-by: Ian Romanick
There doesn't appear to be an order dependency with the other patches in
the series. Perhaps these should go in first?
The reference to "correct, see spec" was a bit too vague to be useful,
(particular
On 12/17/2012 02:24 PM, Carl Worth wrote:
The specification requires that query results are processed in order, (when
one query result is returned, all previous query of the same type must also be
available). The implementation was failing this requirement in the case of
BeginQuery and EndQuery w
On 12/17/2012 02:24 PM, Carl Worth wrote:
This avoids the occlusion query erroneously accumulating results during the
meta operation.
This fixes the following es3conform tests:
occlusion_query_draw_occluded.test
occlusion_query_clear
occlusion_query_custom_framebuffer
On Mon, 2012-12-17 at 15:47 +0100, Michel Dänzer wrote:
> On Sam, 2012-12-15 at 23:29 +0400, Vadim Girlin wrote:
> > ---
>
> This patch could use more description (or maybe comments):
>
> What was broken before, e.g. what piglit tests or other apps failed?
>
> How does the patch fix this?
The
On Mon, Dec 17, 2012 at 03:32:23PM +0100, Christian König wrote:
> We shouldn't insert KILL optimization if we don't have a
> kill instruction at all.
>
For both patches: Reviewed-by: Tom Stellard
> Signed-off-by: Christian König
> ---
> lib/Target/AMDGPU/SIISelLowering.cpp | 14
>
The specification requires that query results are processed in order, (when
one query result is returned, all previous query of the same type must also be
available). The implementation was failing this requirement in the case of
BeginQuery and EndQuery with no intervening drawing, (the result woul
This flag allows for the specified behavior that GenQueries reserves a name,
but does not associate an object with it until BeginQuery. We allocate the
object immediately with the new IsQuery flag set to false, and then set the
flag to true at the time of BeginQuery.
This allows us to implement a
The reference to "correct, see spec" was a bit too vague to be useful,
(particularly since the language being referenced here changes between OpenGL
3.1 and OpenGL 4.3).
---
src/mesa/main/queryobj.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/mesa/main/queryobj
This avoids the occlusion query erroneously accumulating results during the
meta operation.
This fixes the following es3conform tests:
occlusion_query_draw_occluded.test
occlusion_query_clear
occlusion_query_custom_framebuffer
occlusion_query_stencil_test
o
On Mon, Dec 17, 2012 at 8:28 PM, wrote:
> From: Jerome Glisse
>
> This bring r600g allmost inline with closed source driver when
> it comes to flushing and synchronization pattern.
>
> v2-v4: history lost somewhere in outer space
> v5: Fix compute size of flushing, use define for flags, update
>
Nice find Roland.
Reviewed-by: Jose Fonseca
Jose
- Original Message -
> From: Roland Scheidegger
>
> Since the idea is to just expand or shrink the bit width but not
> otherwise do
> conversion we also need to adjust the sign bit according to src,
> otherwise
> the conversion code wil
From: Roland Scheidegger
Since the idea is to just expand or shrink the bit width but not otherwise do
conversion we also need to adjust the sign bit according to src, otherwise
the conversion code will incorrectly clamp the values. (Since this only works
for casting to ordinary floats the norm a
From: Jerome Glisse
htile is used for HiZ and HiS support and fast Z/S clears.
This commit just adds the htile setup and Fast Z clear.
We don't take full advantage of HiS with that patch.
v2 really use fast clear, still random issue with some tiles
need to try more flush combination, fix dept
On Mon, Dec 17, 2012 at 2:28 PM, wrote:
> From: Jerome Glisse
>
> This bring r600g allmost inline with closed source driver when
> it comes to flushing and synchronization pattern.
>
> v2-v4: history lost somewhere in outer space
> v5: Fix compute size of flushing, use define for flags, update
>
From: Jerome Glisse
htile is used for HiZ and HiS support and fast Z/S clears.
This commit just adds the htile setup and Fast Z clear.
We don't take full advantage of HiS with that patch.
v2 really use fast clear, still random issue with some tiles
need to try more flush combination, fix dept
From: Jerome Glisse
This bring r600g allmost inline with closed source driver when
it comes to flushing and synchronization pattern.
v2-v4: history lost somewhere in outer space
v5: Fix compute size of flushing, use define for flags, update
worst case cs size requirement for flush, treat rs7
So those were tested on everegreen (caicos, redwood, turks, barts) and on
rv740 and did not regress anything. I can't test other r6xx/r7xx as currently
mesa master trigger lockup on anything else than rv740.
I am gonna merge those by the end of this week.
Cheers,
Jerome
_
On 12/17/2012 10:03 AM, Paul Berry wrote:
brw_emit_vertices contains special case logic to handle the case where
a vertex shader doesn't read any inputs. This special case logic was
incorrectly activating in the case were the only vertex input is
gl_VertexID. As a result, if a shader used gl_Ve
brw_emit_vertices contains special case logic to handle the case where
a vertex shader doesn't read any inputs. This special case logic was
incorrectly activating in the case were the only vertex input is
gl_VertexID. As a result, if a shader used gl_VertexID but used no
other inputs, then all ve
---
src/gallium/drivers/r600/r600_llvm.c | 126 ---
src/gallium/drivers/r600/r600_shader.c | 11 ++-
src/gallium/drivers/radeon/radeon_llvm.h | 1 +
3 files changed, 127 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_llvm.c
b/src/ga
---
src/gallium/drivers/r600/r600_llvm.c | 6 --
src/gallium/drivers/r600/r600_shader.c | 4 +++-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_llvm.c
b/src/gallium/drivers/r600/r600_llvm.c
index 79f6cf0..5efde2d 100644
--- a/src/gallium/driver
---
lib/Target/AMDGPU/R600ISelLowering.cpp| 51 +++
lib/Target/AMDGPU/R600Instructions.td | 5 +++
lib/Target/AMDGPU/R600Intrinsics.td | 4 +++
lib/Target/AMDGPU/R600MachineFunctionInfo.cpp | 1 +
lib/Target/AMDGPU/R600MachineFunctionInfo.h |
---
lib/Target/AMDGPU/AMDGPUIntrinsics.td | 2 +-
.../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 26 +++-
lib/Target/AMDGPU/R600ISelLowering.cpp | 57 +++-
lib/Target/AMDGPU/R600Instructions.td | 4 +-
lib/Target/AMDGPU/R600RegisterInfo.td
On Mon, 2012-12-17 at 15:32 +0100, Christian König wrote:
> We shouldn't insert KILL optimization if we don't have a
> kill instruction at all.
>
> Signed-off-by: Christian König
Both patches are
Tested-by: Michel Dänzer
--
Earthling Michel Dänzer | http://www.a
On Wed, Dec 12, 2012 at 3:25 PM, Anuj Phogat wrote:
> This is required by glBlitFrameBuffer() in gles3. This patch, along with
> other patches in this series, make failing framebuffer_blit test cases in
> gles3 conformancen pass.
>
I noticed few bugs in my glsl implementation of glBlitFrameBuffer(
On 12/16/2012 06:05 PM, Jordan Justen wrote:
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=58380
Signed-off-by: Jordan Justen
Cc: Vinson Lee
---
src/mesa/drivers/osmesa/osmesa.c | 10 +-
src/mesa/drivers/x11/xm_api.c|6 +++---
2 files changed, 8 insertions(+), 8 deleti
For both patches:
Reviewed-by: Tom Stellard
On Sun, Dec 16, 2012 at 09:05:49PM +0100, Vincent Lejeune wrote:
> ---
> src/gallium/drivers/r600/eg_asm.c| 2 ++
> src/gallium/drivers/r600/r600_asm.c | 2 ++
> src/gallium/drivers/r600/r600_llvm.c | 20
> src/
On Sat, Dec 15, 2012 at 05:53:26PM +0400, Vadim Girlin wrote:
> Use bitwise comparison to check whether we can replace float literal
> with inline constant (0.0, 0.5, 1.0), otherwise we can get unexpected
> results for integer literals bitcasted to float.
>
> Fixes lockup with glsl-fs-unroll-out-p
On Sam, 2012-12-15 at 23:29 +0400, Vadim Girlin wrote:
> ---
This patch could use more description (or maybe comments):
What was broken before, e.g. what piglit tests or other apps failed?
How does the patch fix this?
...
--
Earthling Michel Dänzer | http://www.a
On Sam, 2012-12-15 at 23:27 +0400, Vadim Girlin wrote:
> ---
> lib/Target/AMDGPU/R600Instructions.td | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/lib/Target/AMDGPU/R600Instructions.td
> b/lib/Target/AMDGPU/R600Instructions.td
> index 5900794..6364645 100644
> --- a/l
Some instructions like memory reads/writes are executed
asynchronously, so we need to insert S_WAITCNT instructions
to block before accessing their results. Previously we have
just inserted S_WAITCNT instructions after each async
instruction, this patch fixes this and adds a prober
insertion pass.
We shouldn't insert KILL optimization if we don't have a
kill instruction at all.
Signed-off-by: Christian König
---
lib/Target/AMDGPU/SIISelLowering.cpp | 14
lib/Target/AMDGPU/SIISelLowering.h |2 -
lib/Target/AMDGPU/SIInstructions.td | 24 +++---
lib/Target/AMDGPU/
On Friday, December 14, 2012 11:38:04 AM Eric Anholt wrote:
> Abdiel Janulgue writes:
> > This patch set adds support for KHR_gl_texture_2D_image,
> > KHR_gl_texture_cubemap_image and KHR_gl_texture_3D_image for Gen 4 ->
> > Gen7 HW. The extension enables us to be a bit more conformant to the
> >
https://bugs.freedesktop.org/show_bug.cgi?id=57173
--- Comment #5 from Andreas Boll ---
Please attach your Xorg.log and the outputs from dmesg and glxinfo.
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