- On Mar 23, 2018, at 5:22 PM, Michael Jeanson mjean...@efficios.com wrote:
> On 2018-03-21 19:00, Mathieu Desnoyers wrote:
>> - On Mar 21, 2018, at 5:38 PM, Michael Jeanson mjean...@efficios.com
>> wrote:
>>
>>> Tested in QEMU 2.12.0-rc0, requires --disable-compiler-tls to go
>>> throu
On 2018-03-21 19:00, Mathieu Desnoyers wrote:
> - On Mar 21, 2018, at 5:38 PM, Michael Jeanson mjean...@efficios.com
> wrote:
>
>> Tested in QEMU 2.12.0-rc0, requires --disable-compiler-tls to go
>> through the benchmarks reliably.
>
> Is it possible to find a RISC-V board in the wild ? (for
- On Mar 21, 2018, at 5:38 PM, Michael Jeanson mjean...@efficios.com wrote:
> Tested in QEMU 2.12.0-rc0, requires --disable-compiler-tls to go
> through the benchmarks reliably.
Is it possible to find a RISC-V board in the wild ? (for testing ?)
I've seen gcc builtins get it wrong barrier-wi
