Evan,
Please add a comment in PPCBranchSelect as to what "2" means
in .addImm(2)
On Aug 25, 2006, at 2:54 PM, Evan Cheng wrote:
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.190 -> 1.191
PPCBranchSelector.cpp updated: 1.25 -> 1.26
---
Log message:
Encode pc
Changes in directory llvm/include/llvm/CodeGen:
MachOWriter.h updated: 1.4 -> 1.5
---
Log message:
Properly size the string table, and emit symbol table and string table
entries in the correct order, fixing several fixmes.
---
Diffs of the changes: (+36 -19)
MachOWriter.h | 55 ++
Changes in directory llvm/lib/CodeGen:
MachOWriter.cpp updated: 1.2 -> 1.3
---
Log message:
Properly size the string table, and emit symbol table and string table
entries in the correct order, fixing several fixmes.
---
Diffs of the changes: (+82 -60)
MachOWriter.cpp | 142 +++
Changes in directory llvm/lib/Target/PowerPC:
PPCJITInfo.cpp updated: 1.27 -> 1.28
PPCJITInfo.h updated: 1.12 -> 1.13
PPCTargetMachine.cpp updated: 1.100 -> 1.101
---
Log message:
Make ppc64 jit kinda work right. About 2/3 of Olden passes with this,
there are clearly some encoding bugs lurking
Changes in directory llvm/lib/Target/PowerPC:
PPCTargetMachine.cpp updated: 1.105 -> 1.106
---
Log message:
We actually do support object file writing, so don't return true (error)
---
Diffs of the changes: (+1 -3)
PPCTargetMachine.cpp |4 +---
1 files changed, 1 insertion(+), 3 deleti
Changes in directory llvm/lib/CodeGen:
MachOWriter.cpp updated: 1.4 -> 1.5
---
Log message:
First pass at supporting relocations. Relocations are written correctly to
the file now, however the relocated address is currently wrong. Fixing
that will require some deep pondering.
---
Diffs of t
Changes in directory llvm/lib/Target/PowerPC:
PPCJITInfo.cpp updated: 1.28 -> 1.29
PPCMachOWriter.cpp updated: 1.3 -> 1.4
PPCRelocations.h updated: 1.9 -> 1.10
---
Log message:
First pass at supporting relocations. Relocations are written correctly to
the file now, however the relocated addres
Changes in directory llvm/include/llvm/CodeGen:
MachOWriter.h updated: 1.5 -> 1.6
---
Log message:
First pass at supporting relocations. Relocations are written correctly to
the file now, however the relocated address is currently wrong. Fixing
that will require some deep pondering.
---
Dif
Changes in directory llvm/lib/CodeGen:
MachOWriter.cpp updated: 1.5 -> 1.6
---
Log message:
Behold, more work on relocations. Things are looking pretty good now.
---
Diffs of the changes: (+106 -38)
MachOWriter.cpp | 144 +---
1 files c
Changes in directory llvm/lib/ExecutionEngine/JIT:
JITEmitter.cpp updated: 1.111 -> 1.112
---
Log message:
Behold, more work on relocations. Things are looking pretty good now.
---
Diffs of the changes: (+1 -1)
JITEmitter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Ind
Changes in directory llvm/lib/Target/PowerPC:
PPCMachOWriter.cpp updated: 1.4 -> 1.5
PPCRelocations.h updated: 1.10 -> 1.11
---
Log message:
Behold, more work on relocations. Things are looking pretty good now.
---
Diffs of the changes: (+70 -40)
PPCMachOWriter.cpp | 106
Changes in directory llvm/include/llvm/CodeGen:
MachOWriter.h updated: 1.6 -> 1.7
---
Log message:
Behold, more work on relocations. Things are looking pretty good now.
---
Diffs of the changes: (+36 -11)
MachOWriter.h | 47 ---
1 files change
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.210 -> 1.211
PPCInstrInfo.td updated: 1.241 -> 1.242
README.txt updated: 1.99 -> 1.100
---
Log message:
Fold AND and ROTL more often
---
Diffs of the changes: (+62 -62)
PPCISelDAGToDAG.cpp | 66 +
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
rlwinm2.ll added (r1.1)
---
Log message:
Testcase for better rotate left and mask support
---
Diffs of the changes: (+30 -0)
rlwinm2.ll | 30 ++
1 files changed, 30 insertions(+)
Index: llvm/test/Reg
Changes in directory llvm/lib/Target/PowerPC:
PPCHazardRecognizers.cpp updated: 1.3 -> 1.4
PPCHazardRecognizers.h updated: 1.1 -> 1.2
---
Log message:
This kinda sorta implements "things that have to lead a dispatch group".
---
Diffs of the changes: (+42 -17)
PPCHazardRecognizers.cpp | 5
Changes in directory llvm/include/llvm/Analysis:
PostDominators.h updated: 1.10 -> 1.11
---
Log message:
Fix PR681: http://llvm.cs.uiuc.edu/PR681 by using the standard Lengauer and
Tarjan algorithm for dominator
set construction, rather than intersecting various std::sets. This reduces
the m
Changes in directory llvm/lib/Analysis:
PostDominators.cpp updated: 1.54 -> 1.55
---
Log message:
Fix PR681: http://llvm.cs.uiuc.edu/PR681 by using the standard Lengauer and
Tarjan algorithm for dominator
set construction, rather than intersecting various std::sets. This reduces
the memory u
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.182 -> 1.183
---
Log message:
Update scheduling info for vrsave instruction
---
Diffs of the changes: (+2 -2)
PPCInstrInfo.td |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/Powe
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.70 -> 1.71
---
Log message:
Another case we could do better on.
---
Diffs of the changes: (+11 -0)
README.txt | 11 +++
1 files changed, 11 insertions(+)
Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/l
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.72 -> 1.73
---
Log message:
Notes on how to kill the eeevil brtwoway, and make ppc branch selector
more target independant, generate better code, and be less conservative.
---
Diffs of the changes: (+28 -0)
README.txt |
Changes in directory llvm/lib/Target:
README.txt updated: 1.21 -> 1.22
---
Log message:
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
---
Diffs of the changes: (+5 -1)
README
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.107 -> 1.108
---
Log message:
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
---
Diffs of the changes: (
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.35 -> 1.36
---
Log message:
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
---
Diffs of the changes: (
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.110 -> 1.111
---
Log message:
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
---
Diffs of the chang
Changes in directory llvm/lib/Target/Sparc:
SparcISelDAGToDAG.cpp updated: 1.88 -> 1.89
---
Log message:
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
---
Diffs of the changes:
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.126 -> 1.127
LegalizeDAG.cpp updated: 1.315 -> 1.316
SelectionDAG.cpp updated: 1.270 -> 1.271
SelectionDAGISel.cpp updated: 1.192 -> 1.193
---
Log message:
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWO
Changes in directory llvm/lib/Target/Alpha:
AlphaISelLowering.cpp updated: 1.40 -> 1.41
---
Log message:
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
---
Diffs of the changes:
Changes in directory llvm/lib/Target/PowerPC:
PPCBranchSelector.cpp updated: 1.21 -> 1.22
PPCISelDAGToDAG.cpp updated: 1.168 -> 1.169
PPCISelLowering.cpp updated: 1.96 -> 1.97
PPCInstrInfo.td updated: 1.185 -> 1.186
README.txt updated: 1.73 -> 1.74
---
Log message:
Remove BRTWOWAY*
Make the PPC
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
neg.ll added (r1.1)
---
Log message:
Add a missing testcase
---
Diffs of the changes: (+6 -0)
neg.ll |6 ++
1 files changed, 6 insertions(+)
Index: llvm/test/Regression/CodeGen/PowerPC/neg.ll
diff -c /dev/null llvm/test/R
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.186 -> 1.187
---
Log message:
Fix subfic to match subc by default instead of sub so that it is correctly
cost-modeled as producing a flag. This fixes the test I just added for neg
---
Diffs of the changes: (+2 -2)
PP
Changes in directory llvm/include/llvm/Analysis:
PostDominators.h updated: 1.11 -> 1.12
Dominators.h updated: 1.53 -> 1.54
---
Log message:
Move some common data structures between dom and pdom into the base class
---
Diffs of the changes: (+16 -32)
Dominators.h | 32
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.77 -> 1.78
---
Log message:
Update readme
---
Diffs of the changes: (+34 -0)
README.txt | 34 ++
1 files changed, 34 insertions(+)
Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.256 -> 1.257
---
Log message:
Add support for 8 bit immediates with 16/32 bit cmp instructions
---
Diffs of the changes: (+16 -0)
X86InstrInfo.td | 16
1 files changed, 16 insertions(+)
Index: llvm/li
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.73 -> 1.74
---
Log message:
Readme note
---
Diffs of the changes: (+7 -0)
README.txt |7 +++
1 files changed, 7 insertions(+)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.73 llvm/lib
Changes in directory llvm/lib/Target/Sparc:
SparcISelDAGToDAG.cpp updated: 1.90 -> 1.91
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGISel.h updated: 1.11 -> 1.12
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approac
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.206 -> 1.207
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.133 -> 1.134
X86TargetMachine.cpp updated: 1.110 -> 1.111
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
sea
Changes in directory llvm-test:
Makefile.programs updated: 1.201 -> 1.202
---
Log message:
Make disable-lower-switch the default tonight for x86
---
Diffs of the changes: (+1 -1)
Makefile.programs |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm-test/Makefile.program
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.114 -> 1.115
---
Log message:
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approa
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.117 -> 1.118
PPCInstrAltivec.td updated: 1.16 -> 1.17
README_ALTIVEC.txt updated: 1.3 -> 1.4
---
Log message:
Add a few more altivec intrinsics
---
Diffs of the changes: (+28 -6)
PPCISelLowering.cpp |4 ++--
P
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.17 -> 1.18
---
Log message:
Fix a couple typos
---
Diffs of the changes: (+2 -2)
PPCInstrAltivec.td |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstrAltivec.td
Changes in directory llvm/include/llvm:
IntrinsicsPowerPC.td updated: 1.8 -> 1.9
---
Log message:
Add a few more altivec intrinsics
---
Diffs of the changes: (+24 -1)
IntrinsicsPowerPC.td | 25 -
1 files changed, 24 insertions(+), 1 deletion(-)
Index: llvm/inclu
Changes in directory llvm/lib/Target/Alpha:
AlphaTargetMachine.cpp updated: 1.22 -> 1.23
---
Log message:
Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly.
---
Diffs of the changes: (+0 -6)
AlphaTargetMachine.cpp |6 --
Changes in directory llvm/lib/Target/PowerPC:
PPCTargetMachine.cpp updated: 1.85 -> 1.86
---
Log message:
Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly.
---
Diffs of the changes: (+0 -6)
PPCTargetMachine.cpp |6
Changes in directory llvm/lib/Target/Sparc:
SparcTargetMachine.cpp updated: 1.43 -> 1.44
---
Log message:
Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly.
---
Diffs of the changes: (+0 -3)
SparcTargetMachine.cpp |3 --
Changes in directory llvm/lib/Target/IA64:
IA64TargetMachine.cpp updated: 1.13 -> 1.14
---
Log message:
Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly.
---
Diffs of the changes: (+0 -3)
IA64TargetMachine.cpp |3 ---
Changes in directory llvm/lib/Target/X86:
X86TargetMachine.cpp updated: 1.111 -> 1.112
---
Log message:
Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly.
---
Diffs of the changes: (+0 -10)
X86TargetMachine.cpp | 10 -
TXT:1.46 llvm/CREDITS.TXT:1.47
--- llvm/CREDITS.TXT:1.46 Thu Mar 23 17:21:29 2006
+++ llvm/CREDITS.TXTTue Apr 11 00:47:45 2006
@@ -18,7 +18,8 @@
N: Nate Begeman
E: [EMAIL PROTECTED]
-D: Primary PowerPC backend developer
+D: PowerPC backend developer
+D: Target-independent code gener
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.55 -> 1.56
---
Log message:
Fix PR727: http://llvm.cs.uiuc.edu/PR727 , correctly handling large stack
aligments on ppc
---
Diffs of the changes: (+28 -32)
PPCRegisterInfo.cpp | 60 --
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.56 -> 1.57
---
Log message:
Fix SingleSource/UnitTests/Vector/sumarray-dbl
---
Diffs of the changes: (+3 -4)
PPCRegisterInfo.cpp |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
Index: llvm/lib/T
Changes in directory llvm/include/llvm/CodeGen:
MachineConstantPool.h updated: 1.14 -> 1.15
---
Log message:
Fix a copy & paste error from long ago.
---
Diffs of the changes: (+1 -1)
MachineConstantPool.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/
Changes in directory llvm/lib/Target/PowerPC:
PPCCodeEmitter.cpp updated: 1.50 -> 1.51
PPCJITInfo.cpp updated: 1.17 -> 1.18
PPCTargetMachine.cpp updated: 1.86 -> 1.87
---
Log message:
Change the PPC JIT to use a Static relocation model
---
Diffs of the changes: (+4 -29)
PPCCodeEmitter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCTargetMachine.cpp updated: 1.87 -> 1.88
---
Log message:
Fix the comment
---
Diffs of the changes: (+1 -1)
PPCTargetMachine.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
d
Changes in directory llvm/lib/ExecutionEngine:
ExecutionEngine.cpp updated: 1.79 -> 1.80
---
Log message:
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enha
Changes in directory llvm/lib/Target/Alpha:
AlphaAsmPrinter.cpp updated: 1.33 -> 1.34
AlphaISelLowering.cpp updated: 1.46 -> 1.47
---
Log message:
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PI
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.196 -> 1.197
---
Log message:
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced
3
+ //===-- CodeGen/MachineJumpTableInfo.h - Abstract Jump Tables --*- C++
-*-===//
+ //
+ // The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Nate Begeman and is distributed under the
+ // University of Illinois Open Source License. See
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.163 -> 1.164
PPCCodeEmitter.cpp updated: 1.52 -> 1.53
PPCISelDAGToDAG.cpp updated: 1.179 -> 1.180
PPCISelLowering.cpp updated: 1.167 -> 1.168
PPCInstrInfo.td updated: 1.217 -> 1.218
---
Log message:
JumpTable support! W
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.66 -> 1.67
---
Log message:
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in
Changes in directory llvm/lib/ExecutionEngine/JIT:
JITEmitter.cpp updated: 1.82 -> 1.83
---
Log message:
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhan
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.58 -> 1.59
ELFWriter.cpp updated: 1.17 -> 1.18
MachineCodeEmitter.cpp updated: 1.25 -> 1.26
MachineFunction.cpp updated: 1.87 -> 1.88
MachineInstr.cpp updated: 1.110 -> 1.111
---
Log message:
JumpTable support! What this represen
Changes in directory llvm/lib/Target/Sparc:
SparcAsmPrinter.cpp updated: 1.57 -> 1.58
SparcISelDAGToDAG.cpp updated: 1.91 -> 1.92
---
Log message:
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PI
Changes in directory llvm/lib/Target/IA64:
IA64AsmPrinter.cpp updated: 1.25 -> 1.26
IA64ISelLowering.cpp updated: 1.36 -> 1.37
---
Log message:
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.33 -> 1.34
X86AsmPrinter.cpp updated: 1.172 -> 1.173
X86AsmPrinter.h updated: 1.14 -> 1.15
X86CodeEmitter.cpp updated: 1.93 -> 1.94
X86ISelLowering.cpp updated: 1.182 -> 1.183
X86InstrInfo.td updated: 1.260 -> 1.261
X86Int
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.369 -> 1.370
ScheduleDAG.cpp updated: 1.81 -> 1.82
SelectionDAG.cpp updated: 1.301 -> 1.302
SelectionDAGISel.cpp updated: 1.223 -> 1.224
---
Log message:
JumpTable support! What this represents is working asm and ji
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.261 -> 1.262
---
Log message:
Optimized stores to the constant pool, while cool, are unnecessary.
---
Diffs of the changes: (+0 -3)
X86InstrInfo.td |3 ---
1 files changed, 3 deletions(-)
Index: llvm/lib/Target/X86/
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.224 -> 1.225
---
Log message:
Turn of jump tables for a bit, there are still some issues to work out with
updating the machine CFG.
---
Diffs of the changes: (+1 -1)
SelectionDAGISel.cpp |2 +-
1 files
Changes in directory llvm/include/llvm/CodeGen:
MachineCodeEmitter.h updated: 1.29 -> 1.30
MachineJumpTableInfo.h updated: 1.1 -> 1.2
---
Log message:
Code cleanup associated with jump tables, thanks to Chris for noticing
these.
---
Diffs of the changes: (+11 -9)
MachineCodeEmitter.h |
Changes in directory llvm/lib/CodeGen:
MachineFunction.cpp updated: 1.88 -> 1.89
---
Log message:
Code cleanup associated with jump tables, thanks to Chris for noticing
these.
---
Diffs of the changes: (+8 -0)
MachineFunction.cpp |8
1 files changed, 8 insertions(+)
Index: l
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.225 -> 1.226
---
Log message:
Fix the updating of the machine CFG when a PHI node was in a successor of
the jump table's range check block. This re-enables 100% dense jump tables
by default on PPC & x86
---
D
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGISel.h updated: 1.13 -> 1.14
---
Log message:
Fix the updating of the machine CFG when a PHI node was in a successor of
the jump table's range check block. This re-enables 100% dense jump tables
by default on PPC & x86
---
Diffs of
Changes in directory llvm/lib/Target/PowerPC:
PPCJITInfo.cpp updated: 1.18 -> 1.19
---
Log message:
No functionality changes, but cleaner code with correct comments.
---
Diffs of the changes: (+41 -35)
PPCJITInfo.cpp | 76 ++---
1 files
Changes in directory llvm/lib/ExecutionEngine/JIT:
JITEmitter.cpp updated: 1.83 -> 1.84
---
Log message:
Fix a warning
---
Diffs of the changes: (+1 -1)
JITEmitter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp
diff -u llv
Changes in directory llvm/lib/Target/X86:
X86JITInfo.cpp updated: 1.15 -> 1.16
---
Log message:
Keep the stack from on darwin 16-byte aligned. This fixes many JIT
failres.
---
Diffs of the changes: (+13 -2)
X86JITInfo.cpp | 15 +--
1 files changed, 13 insertions(+), 2 deleti
Changes in directory llvm/lib/Target/PowerPC:
PPCJITInfo.cpp updated: 1.19 -> 1.20
---
Log message:
Update the PPC compilation callback code to not need weird abi-violating
prologs and epilogs, keep all the asm in one place, and remove use of
compiler builtin functions.
---
Diffs of the chan
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.164 -> 1.165
---
Log message:
Extend printBasicBlockLabel a bit so that it can be used to print all
basic block labels, consolidating the code to do so in one place for each
target.
---
Diffs of the changes: (+13 -9)
Changes in directory llvm/include/llvm/CodeGen:
AsmPrinter.h updated: 1.36 -> 1.37
---
Log message:
Extend printBasicBlockLabel a bit so that it can be used to print all
basic block labels, consolidating the code to do so in one place for each
target.
---
Diffs of the changes: (+3 -1)
Asm
Changes in directory llvm/lib/Target/IA64:
IA64AsmPrinter.cpp updated: 1.26 -> 1.27
---
Log message:
Extend printBasicBlockLabel a bit so that it can be used to print all
basic block labels, consolidating the code to do so in one place for each
target.
---
Diffs of the changes: (+4 -4)
IA
Changes in directory llvm/lib/Target/Sparc:
SparcAsmPrinter.cpp updated: 1.58 -> 1.59
---
Log message:
Extend printBasicBlockLabel a bit so that it can be used to print all
basic block labels, consolidating the code to do so in one place for each
target.
---
Diffs of the changes: (+4 -4)
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.37 -> 1.38
X86AsmPrinter.cpp updated: 1.173 -> 1.174
X86AsmPrinter.h updated: 1.15 -> 1.16
X86IntelAsmPrinter.cpp updated: 1.35 -> 1.36
---
Log message:
Extend printBasicBlockLabel a bit so that it can be used to print al
Changes in directory llvm/lib/Target/Alpha:
AlphaAsmPrinter.cpp updated: 1.34 -> 1.35
---
Log message:
Extend printBasicBlockLabel a bit so that it can be used to print all
basic block labels, consolidating the code to do so in one place for each
target.
---
Diffs of the changes: (+2 -3)
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.63 -> 1.64
---
Log message:
Extend printBasicBlockLabel a bit so that it can be used to print all
basic block labels, consolidating the code to do so in one place for each
target.
---
Diffs of the changes: (+8 -3)
AsmPrinter
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.165 -> 1.166
---
Log message:
Hooray, everyone now uses the same printBasicBlockLabel implementation
---
Diffs of the changes: (+3 -20)
PPCAsmPrinter.cpp | 23 +++
1 files changed, 3 insertions
Changes in directory llvm/lib/Target/X86:
X86AsmPrinter.cpp updated: 1.174 -> 1.175
X86AsmPrinter.h updated: 1.16 -> 1.17
---
Log message:
Hooray, everyone now uses the same printBasicBlockLabel implementation
---
Diffs of the changes: (+0 -16)
X86AsmPrinter.cpp | 12
X86Asm
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.64 -> 1.65
---
Log message:
Print function number instead of name
---
Diffs of the changes: (+2 -3)
AsmPrinter.cpp |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.61 -> 1.62
PPCRegisterInfo.td updated: 1.34 -> 1.35
---
Log message:
Since we don't handle callee-save CRs right yet, don't allocate them. Also
don't step on R11 in the middle of a function when saving and restoring C
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.100 -> 1.101
---
Log message:
Remove some stuff from the README
---
Diffs of the changes: (+0 -21)
README.txt | 21 -
1 files changed, 21 deletions(-)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.232 -> 1.233
---
Log message:
Finish up the initial jump table implementation by allowing jump tables to
not be 100% dense. Increase the minimum threshold for the number of cases
in a switch statement from 4 to
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.99 -> 1.100
---
Log message:
Teach the x86 jit how to handle jump tables not directly used by a jump
instruction.
---
Diffs of the changes: (+3 -0)
X86CodeEmitter.cpp |3 +++
1 files changed, 3 insertions(+)
Inde
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGISel.h updated: 1.16 -> 1.17
---
Log message:
Somehow, I missed this part of the checkin a couple days ago
---
Diffs of the changes: (+0 -3)
SelectionDAGISel.h |3 ---
1 files changed, 3 deletions(-)
Index: llvm/include/llvm
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.180 -> 1.181
---
Log message:
New rlwimi implementation, which is superior to the old one. There are
still a couple missed optimizations, but we now generate all the possible
rlwimis for multiple inserts into the same
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGISel.h updated: 1.17 -> 1.18
---
Log message:
Remove unncessary include
---
Diffs of the changes: (+0 -1)
SelectionDAGISel.h |1 -
1 files changed, 1 deletion(-)
Index: llvm/include/llvm/CodeGen/SelectionDAGISel.h
diff -u ll
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.162 -> 1.163
---
Log message:
Fix PR772: http://llvm.cs.uiuc.edu/PR772
---
Diffs of the changes: (+9 -9)
DAGCombiner.cpp | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
Index: llvm
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.181 -> 1.182
README.txt updated: 1.86 -> 1.87
---
Log message:
Update some stuff now that the new rlwimi code has gone in
---
Diffs of the changes: (+0 -70)
PPCISelDAGToDAG.cpp |1
README.txt | 69
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.236 -> 1.237
---
Log message:
Make emission of jump tables a bit less conservative; they are now required
to be only 31.25% dense, rather than 75% dense.
---
Diffs of the changes: (+4 -4)
SelectionDAGISel.c
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.182 -> 1.183
README.txt updated: 1.87 -> 1.88
---
Log message:
Fold more shifts into inserts, and update the README
---
Diffs of the changes: (+34 -20)
PPCISelDAGToDAG.cpp | 39 +++---
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.88 -> 1.89
---
Log message:
Proving once again that I am not as smart as the compiler
---
Diffs of the changes: (+1 -2)
README.txt |3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
Index: llvm/lib/Target/PowerP
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.89 -> 1.90
---
Log message:
New note about something bad happening in target independent optimizers
---
Diffs of the changes: (+18 -2)
README.txt | 20 ++--
1 files changed, 18 insertions(+), 2 deletions(
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.90 -> 1.91
---
Log message:
Yet more readme updating
---
Diffs of the changes: (+22 -36)
README.txt | 58 ++
1 files changed, 22 insertions(+), 36 deletions(-)
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