Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.33 -> 1.34 X86AsmPrinter.cpp updated: 1.172 -> 1.173 X86AsmPrinter.h updated: 1.14 -> 1.15 X86CodeEmitter.cpp updated: 1.93 -> 1.94 X86ISelLowering.cpp updated: 1.182 -> 1.183 X86InstrInfo.td updated: 1.260 -> 1.261 X86IntelAsmPrinter.cpp updated: 1.26 -> 1.27 --- Log message: JumpTable support! What this represents is working asm and jit support for x86 and ppc for 100% dense switch statements when relocations are non-PIC. This support will be extended and enhanced in the coming days to support PIC, and less dense forms of jump tables. --- Diffs of the changes: (+71 -26) X86ATTAsmPrinter.cpp | 20 +++++++++++++------- X86AsmPrinter.cpp | 9 +++++++++ X86AsmPrinter.h | 2 ++ X86CodeEmitter.cpp | 24 +++++++++++++++--------- X86ISelLowering.cpp | 19 +++++++++++++++++-- X86InstrInfo.td | 14 +++++++++++++- X86IntelAsmPrinter.cpp | 9 ++------- 7 files changed, 71 insertions(+), 26 deletions(-) Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.33 llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.34 --- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.33 Fri Apr 7 15:44:42 2006 +++ llvm/lib/Target/X86/X86ATTAsmPrinter.cpp Sat Apr 22 13:53:45 2006 @@ -38,6 +38,9 @@ // Print out constants referenced by the function EmitConstantPool(MF.getConstantPool()); + // Print out jump tables referenced by the function + EmitJumpTableInfo(MF.getJumpTableInfo()); + // Print out labels for the function. const Function *F = MF.getFunction(); switch (F->getLinkage()) { @@ -120,18 +123,21 @@ O << '$'; O << (int)MO.getImmedValue(); return; - case MachineOperand::MO_MachineBasicBlock: { - MachineBasicBlock *MBBOp = MO.getMachineBasicBlock(); - O << PrivateGlobalPrefix << "BB" - << Mang->getValueName(MBBOp->getParent()->getFunction()) - << "_" << MBBOp->getNumber () << "\t# " - << MBBOp->getBasicBlock ()->getName (); + case MachineOperand::MO_MachineBasicBlock: + printBasicBlockLabel(MO.getMachineBasicBlock()); return; - } case MachineOperand::MO_PCRelativeDisp: std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs"; abort (); return; + case MachineOperand::MO_JumpTableIndex: { + bool isMemOp = Modifier && !strcmp(Modifier, "mem"); + if (!isMemOp) O << '$'; + O << PrivateGlobalPrefix << "JTI" << getFunctionNumber() << "_" + << MO.getJumpTableIndex(); + // FIXME: PIC relocation model + return; + } case MachineOperand::MO_ConstantPoolIndex: { bool isMemOp = Modifier && !strcmp(Modifier, "mem"); if (!isMemOp) O << '$'; Index: llvm/lib/Target/X86/X86AsmPrinter.cpp diff -u llvm/lib/Target/X86/X86AsmPrinter.cpp:1.172 llvm/lib/Target/X86/X86AsmPrinter.cpp:1.173 --- llvm/lib/Target/X86/X86AsmPrinter.cpp:1.172 Thu Mar 23 12:09:44 2006 +++ llvm/lib/Target/X86/X86AsmPrinter.cpp Sat Apr 22 13:53:45 2006 @@ -54,6 +54,7 @@ ZeroDirective = "\t.space\t"; // ".space N" emits N zeros. PrivateGlobalPrefix = "L"; // Marker for constant pool idxs ConstantPoolSection = "\t.const\n"; + JumpTableSection = "\t.const\n"; // FIXME: depends on PIC mode LCOMMDirective = "\t.lcomm\t"; COMMDirectiveTakesAlignment = false; HasDotTypeDotSizeDirective = false; @@ -205,6 +206,14 @@ return false; // success } +void X86SharedAsmPrinter::printBasicBlockLabel(const MachineBasicBlock *MBB) + const { + O << PrivateGlobalPrefix << "BB" + << Mang->getValueName(MBB->getParent()->getFunction()) + << "_" << MBB->getNumber() << '\t' << CommentString + << MBB->getBasicBlock()->getName(); +} + /// createX86CodePrinterPass - Returns a pass that prints the X86 assembly code /// for a MachineFunction to the given output stream, using the given target /// machine description. Index: llvm/lib/Target/X86/X86AsmPrinter.h diff -u llvm/lib/Target/X86/X86AsmPrinter.h:1.14 llvm/lib/Target/X86/X86AsmPrinter.h:1.15 --- llvm/lib/Target/X86/X86AsmPrinter.h:1.14 Mon Mar 13 17:20:37 2006 +++ llvm/lib/Target/X86/X86AsmPrinter.h Sat Apr 22 13:53:45 2006 @@ -88,6 +88,8 @@ MI->getOperand(Op+3).isGlobalAddress() || MI->getOperand(Op+3).isConstantPoolIndex()); } + + virtual void printBasicBlockLabel(const MachineBasicBlock *MBB) const; }; } // end namespace llvm Index: llvm/lib/Target/X86/X86CodeEmitter.cpp diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.93 llvm/lib/Target/X86/X86CodeEmitter.cpp:1.94 --- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.93 Tue Mar 21 20:52:03 2006 +++ llvm/lib/Target/X86/X86CodeEmitter.cpp Sat Apr 22 13:53:45 2006 @@ -35,8 +35,8 @@ class Emitter : public MachineFunctionPass { const X86InstrInfo *II; MachineCodeEmitter &MCE; - std::map<const MachineBasicBlock*, unsigned> BasicBlockAddrs; - std::vector<std::pair<const MachineBasicBlock *, unsigned> > BBRefs; + std::map<MachineBasicBlock*, uint64_t> BasicBlockAddrs; + std::vector<std::pair<MachineBasicBlock *, unsigned> > BBRefs; public: explicit Emitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {} Emitter(MachineCodeEmitter &mce, const X86InstrInfo& ii) @@ -51,9 +51,8 @@ void emitInstruction(const MachineInstr &MI); private: - void emitBasicBlock(const MachineBasicBlock &MBB); - - void emitPCRelativeBlockAddress(const MachineBasicBlock *BB); + void emitBasicBlock(MachineBasicBlock &MBB); + void emitPCRelativeBlockAddress(MachineBasicBlock *MBB); void emitPCRelativeValue(unsigned Address); void emitGlobalAddressForCall(GlobalValue *GV, bool isTailCall); void emitGlobalAddressForPtr(GlobalValue *GV, int Disp = 0); @@ -84,8 +83,10 @@ MCE.startFunction(MF); MCE.emitConstantPool(MF.getConstantPool()); + MCE.initJumpTableInfo(MF.getJumpTableInfo()); for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) emitBasicBlock(*I); + MCE.emitJumpTableInfo(MF.getJumpTableInfo(), BasicBlockAddrs); MCE.finishFunction(MF); // Resolve all forward branches now... @@ -99,7 +100,7 @@ return false; } -void Emitter::emitBasicBlock(const MachineBasicBlock &MBB) { +void Emitter::emitBasicBlock(MachineBasicBlock &MBB) { if (uint64_t Addr = MCE.getCurrentPCValue()) BasicBlockAddrs[&MBB] = Addr; @@ -119,11 +120,10 @@ /// (because this is a forward branch), it keeps track of the information /// necessary to resolve this address later (and emits a dummy value). /// -void Emitter::emitPCRelativeBlockAddress(const MachineBasicBlock *MBB) { +void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) { // If this is a backwards branch, we already know the address of the target, // so just emit the value. - std::map<const MachineBasicBlock*, unsigned>::iterator I = - BasicBlockAddrs.find(MBB); + std::map<MachineBasicBlock*,uint64_t>::iterator I = BasicBlockAddrs.find(MBB); if (I != BasicBlockAddrs.end()) { emitPCRelativeValue(I->second); } else { @@ -242,6 +242,8 @@ } else if (Op3.isConstantPoolIndex()) { DispVal += MCE.getConstantPoolEntryAddress(Op3.getConstantPoolIndex()); DispVal += Op3.getOffset(); + } else if (Op3.isJumpTableIndex()) { + DispVal += MCE.getJumpTableEntryAddress(Op3.getJumpTableIndex()); } else { DispVal = Op3.getImmedValue(); } @@ -445,6 +447,10 @@ assert(sizeOfImm(Desc) == 4 && "Don't know how to emit non-pointer values!"); emitExternalSymbolAddress(MO1.getSymbolName(), false, false); + } else if (MO1.isJumpTableIndex()) { + assert(sizeOfImm(Desc) == 4 && + "Don't know how to emit non-pointer values!"); + emitConstant(MCE.getJumpTableEntryAddress(MO1.getJumpTableIndex()), 4); } else { emitConstant(MO1.getImmedValue(), sizeOfImm(Desc)); } Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.182 llvm/lib/Target/X86/X86ISelLowering.cpp:1.183 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.182 Sat Apr 22 03:34:05 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Sat Apr 22 13:53:45 2006 @@ -169,6 +169,7 @@ setOperationAction(ISD::RET , MVT::Other, Custom); // Darwin ABI issue. setOperationAction(ISD::ConstantPool , MVT::i32 , Custom); + setOperationAction(ISD::JumpTable , MVT::i32 , Custom); setOperationAction(ISD::GlobalAddress , MVT::i32 , Custom); setOperationAction(ISD::ExternalSymbol , MVT::i32 , Custom); // 64-bit addm sub, shl, sra, srl (iff 32-bit x86) @@ -2792,8 +2793,8 @@ return Chain; } - // ConstantPool, GlobalAddress, and ExternalSymbol are lowered as their - // target countpart wrapped in the X86ISD::Wrapper node. Suppose N is + // ConstantPool, JumpTable, GlobalAddress, and ExternalSymbol are lowered as + // their target countpart wrapped in the X86ISD::Wrapper node. Suppose N is // one of the above mentioned nodes. It has to be wrapped because otherwise // Select(N) returns N. So the raw TargetGlobalAddress nodes, etc. can only // be used to form addressing mode. These wrapped nodes will be selected @@ -2812,6 +2813,20 @@ return Result; } + case ISD::JumpTable: { + JumpTableSDNode *JT = cast<JumpTableSDNode>(Op); + SDOperand Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), + DAG.getTargetJumpTable(JT->getIndex(), + getPointerTy())); + if (Subtarget->isTargetDarwin()) { + // With PIC, the address is actually $g + Offset. + if (getTargetMachine().getRelocationModel() == Reloc::PIC) + Result = DAG.getNode(ISD::ADD, getPointerTy(), + DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), Result); + } + + return Result; + } case ISD::GlobalAddress: { GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); SDOperand Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.260 llvm/lib/Target/X86/X86InstrInfo.td:1.261 --- llvm/lib/Target/X86/X86InstrInfo.td:1.260 Mon Apr 3 15:53:28 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Sat Apr 22 13:53:45 2006 @@ -365,10 +365,18 @@ class IBr<bits<8> opcode, dag ops, string asm, list<dag> pattern> : I<opcode, RawFrm, ops, asm, pattern>; -// Conditional branches +// Indirect branches let isBarrier = 1 in def JMP : IBr<0xE9, (ops brtarget:$dst), "jmp $dst", [(br bb:$dst)]>; +let isBranch = 1, isTerminator = 1, noResults = 1, isBarrier = 1 in { + def JMP32r : I<0xFF, MRM4r, (ops R32:$dst), "jmp{l} {*}$dst", + [(brind R32:$dst)]>; + def JMP32m : I<0xFF, MRM4m, (ops i32mem:$dst), "jmp{l} {*}$dst", + [(brind (loadi32 addr:$dst))]>; +} + +// Conditional branches def JE : IBr<0x84, (ops brtarget:$dst), "je $dst", [(X86brcond bb:$dst, X86_COND_E)]>, TB; def JNE : IBr<0x85, (ops brtarget:$dst), "jne $dst", @@ -2302,16 +2310,20 @@ // ConstantPool GlobalAddress, ExternalSymbol def : Pat<(i32 (X86Wrapper tconstpool :$dst)), (MOV32ri tconstpool :$dst)>; +def : Pat<(i32 (X86Wrapper tjumptable :$dst)), (MOV32ri tjumptable :$dst)>; def : Pat<(i32 (X86Wrapper tglobaladdr :$dst)), (MOV32ri tglobaladdr :$dst)>; def : Pat<(i32 (X86Wrapper texternalsym:$dst)), (MOV32ri texternalsym:$dst)>; def : Pat<(add R32:$src1, (X86Wrapper tconstpool:$src2)), (ADD32ri R32:$src1, tconstpool:$src2)>; +def : Pat<(add R32:$src1, (X86Wrapper tjumptable:$src2)), + (ADD32ri R32:$src1, tjumptable:$src2)>; def : Pat<(add R32:$src1, (X86Wrapper tglobaladdr :$src2)), (ADD32ri R32:$src1, tglobaladdr:$src2)>; def : Pat<(add R32:$src1, (X86Wrapper texternalsym:$src2)), (ADD32ri R32:$src1, texternalsym:$src2)>; +// FIXME: can you really ever store to a constant pool? def : Pat<(store (X86Wrapper tconstpool:$src), addr:$dst), (MOV32mi addr:$dst, tconstpool:$src)>; def : Pat<(store (X86Wrapper tglobaladdr:$src), addr:$dst), Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.26 llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.27 --- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.26 Fri Apr 7 15:44:42 2006 +++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp Sat Apr 22 13:53:45 2006 @@ -112,14 +112,9 @@ case MachineOperand::MO_UnextendedImmed: O << (int)MO.getImmedValue(); return; - case MachineOperand::MO_MachineBasicBlock: { - MachineBasicBlock *MBBOp = MO.getMachineBasicBlock(); - O << PrivateGlobalPrefix << "BB" - << Mang->getValueName(MBBOp->getParent()->getFunction()) - << "_" << MBBOp->getNumber () << "\t# " - << MBBOp->getBasicBlock ()->getName (); + case MachineOperand::MO_MachineBasicBlock: + printBasicBlockLabel(MO.getMachineBasicBlock()); return; - } case MachineOperand::MO_PCRelativeDisp: assert(0 && "Shouldn't use addPCDisp() when building X86 MachineInstrs"); abort (); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits