Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.178 -> 1.179
---
Log message:
It should be ok for a xform output type to be different from input type.
---
Diffs of the changes: (+17 -5)
DAGISelEmitter.cpp | 22 +-
1 files changed, 17 insertions(
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.170 -> 1.171
PPCInstrInfo.td updated: 1.197 -> 1.198
---
Log message:
Use tblgen'd VECTOR_SHUFFLE selection code.
---
Diffs of the changes: (+2 -19)
PPCISelDAGToDAG.cpp | 16
PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.171 -> 1.172
---
Log message:
reenable this hack, the tblgen version isn't quite ready
---
Diffs of the changes: (+16 -0)
PPCISelDAGToDAG.cpp | 16
1 files changed, 16 insertions(+)
Index: llv
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.198 -> 1.199
---
Log message:
Fix the pattern for VADDUWM, add i32 splat
---
Diffs of the changes: (+4 -1)
PPCInstrInfo.td |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC
Changes in directory llvm/test/Regression/CodeGen/X86:
loop-strength-reduce.ll updated: 1.1 -> 1.2
---
Log message:
Option -enable-x86-lsr has been removed
---
Diffs of the changes: (+1 -1)
loop-strength-reduce.ll |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/test/
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.104 -> 1.105
PPCInstrInfo.td updated: 1.199 -> 1.200
---
Log message:
Fix a couple of bugs in permute/splat generate, thanks to Nate for actually
figuring these out! :)
---
Diffs of the changes: (+1 -3)
PPCISelLow
Changes in directory llvm/include/llvm/Analysis:
PostDominators.h updated: 1.11 -> 1.12
Dominators.h updated: 1.53 -> 1.54
---
Log message:
Move some common data structures between dom and pdom into the base class
---
Diffs of the changes: (+16 -32)
Dominators.h | 32
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
load-constant-addr.ll added (r1.1)
---
Log message:
new testcase
---
Diffs of the changes: (+9 -0)
load-constant-addr.ll |9 +
1 files changed, 9 insertions(+)
Index: llvm/test/Regression/CodeGen/PowerPC/load-constant
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.105 -> 1.106
---
Log message:
remove dead variable
---
Diffs of the changes: (+1 -1)
PPCISelLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.c
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.172 -> 1.173
---
Log message:
Handle constant addresses more efficiently, folding the low bits into the
disp field of the load/store if possible. This compiles
CodeGen/PowerPC/load-constant-addr.ll to:
_test:
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.179 -> 1.180
---
Log message:
The node wrapped in PatLeaf<> should be treated as a leaf even if it isn't
one, i.e. don't select it.
---
Diffs of the changes: (+11 -4)
DAGISelEmitter.cpp | 15 +++
1 files
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.td updated: 1.30 -> 1.31
---
Log message:
Junk unused vector register classes.
---
Diffs of the changes: (+0 -25)
X86RegisterInfo.td | 25 -
1 files changed, 25 deletions(-)
Index: llvm/lib/Target/X86/X86
Changes in directory llvm/lib/Target/X86:
X86InstrMMX.td updated: 1.3 -> 1.4
X86InstrSSE.td updated: 1.9 -> 1.10
---
Log message:
x86 ISD::SCALAR_TO_VECTOR support.
---
Diffs of the changes: (+54 -0)
X86InstrMMX.td | 18 ++
X86InstrSSE.td | 36 ++
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.54 -> 1.55
---
Log message:
x86 ISD::SCALAR_TO_VECTOR support.
---
Diffs of the changes: (+2 -0)
TargetSelectionDAG.td |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u l
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.76 -> 1.77
---
Log message:
minor note
---
Diffs of the changes: (+3 -0)
README.txt |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.76
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.200 -> 1.201
---
Log message:
When codegen'ing vector MUL using VFMADD, *add* the 0, don't *mul* the 0.
---
Diffs of the changes: (+1 -1)
PPCInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Ind
Changes in directory llvm:
Makefile.rules updated: 1.351 -> 1.352
---
Log message:
Enable assertions to be enabled in release builds by building with
make ENABLE_OPTIMIZED=1 ENABLE_ASSERTIONS=1
---
Diffs of the changes: (+21 -11)
Makefile.rules | 32 +---
1 fi
Changes in directory llvm/docs:
GettingStarted.html updated: 1.126 -> 1.127
MakefileGuide.html updated: 1.28 -> 1.29
---
Log message:
Document ENABLE_ASSERTIONS=1
---
Diffs of the changes: (+11 -2)
GettingStarted.html |7 ++-
MakefileGuide.html |6 +-
2 files changed, 11 i
Changes in directory llvm/utils:
NightlyTestTemplate.html updated: 1.44 -> 1.45
NightlyTest.pl updated: 1.105 -> 1.106
---
Log message:
Cause the various warnings list to be generated via a list with
text enclosed in . This ensures that (a) the text is in a fixed width
font (to indicated gene
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.173 -> 1.174
---
Log message:
With Evan's latest tblgen patch, this code is obsolete, thanks Evan!
---
Diffs of the changes: (+0 -16)
PPCISelDAGToDAG.cpp | 16
1 files changed, 16 deletions(-)
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.180 -> 1.181
---
Log message:
minor code simplification
---
Diffs of the changes: (+5 -11)
DAGISelEmitter.cpp | 16 +---
1 files changed, 5 insertions(+), 11 deletions(-)
Index: llvm/utils/TableGen/DAGI
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.cpp updated: 1.45 -> 1.46
X86InstrMMX.td updated: 1.4 -> 1.5
X86InstrSSE.td updated: 1.10 -> 1.11
---
Log message:
- Remove scalar to vector pseudo ops. They are just wrong.
- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.68 -> 1.69
---
Log message:
Add a note about x86 register coallescing
---
Diffs of the changes: (+2 -0)
README.txt |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.69 -> 1.70
---
Log message:
Combine 2 entries
---
Diffs of the changes: (+6 -8)
README.txt | 14 ++
1 files changed, 6 insertions(+), 8 deletions(-)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/
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