[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp

Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.175 -> 1.176 --- Log message: Temporary hack to enable more (store (op (load ...))) folding. This makes it possible when a TokenFactor is between the load and store. But is still missing some cases due to ordering issue.

[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp MachineDebugInfo.cpp

Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.44 -> 1.45 MachineDebugInfo.cpp updated: 1.27 -> 1.28 --- Log message: Move bit field endianness to backend. --- Diffs of the changes: (+29 -10) DwarfWriter.cpp | 36 ++-- MachineDebugI

[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp AlphaInstrInfo.td

Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.39 -> 1.40 AlphaInstrInfo.td updated: 1.113 -> 1.114 --- Log message: fcopysign and get rid of dsnode cruft. custom PA runtimes make this better in some senses --- Diffs of the changes: (+15 -220) AlphaISelLoweri

[llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td

Changes in directory llvm/lib/Target: TargetSelectionDAG.td updated: 1.49 -> 1.50 --- Log message: fcopysign support --- Diffs of the changes: (+1 -0) TargetSelectionDAG.td |1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/TargetSelectionDAG.td diff -u llvm/lib/Target/Targe

[llvm-commits] CVS: llvm/lib/CodeGen/MachineDebugInfo.cpp DwarfWriter.cpp

Changes in directory llvm/lib/CodeGen: MachineDebugInfo.cpp updated: 1.28 -> 1.29 DwarfWriter.cpp updated: 1.45 -> 1.46 --- Log message: temporary hack to get the build working again, apparently a header commit was forgotten --- Diffs of the changes: (+4 -4) DwarfWriter.cpp |2 +-

[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaSchedule.td Alpha.td AlphaISelLowering.h AlphaInstrFormats.td AlphaInstrInfo.td AlphaSubtarget.h

Changes in directory llvm/lib/Target/Alpha: AlphaSchedule.td added (r1.1) Alpha.td updated: 1.8 -> 1.9 AlphaISelLowering.h updated: 1.14 -> 1.15 AlphaInstrFormats.td updated: 1.26 -> 1.27 AlphaInstrInfo.td updated: 1.114 -> 1.115 AlphaSubtarget.h updated: 1.4 -> 1.5 --- Log message: Alpha Sched

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.31 -> 1.32 --- Log message: remove temporary option --- Diffs of the changes: (+1 -3) ScheduleDAGList.cpp |4 +--- 1 files changed, 1 insertion(+), 3 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/S

[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineDebugInfo.h

Changes in directory llvm/include/llvm/CodeGen: MachineDebugInfo.h updated: 1.28 -> 1.29 --- Log message: Forgot this on last check in. --- Diffs of the changes: (+3 -0) MachineDebugInfo.h |3 +++ 1 files changed, 3 insertions(+) Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h di

[llvm-commits] CVS: llvm-test/Makefile.programs

Changes in directory llvm-test: Makefile.programs updated: 1.197 -> 1.198 --- Log message: change alpha beta --- Diffs of the changes: (+0 -0) 0 files changed ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mai

[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.td

Changes in directory llvm/lib/Target/Alpha: AlphaInstrInfo.td updated: 1.115 -> 1.116 --- Log message: alpha and llvm have different oppinions on which arg is the sign bit --- Diffs of the changes: (+8 -10) AlphaInstrInfo.td | 18 -- 1 files changed, 8 insertions(+), 10 de

[llvm-commits] CVS: llvm/lib/CodeGen/MachineDebugInfo.cpp DwarfWriter.cpp

Changes in directory llvm/lib/CodeGen: MachineDebugInfo.cpp updated: 1.29 -> 1.30 DwarfWriter.cpp updated: 1.46 -> 1.47 --- Log message: back out my previous hack --- Diffs of the changes: (+4 -4) DwarfWriter.cpp |2 +- MachineDebugInfo.cpp |6 +++--- 2 files changed, 4 insert

[llvm-commits] CVS: llvm-test/Makefile.programs

Changes in directory llvm-test: Makefile.programs updated: 1.198 -> 1.199 --- Log message: Switch PPC beta back to list-td --- Diffs of the changes: (+2 -2) Makefile.programs |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-test/Makefile.programs diff -u llvm-tes

[llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td

Changes in directory llvm/lib/Target: TargetSelectionDAG.td updated: 1.50 -> 1.51 --- Log message: relax fcopysign --- Diffs of the changes: (+4 -1) TargetSelectionDAG.td |5 - 1 files changed, 4 insertions(+), 1 deletion(-) Index: llvm/lib/Target/TargetSelectionDAG.td diff -u llv

[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp

Changes in directory llvm/lib/Target/Alpha: AlphaRegisterInfo.cpp updated: 1.35 -> 1.36 --- Log message: remove some now-dead code --- Diffs of the changes: (+0 -16) AlphaRegisterInfo.cpp | 16 1 files changed, 16 deletions(-) Index: llvm/lib/Target/Alpha/AlphaRegister

[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.td

Changes in directory llvm/lib/Target/Alpha: AlphaInstrInfo.td updated: 1.116 -> 1.117 --- Log message: fcopysign for mixed mode --- Diffs of the changes: (+20 -1) AlphaInstrInfo.td | 21 - 1 files changed, 20 insertions(+), 1 deletion(-) Index: llvm/lib/Target/Alpha/

[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp

Changes in directory llvm/lib/Target/Alpha: AlphaInstrInfo.cpp updated: 1.8 -> 1.9 --- Log message: these are copies too --- Diffs of the changes: (+5 -1) AlphaInstrInfo.cpp |6 +- 1 files changed, 5 insertions(+), 1 deletion(-) Index: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp diff

[llvm-commits] CVS: llvm/test/Regression/Transforms/SimplifyLibCalls/MemCpy.ll MemMove.ll

Changes in directory llvm/test/Regression/Transforms/SimplifyLibCalls: MemCpy.ll updated: 1.1 -> 1.2 MemMove.ll updated: 1.1 -> 1.2 --- Log message: Update these tests (which use autoupgrade) to run constprop and check that the file parses. --- Diffs of the changes: (+4 -2) MemCpy.ll |

[llvm-commits] CVS: llvm/lib/VMCore/AutoUpgrade.cpp

Changes in directory llvm/lib/VMCore: AutoUpgrade.cpp updated: 1.10 -> 1.11 --- Log message: autoupgrade memcpy/memmove/memset with signed counts. CVS: -- --- Diffs of the changes: (+12 -4) AutoUpgrade.cpp | 16

[llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/store_op_load_fold2.ll store_op_load_fold.ll

Changes in directory llvm/test/Regression/CodeGen/X86: store_op_load_fold2.ll added (r1.1) store_op_load_fold.ll updated: 1.1 -> 1.2 --- Log message: Add a test case for (store (op (load ..) ..) ..) folding. --- Diffs of the changes: (+45 -2) store_op_load_fold.ll |2 -- store_op_load

[llvm-commits] CVS: llvm/lib/VMCore/Makefile

Changes in directory llvm/lib/VMCore: Makefile updated: 1.7 -> 1.8 --- Log message: Build intrinsics.gen from intrinsics.td --- Diffs of the changes: (+6 -0) Makefile |6 ++ 1 files changed, 6 insertions(+) Index: llvm/lib/VMCore/Makefile diff -u llvm/lib/VMCore/Makefile:1.7 llvm

[llvm-commits] CVS: llvm/include/llvm/IntrinsicInst.h

Changes in directory llvm/include/llvm: IntrinsicInst.h updated: 1.10 -> 1.11 --- Log message: remove dbg_declare, it's not used yet. --- Diffs of the changes: (+0 -1) IntrinsicInst.h |1 - 1 files changed, 1 deletion(-) Index: llvm/include/llvm/IntrinsicInst.h diff -u llvm/include/l

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.183 -> 1.184 --- Log message: remove dbg_declare, it's not used yet. --- Diffs of the changes: (+0 -4) SelectionDAGISel.cpp |4 1 files changed, 4 deletions(-) Index: llvm/lib/CodeGen/SelectionDA

[llvm-commits] CVS: llvm/include/llvm/Intrinsics.h

Changes in directory llvm/include/llvm: Intrinsics.h updated: 1.38 -> 1.39 --- Log message: use the enum list autogen'd from Intrinsics.td --- Diffs of the changes: (+4 -61) Intrinsics.h | 65 +++ 1 files changed, 4 insertions(+),

[llvm-commits] CVS: llvm/lib/VMCore/Function.cpp Verifier.cpp

Changes in directory llvm/lib/VMCore: Function.cpp updated: 1.102 -> 1.103 Verifier.cpp updated: 1.148 -> 1.149 --- Log message: remove dbg_declare, it's not used yet. --- Diffs of the changes: (+0 -2) Function.cpp |1 - Verifier.cpp |1 - 2 files changed, 2 deletions(-) Index: l

[llvm-commits] CVS: llvm/lib/VMCore/Makefile

Changes in directory llvm/lib/VMCore: Makefile updated: 1.8 -> 1.9 --- Log message: silly case insensitive file systems... --- Diffs of the changes: (+3 -3) Makefile |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/lib/VMCore/Makefile diff -u llvm/lib/VMCore/Ma

[llvm-commits] CVS: llvm/lib/CodeGen/IntrinsicLowering.cpp

Changes in directory llvm/lib/CodeGen: IntrinsicLowering.cpp updated: 1.40 -> 1.41 --- Log message: remove dbg_declare, it's not used yet. --- Diffs of the changes: (+0 -1) IntrinsicLowering.cpp |1 - 1 files changed, 1 deletion(-) Index: llvm/lib/CodeGen/IntrinsicLowering.cpp diff -

[llvm-commits] CVS: llvm/lib/Target/README.txt

Changes in directory llvm/lib/Target: README.txt updated: 1.14 -> 1.15 --- Log message: add a note --- Diffs of the changes: (+10 -0) README.txt | 10 ++ 1 files changed, 10 insertions(+) Index: llvm/lib/Target/README.txt diff -u llvm/lib/Target/README.txt:1.14 llvm/lib/Target/

[llvm-commits] CVS: llvm/lib/VMCore/Makefile

Changes in directory llvm/lib/VMCore: Makefile updated: 1.9 -> 1.10 --- Log message: This rule also depends on tblgen --- Diffs of the changes: (+1 -1) Makefile |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/VMCore/Makefile diff -u llvm/lib/VMCore/Makefile:1.9

[llvm-commits] CVS: llvm/lib/VMCore/Function.cpp

Changes in directory llvm/lib/VMCore: Function.cpp updated: 1.103 -> 1.104 --- Log message: Use the function name matcher autogenerated from the .td file. --- Diffs of the changes: (+3 -76) Function.cpp | 79 ++- 1 files changed, 3

[llvm-commits] CVS: llvm/utils/TableGen/IntrinsicEmitter.cpp IntrinsicEmitter.h

Changes in directory llvm/utils/TableGen: IntrinsicEmitter.cpp updated: 1.1 -> 1.2 IntrinsicEmitter.h updated: 1.1 -> 1.2 --- Log message: autogenerate the function name recognizer --- Diffs of the changes: (+41 -0) IntrinsicEmitter.cpp | 37 + Intrins

[llvm-commits] CVS: llvm/lib/Target/X86/X86TargetMachine.cpp

Changes in directory llvm/lib/Target/X86: X86TargetMachine.cpp updated: 1.105 -> 1.106 --- Log message: Add option -enable-x86-lsr to enable x86 loop strength reduction pass. --- Diffs of the changes: (+7 -0) X86TargetMachine.cpp |7 +++ 1 files changed, 7 insertions(+) Index: ll

[llvm-commits] CVS: llvm/utils/TableGen/CodeGenIntrinsics.h IntrinsicEmitter.cpp IntrinsicEmitter.h

Changes in directory llvm/utils/TableGen: CodeGenIntrinsics.h updated: 1.2 -> 1.3 IntrinsicEmitter.cpp updated: 1.2 -> 1.3 IntrinsicEmitter.h updated: 1.2 -> 1.3 --- Log message: parse intrinsic types autogenerate an intrinsic verifier --- Diffs of the changes: (+50 -4) CodeGenIntrinsics.h

[llvm-commits] CVS: llvm/lib/VMCore/Verifier.cpp

Changes in directory llvm/lib/VMCore: Verifier.cpp updated: 1.149 -> 1.150 --- Log message: Use the autogenerated intrinsic verifier --- Diffs of the changes: (+5 -266) Verifier.cpp | 271 +-- 1 files changed, 5 insertions(+), 266 de

[llvm-commits] CVS: llvm/docs/ExtendingLLVM.html

Changes in directory llvm/docs: ExtendingLLVM.html updated: 1.22 -> 1.23 --- Log message: Intrinsic adding is a little bit simpler now --- Diffs of the changes: (+3 -10) ExtendingLLVM.html | 13 +++-- 1 files changed, 3 insertions(+), 10 deletions(-) Index: llvm/docs/ExtendingL

[llvm-commits] CVS: llvm/lib/Analysis/BasicAliasAnalysis.cpp

Changes in directory llvm/lib/Analysis: BasicAliasAnalysis.cpp updated: 1.78 -> 1.79 --- Log message: Use autogenerated mod/ref info for intrinsics. --- Diffs of the changes: (+26 -22) BasicAliasAnalysis.cpp | 48 ++-- 1 files changed, 26 inser

[llvm-commits] CVS: llvm/docs/ExtendingLLVM.html

Changes in directory llvm/docs: ExtendingLLVM.html updated: 1.23 -> 1.24 --- Log message: Simpler still --- Diffs of the changes: (+1 -5) ExtendingLLVM.html |6 +- 1 files changed, 1 insertion(+), 5 deletions(-) Index: llvm/docs/ExtendingLLVM.html diff -u llvm/docs/ExtendingLLVM.

[llvm-commits] CVS: llvm/utils/TableGen/IntrinsicEmitter.cpp IntrinsicEmitter.h

Changes in directory llvm/utils/TableGen: IntrinsicEmitter.cpp updated: 1.3 -> 1.4 IntrinsicEmitter.h updated: 1.3 -> 1.4 --- Log message: Parse mod/ref properties, autogen mod/ref information --- Diffs of the changes: (+47 -0) IntrinsicEmitter.cpp | 45 ++

[llvm-commits] CVS: llvm/utils/TableGen/IntrinsicEmitter.cpp IntrinsicEmitter.h

Changes in directory llvm/utils/TableGen: IntrinsicEmitter.cpp updated: 1.4 -> 1.5 IntrinsicEmitter.h updated: 1.4 -> 1.5 --- Log message: generate side-effect info --- Diffs of the changes: (+27 -0) IntrinsicEmitter.cpp | 25 + IntrinsicEmitter.h |2 ++ 2 f

[llvm-commits] CVS: llvm/docs/ExtendingLLVM.html

Changes in directory llvm/docs: ExtendingLLVM.html updated: 1.24 -> 1.25 --- Log message: Adding an intrinsic is simpler still. --- Diffs of the changes: (+1 -5) ExtendingLLVM.html |6 +- 1 files changed, 1 insertion(+), 5 deletions(-) Index: llvm/docs/ExtendingLLVM.html diff -u

[llvm-commits] CVS: llvm/lib/Transforms/Utils/Local.cpp

Changes in directory llvm/lib/Transforms/Utils: Local.cpp updated: 1.52 -> 1.53 --- Log message: use autogenerated side-effect information --- Diffs of the changes: (+5 -27) Local.cpp | 32 +--- 1 files changed, 5 insertions(+), 27 deletions(-) Index: llvm/l

[llvm-commits] CVS: llvm-test/Makefile.programs

Changes in directory llvm-test: Makefile.programs updated: 1.199 -> 1.200 --- Log message: x86 llc-beta sets -enable-x86-lsr to turn on loop strength reduction. --- Diffs of the changes: (+1 -1) Makefile.programs |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/

[llvm-commits] CVS: llvm/win32/VMCore/VMCore.vcproj

Changes in directory llvm/win32/VMCore: VMCore.vcproj updated: 1.15 -> 1.16 --- Log message: Fix VC++ build breakage. --- Diffs of the changes: (+29 -0) VMCore.vcproj | 29 + 1 files changed, 29 insertions(+) Index: llvm/win32/VMCore/VMCore.vcproj diff -u llv

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.32 -> 1.33 --- Log message: Fix VC++ build breakage. --- Diffs of the changes: (+3 -3) ScheduleDAGList.cpp |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/lib/CodeGen/SelectionDA

[llvm-commits] CVS: llvm/win32/llvm.sln

Changes in directory llvm/win32: llvm.sln updated: 1.25 -> 1.26 --- Log message: Fix VC++ build breakage. --- Diffs of the changes: (+2 -0) llvm.sln |2 ++ 1 files changed, 2 insertions(+) Index: llvm/win32/llvm.sln diff -u llvm/win32/llvm.sln:1.25 llvm/win32/llvm.sln:1.26 --- llvm/wi

[llvm-commits] CVS: llvm/include/llvm/Intrinsics.td

Changes in directory llvm/include/llvm: Intrinsics.td updated: 1.1 -> 1.2 --- Log message: Fix an incorrect intrinsic description --- Diffs of the changes: (+3 -2) Intrinsics.td |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) Index: llvm/include/llvm/Intrinsics.td diff -u

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.33 -> 1.34 --- Log message: add an aggregate method for reinserting scheduled nodes, add a callback for priority impls that want to be notified when a node is scheduled --- Diffs of the changes: (+23 -8) Sc

[llvm-commits] CVS: llvm/win32/VMCore/VMCore.vcproj

Changes in directory llvm/win32/VMCore: VMCore.vcproj updated: 1.16 -> 1.17 --- Log message: Put intrinsics.gen in its proper place. --- Diffs of the changes: (+7 -5) VMCore.vcproj | 12 +++- 1 files changed, 7 insertions(+), 5 deletions(-) Index: llvm/win32/VMCore/VMCore.vcproj

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.34 -> 1.35 --- Log message: Teach the latency scheduler some new tricks. In particular, to break ties, keep track of a sense of "mobility", i.e. how many other nodes scheduling one node will free up. For someth

[llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h

Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.15 -> 1.16 --- Log message: make some methods protected instead of private --- Diffs of the changes: (+4 -4) ScheduleDAG.h |8 1 files changed, 4 insertions(+), 4 deletions(-) Index: llvm/include/llvm/C

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp ScheduleDAGList.cpp ScheduleDAGSimple.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.73 -> 1.74 ScheduleDAGList.cpp updated: 1.35 -> 1.36 ScheduleDAGSimple.cpp updated: 1.6 -> 1.7 --- Log message: Push PrepareNodeInfo/IdentifyGroups down the inheritance hierarchy --- Diffs of the changes: (+10 -4)

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.36 -> 1.37 --- Log message: Create SUnits directly from the SelectionDAG. --- Diffs of the changes: (+87 -87) ScheduleDAGList.cpp | 174 ++-- 1 files changed,

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.37 -> 1.38 --- Log message: no need to build groups anymore --- Diffs of the changes: (+0 -2) ScheduleDAGList.cpp |2 -- 1 files changed, 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG

[llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h

Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.16 -> 1.17 --- Log message: Store VRBase in a map, not in NodeInfo. --- Diffs of the changes: (+5 -12) ScheduleDAG.h | 17 + 1 files changed, 5 insertions(+), 12 deletions(-) Index: llvm/include/ll

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp ScheduleDAGList.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.74 -> 1.75 ScheduleDAGList.cpp updated: 1.38 -> 1.39 --- Log message: Move the VRBase field from NodeInfo to being a separate, explicit, map. --- Diffs of the changes: (+27 -13) ScheduleDAG.cpp | 35 ++

[llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h

Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.17 -> 1.18 --- Log message: Make EmitNode take a SDNode instead of a NodeInfo* --- Diffs of the changes: (+1 -1) ScheduleDAG.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/CodeG

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp ScheduleDAGList.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.75 -> 1.76 ScheduleDAGList.cpp updated: 1.39 -> 1.40 --- Log message: Make EmitNode take a SDNode instead of a NodeInfo* --- Diffs of the changes: (+6 -12) ScheduleDAG.cpp |7 +++ ScheduleDAGList.cpp

[llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h

Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.18 -> 1.19 --- Log message: move some simple scheduler methods into the simple scheduler --- Diffs of the changes: (+0 -29) ScheduleDAG.h | 29 - 1 files changed, 29 deletions(-) Index:

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp ScheduleDAGSimple.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.76 -> 1.77 ScheduleDAGSimple.cpp updated: 1.7 -> 1.8 --- Log message: move some simple scheduler methods into the simple scheduler --- Diffs of the changes: (+266 -235) ScheduleDAG.cpp | 235 -

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.77 -> 1.78 --- Log message: prune #includes --- Diffs of the changes: (+0 -5) ScheduleDAG.cpp |5 - 1 files changed, 5 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp diff -u llvm/lib

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp ScheduleDAGList.cpp ScheduleDAGSimple.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.78 -> 1.79 ScheduleDAGList.cpp updated: 1.40 -> 1.41 ScheduleDAGSimple.cpp updated: 1.8 -> 1.9 --- Log message: Move some simple-sched-specific instance vars to the simple scheduler. --- Diffs of the changes: (+30

[llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h

Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.19 -> 1.20 --- Log message: Move some simple-sched-specific instance vars to the simple scheduler. --- Diffs of the changes: (+2 -23) ScheduleDAG.h | 25 ++--- 1 files changed, 2 insertions(+), 2

[llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h

Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.20 -> 1.21 --- Log message: Simplify the interface to the schedulers, to not pass the selected heuristic in. --- Diffs of the changes: (+4 -14) ScheduleDAG.h | 18 -- 1 files changed, 4 insertions(+)

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp SelectionDAGISel.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGSimple.cpp updated: 1.9 -> 1.10 SelectionDAGISel.cpp updated: 1.184 -> 1.185 --- Log message: Simplify the interface to the schedulers, to not pass the selected heuristicin. --- Diffs of the changes: (+28 -9) ScheduleDAGSimple

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGSimple.cpp updated: 1.10 -> 1.11 --- Log message: Move simple-selector-specific types to the simple selector. --- Diffs of the changes: (+202 -0) ScheduleDAGSimple.cpp | 202 ++

[llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h

Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.21 -> 1.22 --- Log message: Move simple-selector-specific types to the simple selector. --- Diffs of the changes: (+0 -201) ScheduleDAG.h | 201 -- 1 files chan