Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.78 -> 1.79 ScheduleDAGList.cpp updated: 1.40 -> 1.41 ScheduleDAGSimple.cpp updated: 1.8 -> 1.9 --- Log message: Move some simple-sched-specific instance vars to the simple scheduler. --- Diffs of the changes: (+30 -6) ScheduleDAG.cpp | 3 --- ScheduleDAGList.cpp | 2 +- ScheduleDAGSimple.cpp | 31 +++++++++++++++++++++++++++++-- 3 files changed, 30 insertions(+), 6 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.78 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.79 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.78 Fri Mar 10 01:37:35 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Fri Mar 10 01:42:02 2006 @@ -346,9 +346,6 @@ RegMap = BB->getParent()->getSSARegMap(); ConstPool = BB->getParent()->getConstantPool(); - // Number the nodes - NodeCount = std::distance(DAG.allnodes_begin(), DAG.allnodes_end()); - Schedule(); return BB; } Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.40 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.41 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.40 Fri Mar 10 01:28:36 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Fri Mar 10 01:42:02 2006 @@ -189,7 +189,7 @@ const TargetMachine &tm, bool isbottomup, SchedulingPriorityQueue *priorityqueue, HazardRecognizer *HR) - : ScheduleDAG(listSchedulingBURR, dag, bb, tm), + : ScheduleDAG(dag, bb, tm), CurrCycle(0), isBottomUp(isbottomup), PriorityQueue(priorityqueue), HazardRec(HR) { } Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.8 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.9 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.8 Fri Mar 10 01:35:21 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Fri Mar 10 01:42:02 2006 @@ -188,24 +188,48 @@ /// class ScheduleDAGSimple : public ScheduleDAG { private: + SchedHeuristics Heuristic; // Scheduling heuristic + ResourceTally<unsigned> Tally; // Resource usage tally unsigned NSlots; // Total latency static const unsigned NotFound = ~0U; // Search marker + + unsigned NodeCount; // Number of nodes in DAG + std::map<SDNode *, NodeInfo *> Map; // Map nodes to info + bool HasGroups; // True if there are any groups + NodeInfo *Info; // Info for nodes being scheduled + NIVector Ordering; // Emit ordering of nodes + NodeGroup *HeadNG, *TailNG; // Keep track of allocated NodeGroups public: // Ctor. ScheduleDAGSimple(SchedHeuristics hstc, SelectionDAG &dag, MachineBasicBlock *bb, const TargetMachine &tm) - : ScheduleDAG(hstc, dag, bb, tm), Tally(), NSlots(0) { + : ScheduleDAG(dag, bb, tm), Heuristic(hstc), Tally(), NSlots(0), + NodeCount(0), HasGroups(false), Info(NULL), HeadNG(NULL), TailNG(NULL) { assert(&TII && "Target doesn't provide instr info?"); assert(&MRI && "Target doesn't provide register info?"); } - virtual ~ScheduleDAGSimple() {}; + virtual ~ScheduleDAGSimple() { + if (Info) + delete[] Info; + + NodeGroup *NG = HeadNG; + while (NG) { + NodeGroup *NextSU = NG->Next; + delete NG; + NG = NextSU; + } + } void Schedule(); + /// getNI - Returns the node info for the specified node. + /// + NodeInfo *getNI(SDNode *Node) { return Map[Node]; } + private: static bool isDefiner(NodeInfo *A, NodeInfo *B); void IncludeNode(NodeInfo *NI); @@ -826,6 +850,9 @@ /// Schedule - Order nodes according to selected style. /// void ScheduleDAGSimple::Schedule() { + // Number the nodes + NodeCount = std::distance(DAG.allnodes_begin(), DAG.allnodes_end()); + // Set up minimum info for scheduling PrepareNodeInfo(); // Construct node groups for flagged nodes _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits