Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.277 -> 1.278
---
Log message:
PredicateOperand can be used as a normal operand for isel.
---
Diffs of the changes: (+1 -1)
PPCInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Tar
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.269 -> 1.270
PPCInstrFormats.td updated: 1.84 -> 1.85
---
Log message:
add encoding for BCC, after finally wrestling strange ppc/tblgen endianness
issues to the ground.
---
Diffs of the changes: (+22 -3)
PPCInstrForm
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.264 -> 1.265
---
Log message:
fix broken encoding
---
Diffs of the changes: (+1 -1)
PPCInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u ll
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.262 -> 1.263
---
Log message:
switch these back to the 'bad old way'
---
Diffs of the changes: (+20 -20)
PPCInstrInfo.td | 40
1 files changed, 20 insertions(+), 20 deletions
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.258 -> 1.259
---
Log message:
group load and store instructions together. No functionality change.
---
Diffs of the changes: (+110 -99)
PPCInstrInfo.td | 209 +---
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.253 -> 1.254
---
Log message:
correct the (currently unused) pattern for lwzu.
---
Diffs of the changes: (+8 -2)
PPCInstrInfo.td | 10 --
1 files changed, 8 insertions(+), 2 deletions(-)
Index: llvm/lib/Ta
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.250 -> 1.251
---
Log message:
Describe PPC predicates, which are a pair of CR# and condition.
---
Diffs of the changes: (+4 -0)
PPCInstrInfo.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/Po
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.249 -> 1.250
---
Log message:
remove dead vars
---
Diffs of the changes: (+0 -3)
PPCInstrInfo.td |3 ---
1 files changed, 3 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/Pow
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.248 -> 1.249
---
Log message:
Add intrinsics for the rest of the DCB* instructions.
---
Diffs of the changes: (+24 -6)
PPCInstrInfo.td | 30 --
1 files changed, 24 insertions(+), 6 deleti
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.246 -> 1.247
---
Log message:
set isBarrier correctly
---
Diffs of the changes: (+4 -1)
PPCInstrInfo.td |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
di
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.245 -> 1.246
---
Log message:
mark adjcallstack up/down as clobbering and using the SP
---
Diffs of the changes: (+2 -2)
PPCInstrInfo.td |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.244 -> 1.245
---
Log message:
Add properties to ComplexPattern.
---
Diffs of the changes: (+4 -4)
PPCInstrInfo.td |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCIn
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.242 -> 1.243
---
Log message:
Use abstract private/comment directives, to increase portability to ppc/linux
---
Diffs of the changes: (+18 -13)
PPCInstrInfo.td | 31 ++-
1 files changed,
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.240 -> 1.241
---
Log message:
CALLSEQ_* produces chain even if that's not needed.
---
Diffs of the changes: (+4 -2)
PPCInstrInfo.td |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Targ
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.239 -> 1.240
---
Log message:
bswapped load/store instructions are only availble in indexed addressing form.
As such, use xoaddr (indexed only), not xaddr for address selection.
This fixes CodeGen/PowerPC/2006-07-19-stwbr
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.233 -> 1.234
---
Log message:
Remove two more definitions
---
Diffs of the changes: (+0 -4)
PPCInstrInfo.td |4
1 files changed, 4 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/li
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.232 -> 1.233
---
Log message:
remove two unused instructions.
---
Diffs of the changes: (+0 -4)
PPCInstrInfo.td |4
1 files changed, 4 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llv
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.231 -> 1.232
---
Log message:
Make these predicates correct in 64-bit mode too.
---
Diffs of the changes: (+5 -2)
PPCInstrInfo.td |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Index: llvm/lib/Targ
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.228 -> 1.229
---
Log message:
remove some unused patterns
---
Diffs of the changes: (+0 -6)
PPCInstrInfo.td |6 --
1 files changed, 6 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.226 -> 1.227
---
Log message:
64-bit bugfix: 0x cannot be formed with a single lis.
---
Diffs of the changes: (+5 -1)
PPCInstrInfo.td |6 +-
1 files changed, 5 insertions(+), 1 deletion(-)
Index: llv
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.224 -> 1.225
---
Log message:
In 64-bit mode, addr mode operands use G8RC instead of GPRC.
---
Diffs of the changes: (+3 -3)
PPCInstrInfo.td |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llv
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.221 -> 1.222
PPCISelLowering.cpp updated: 1.186 -> 1.187
---
Log message:
Fix a problem exposed by the local allocator. CALL instructions are not marked
as using incoming argument registers, so the local allocator would c
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.216 -> 1.217
---
Log message:
These are correctly encoded by the JIT. I checked :)
---
Diffs of the changes: (+0 -2)
PPCInstrInfo.td |2 --
1 files changed, 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInst
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.208 -> 1.209
---
Log message:
Add support for __builtin_altivec_vnmsubfp /vmaddfp
---
Diffs of the changes: (+5 -0)
PPCInstrInfo.td |5 +
1 files changed, 5 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCIn
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.206 -> 1.207
---
Log message:
Fix a bad JIT encoding of VPERM. Why is VPERM D,A,B,C but vfmadd is D,A,C,B ??
---
Diffs of the changes: (+2 -2)
PPCInstrInfo.td |4 ++--
1 files changed, 2 insertions(+), 2 deletio
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.204 -> 1.205
---
Log message:
Gabor points out that we can't spell. :)
---
Diffs of the changes: (+1 -1)
PPCInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCIn
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.203 -> 1.204
---
Log message:
Add PPC vector bit-convert support
---
Diffs of the changes: (+3 -0)
PPCInstrInfo.td |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.200 -> 1.201
---
Log message:
When codegen'ing vector MUL using VFMADD, *add* the 0, don't *mul* the 0.
---
Diffs of the changes: (+1 -1)
PPCInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Ind
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.198 -> 1.199
---
Log message:
Fix the pattern for VADDUWM, add i32 splat
---
Diffs of the changes: (+4 -1)
PPCInstrInfo.td |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.194 -> 1.195
---
Log message:
fix typo
---
Diffs of the changes: (+3 -3)
PPCInstrInfo.td |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/li
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.193 -> 1.194
---
Log message:
add vsplat instructions, fix sched description for vperm
---
Diffs of the changes: (+11 -1)
PPCInstrInfo.td | 12 +++-
1 files changed, 11 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.191 -> 1.192
---
Log message:
add the vperm instruction
---
Diffs of the changes: (+4 -0)
PPCInstrInfo.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.189 -> 1.190
---
Log message:
add support for vector undef
---
Diffs of the changes: (+4 -0)
PPCInstrInfo.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.188 -> 1.189
---
Log message:
minor fixes
---
Diffs of the changes: (+2 -2)
PPCInstrInfo.td |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/l
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.187 -> 1.188
---
Log message:
we don't use lmw/stmw. When we want them they are easy enough to add
---
Diffs of the changes: (+0 -6)
PPCInstrInfo.td |6 --
1 files changed, 6 deletions(-)
Index: llvm/lib/Ta
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.186 -> 1.187
---
Log message:
Fix subfic to match subc by default instead of sub so that it is correctly
cost-modeled as producing a flag. This fixes the test I just added for neg
---
Diffs of the changes: (+2 -2)
PP
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.184 -> 1.185
---
Log message:
Strangely, calls clobber call-clobbered vector regs. Whodathoughtit?
---
Diffs of the changes: (+1 -0)
PPCInstrInfo.td |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.182 -> 1.183
---
Log message:
Update scheduling info for vrsave instruction
---
Diffs of the changes: (+2 -2)
PPCInstrInfo.td |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/Powe
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.175 -> 1.176
---
Log message:
Add missing patterns for andi. and andis., fixing test/Regression/CodeGen/
PowerPC/and-imm.ll
---
Diffs of the changes: (+4 -2)
PPCInstrInfo.td |6 --
1 files changed, 4 insertion
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.173 -> 1.174
---
Log message:
ahem :)
---
Diffs of the changes: (+1 -1)
PPCInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Targe
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.171 -> 1.172
---
Log message:
Remove a comment that no longer applies.
---
Diffs of the changes: (+0 -1)
PPCInstrInfo.td |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.170 -> 1.171
---
Log message:
add ret void support back
---
Diffs of the changes: (+4 -0)
PPCInstrInfo.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.169 -> 1.170
PPCRegisterInfo.cpp updated: 1.38 -> 1.39
---
Log message:
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
hasInFlag, hasOutFlag.
---
Diffs of the changes: (+6 -11)
PPCInstrI
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.167 -> 1.168
---
Log message:
Add unique id to debug location for debug label use (work in progress.)
---
Diffs of the changes: (+4 -3)
PPCInstrInfo.td |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.166 -> 1.167
---
Log message:
Add support for generating v4i32 altivec code
---
Diffs of the changes: (+10 -2)
PPCInstrInfo.td | 12 ++--
1 files changed, 10 insertions(+), 2 deletions(-)
Index: llvm/lib/T
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.165 -> 1.166
---
Log message:
Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix thi
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.164 -> 1.165
PPCRegisterInfo.cpp updated: 1.37 -> 1.38
---
Log message:
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
* Added a pseudo instruction (for each target) that represent "return void".
Th
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.163 -> 1.164
---
Log message:
Flip the meaning of FPContractions to reflect Requires<[]> change.
---
Diffs of the changes: (+1 -1)
PPCInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llv
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.159 -> 1.160
PPCRegisterInfo.td updated: 1.26 -> 1.27
---
Log message:
Add a second vector type to the VRRC register class, and fix some patterns
so that tablegen can infer all types.
---
Diffs of the changes: (+6 -6)
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.157 -> 1.158
---
Log message:
Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS.
---
Diffs of the changes: (+11 -4)
PPCInstrInfo.td | 15 +++
1 files changed, 11 insertions(+), 4 d
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.150 -> 1.151
---
Log message:
Add some explicit type casts so that tblgen knows the type of the shift
amount, which is not necessarily the same as the type being shifted.
---
Diffs of the changes: (+5 -5)
PPCInstrInfo
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.149 -> 1.150
PPCISelDAGToDAG.cpp updated: 1.136 -> 1.137
---
Log message:
Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
improvements.
---
Diffs of the changes: (+12 -11)
PPCISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.148 -> 1.149
PPCISelDAGToDAG.cpp updated: 1.135 -> 1.136
---
Log message:
Finish moving uncond br over to .td file, remove from .cpp file.
---
Diffs of the changes: (+2 -4)
PPCISelDAGToDAG.cpp |4 +---
PPCInstrIn
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.141 -> 1.142
---
Log message:
Generate LA and ADDIS when possible.
---
Diffs of the changes: (+6 -4)
PPCInstrInfo.td | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/PowerPC
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.139 -> 1.140
---
Log message:
LI could theoretically be used for the lo-part of a global address, just like
lis can be used for the high part.
---
Diffs of the changes: (+1 -1)
PPCInstrInfo.td |2 +-
1 files chang
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