[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp

2007-03-12 Thread Zhou Sheng
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.657 -> 1.658 --- Log message: For expression like "APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)", to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of zext(). --- Diffs of the chan

[llvm-commits] CVS: llvm/include/llvm/ADT/APInt.h

2007-03-12 Thread Zhou Sheng
Changes in directory llvm/include/llvm/ADT: APInt.h updated: 1.41 -> 1.42 --- Log message: Add zextOrCopy() into APInt for convenience. --- Diffs of the changes: (+9 -0) APInt.h |9 + 1 files changed, 9 insertions(+) Index: llvm/include/llvm/ADT/APInt.h diff -u llvm/include/l

[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp

2007-03-12 Thread Zhou Sheng
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.656 -> 1.657 --- Log message: In APInt version ComputeMaskedBits(): 1. Ensure VTy, KnownOne and KnownZero have same bitwidth. 2. Make code more efficient. --- Diffs of the changes: (+28 -15) Instructio

[llvm-commits] CVS: llvm/lib/Target/ARM/ARMTargetMachine.cpp ARMTargetMachine.h

2007-03-12 Thread Evan Cheng
Changes in directory llvm/lib/Target/ARM: ARMTargetMachine.cpp updated: 1.25 -> 1.26 ARMTargetMachine.h updated: 1.8 -> 1.9 --- Log message: Implement getTargetLowering() or else LSR won't be using ARM specific hooks. --- Diffs of the changes: (+8 -1) ARMTargetMachine.cpp |3 ++- ARMTar

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

2007-03-12 Thread Evan Cheng
Changes in directory llvm/lib/CodeGen/SelectionDAG: TargetLowering.cpp updated: 1.95 -> 1.96 --- Log message: More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. --- Diffs of the changes: (+13 -3) TargetLowering.cpp | 16 +

[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp ARMISelLowering.h

2007-03-12 Thread Evan Cheng
Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.20 -> 1.21 ARMISelLowering.h updated: 1.2 -> 1.3 --- Log message: Updated TargetLowering LSR addressing mode hooks for ARM and Thumb. --- Diffs of the changes: (+88 -8) ARMISelLowering.cpp | 81 ++

[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCISelLowering.h

2007-03-12 Thread Evan Cheng
Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.260 -> 1.261 PPCISelLowering.h updated: 1.61 -> 1.62 --- Log message: More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. --- Diffs of the changes: (

[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h

2007-03-12 Thread Evan Cheng
Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.367 -> 1.368 X86ISelLowering.h updated: 1.91 -> 1.92 --- Log message: More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. --- Diffs of the changes: (+33

[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp

2007-03-12 Thread Evan Cheng
Changes in directory llvm/lib/Transforms/Scalar: LoopStrengthReduce.cpp updated: 1.116 -> 1.117 --- Log message: Use new TargetLowering addressing modes hooks. --- Diffs of the changes: (+18 -20) LoopStrengthReduce.cpp | 38 ++ 1 files changed, 18 inser

[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h

2007-03-12 Thread Evan Cheng
Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.111 -> 1.112 --- Log message: More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. --- Diffs of the changes: (+10 -20) TargetLowering.h | 30

Re: [llvm-commits] llvm-gcc: support arrays with non-zero lower bound

2007-03-12 Thread Devang Patel
On Mar 2, 2007, at 6:19 AM, Duncan Sands wrote: > Refreshed patch after Chris's array indexing changes. Applied. - Devang ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

[llvm-commits] [124921] Support arrays with non-zero lower bound

2007-03-12 Thread dpatel
Revision: 124921 Author: dpatel Date: 2007-03-12 16:07:59 -0700 (Mon, 12 Mar 2007) Log Message: --- Support arrays with non-zero lower bound Patch by Duncan Sands. Modified Paths: -- apple-local/branches/llvm/gcc/llvm-abi.h apple-local/branches/llvm/gcc/llvm-conv

[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp

2007-03-12 Thread Evan Cheng
Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.366 -> 1.367 --- Log message: Stupid bug: SSE2 supports v2i64 add / sub. --- Diffs of the changes: (+2 -0) X86ISelLowering.cpp |2 ++ 1 files changed, 2 insertions(+) Index: llvm/lib/Target/X86/X86ISelLowering.cp

Re: [llvm-commits] llvm-gcc: use component_ref_field_offset in component references

2007-03-12 Thread Devang Patel
On Mar 2, 2007, at 6:36 AM, Duncan Sands wrote: > The third operand of a COMPONENT_REF represents the byte offset of > the field; it is accessed using component_ref_field_offset. Most of > the time you can get away with extracting the offset from the type, > using DECL_FIELD_OFFSET, which is wha

[llvm-commits] [124887] Fix component reference handling.

2007-03-12 Thread dpatel
Revision: 124887 Author: dpatel Date: 2007-03-12 15:27:39 -0700 (Mon, 12 Mar 2007) Log Message: --- Fix component reference handling. Patch by Duncan Sands. Modified Paths: -- apple-local/branches/llvm/gcc/llvm-convert.cpp Modified: apple-local/branches/llvm/gcc/llv

[llvm-commits] llvm-gcc: emit switch cases with a wide range as a conditional branch

2007-03-12 Thread Duncan Sands
In gcc, a switch case is a range of values that branch to a label, for example 1 .. 17 -> label. These are emitted as individual LLVM switch cases: 1 -> label, 2 -> label, ..., 17 -> label. This works well except, for example, when the range is INT_MIN .. 0 -> label, in which case you can say goo

[llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/Local.cpp

2007-03-12 Thread Andrew Lenharth
Changes in directory llvm-poolalloc/lib/DSA: Local.cpp updated: 1.158.2.4.2.5 -> 1.158.2.4.2.6 --- Log message: add these --- Diffs of the changes: (+2 -0) Local.cpp |2 ++ 1 files changed, 2 insertions(+) Index: llvm-poolalloc/lib/DSA/Local.cpp diff -u llvm-poolalloc/lib/DSA/Local.cp

Re: [llvm-commits] CVS: llvm/lib/Support/APInt.cpp

2007-03-12 Thread Reid Spencer
On Mon, 2007-03-12 at 12:48 -0500, Zhou Sheng wrote: > > Changes in directory llvm/lib/Support: > > APInt.cpp updated: 1.69 -> 1.70 > --- > Log message: > > For APInt::z/sext(width), if width == BitWidth, just return *this. Sheng, this is incorrect. It is not legal to use sext/zext with a bit w

[llvm-commits] CVS: llvm/lib/Support/APInt.cpp

2007-03-12 Thread Reid Spencer
Changes in directory llvm/lib/Support: APInt.cpp updated: 1.70 -> 1.71 --- Log message: Revert the last patch as it violates the conditions of sext/zext. --- Diffs of the changes: (+0 -4) APInt.cpp |4 1 files changed, 4 deletions(-) Index: llvm/lib/Support/APInt.cpp diff -u llv

[llvm-commits] CVS: llvm/lib/Support/APInt.cpp

2007-03-12 Thread Zhou Sheng
Changes in directory llvm/lib/Support: APInt.cpp updated: 1.69 -> 1.70 --- Log message: For APInt::z/sext(width), if width == BitWidth, just return *this. --- Diffs of the changes: (+4 -0) APInt.cpp |4 1 files changed, 4 insertions(+) Index: llvm/lib/Support/APInt.cpp diff -u l

[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp

2007-03-12 Thread Reid Spencer
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.655 -> 1.656 --- Log message: Add an APInt version of SimplifyDemandedBits. Patch by Zhou Sheng. --- Diffs of the changes: (+524 -1) InstructionCombining.cpp | 525 +++

[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp

2007-03-12 Thread Reid Spencer
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.654 -> 1.655 --- Log message: Add an APInt version of ShrinkDemandedConstant. Patch by Zhou Sheng. --- Diffs of the changes: (+24 -0) InstructionCombining.cpp | 24 1 files chan

[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp

2007-03-12 Thread Zhou Sheng
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.653 -> 1.654 --- Log message: Avoid to assert on "(KnownZero & KnownOne) == 0". --- Diffs of the changes: (+1 -1) InstructionCombining.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index:

[llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/Local.cpp

2007-03-12 Thread Andrew Lenharth
Changes in directory llvm-poolalloc/lib/DSA: Local.cpp updated: 1.158.2.4.2.4 -> 1.158.2.4.2.5 --- Log message: this could be bad, but it doesn't trigger --- Diffs of the changes: (+27 -0) Local.cpp | 27 +++ 1 files changed, 27 insertions(+) Index: llvm-poolallo

Re: [llvm-commits] Stack and register alignment in linux/ppc calls

2007-03-12 Thread Nicolas Geoffray
Here's the final patch with the modifications you suggested. Thx a lot for your reviewing Chris. If everything's OK I'm checking this in soon. Cheers, Nicolas Chris Lattner wrote: On Mar 6, 2007, at 10:03 AM, Nicolas Geoffray wrote: This patch corrects arguments passing alignment for linux/p

Re: [llvm-commits] llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

2007-03-12 Thread Nicolas Geoffray
Hi Chris, Chris Lattner wrote: > Ahhh, ok. I think I understand now what is going on. Thank you for > the very clear explanation. > > In this case, it seems like a clearly good thing to just call > CreateFixedObject unconditionally early on (e.g.) when lowering the > arguments. > Uncondition