Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.367 -> 1.368
X86ISelLowering.h updated: 1.91 -> 1.92
---
Log message:
More flexible TargetLowering LSR hooks for testing whether an immediate is
a legal target address immediate or scale.
---
Diffs of the changes: (+33 -16)
X86ISelLowering.cpp | 34 +++++++++++++++++++++-------------
X86ISelLowering.h | 15 ++++++++++++---
2 files changed, 33 insertions(+), 16 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.367
llvm/lib/Target/X86/X86ISelLowering.cpp:1.368
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.367 Mon Mar 12 17:58:52 2007
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Mon Mar 12 18:28:50 2007
@@ -64,16 +64,6 @@
setUseUnderscoreLongJmp(true);
}
- // Add legal addressing mode scale values.
- addLegalAddressScale(8);
- addLegalAddressScale(4);
- addLegalAddressScale(2);
- // Enter the ones which require both scale + index last. These are more
- // expensive.
- addLegalAddressScale(9);
- addLegalAddressScale(5);
- addLegalAddressScale(3);
-
// Set up the register classes.
addRegisterClass(MVT::i8, X86::GR8RegisterClass);
addRegisterClass(MVT::i16, X86::GR16RegisterClass);
@@ -4016,13 +4006,16 @@
}
}
-/// isLegalAddressImmediate - Return true if the integer value or
-/// GlobalValue can be used as the offset of the target addressing mode.
-bool X86TargetLowering::isLegalAddressImmediate(int64_t V) const {
+/// isLegalAddressImmediate - Return true if the integer value can be used
+/// as the offset of the target addressing mode for load / store of the
+/// given type.
+bool X86TargetLowering::isLegalAddressImmediate(int64_t V,const Type *Ty)
const{
// X86 allows a sign-extended 32-bit immediate field.
return (V > -(1LL << 32) && V < (1LL << 32)-1);
}
+/// isLegalAddressImmediate - Return true if the GlobalValue can be used as
+/// the offset of the target addressing mode.
bool X86TargetLowering::isLegalAddressImmediate(GlobalValue *GV) const {
// In 64-bit mode, GV is 64-bit so it won't fit in the 32-bit displacement
// field unless we are in small code model.
@@ -4033,6 +4026,21 @@
return (!Subtarget->GVRequiresExtraLoad(GV, getTargetMachine(), false));
}
+/// isLegalAddressScale - Return true if the integer value can be used as the
+/// scale of the target addressing mode for load / store of the given type.
+bool X86TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const {
+ switch (S) {
+ default:
+ return false;
+ case 2: case 4: case 8:
+ return true;
+ // FIXME: These require both scale + index last and thus more expensive.
+ // How to tell LSR to try for 2, 4, 8 first?
+ case 3: case 5: case 9:
+ return true;
+ }
+}
+
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask values
Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.91
llvm/lib/Target/X86/X86ISelLowering.h:1.92
--- llvm/lib/Target/X86/X86ISelLowering.h:1.91 Fri Mar 2 17:16:35 2007
+++ llvm/lib/Target/X86/X86ISelLowering.h Mon Mar 12 18:28:50 2007
@@ -335,11 +335,20 @@
getRegForInlineAsmConstraint(const std::string &Constraint,
MVT::ValueType VT) const;
- /// isLegalAddressImmediate - Return true if the integer value or
- /// GlobalValue can be used as the offset of the target addressing mode.
- virtual bool isLegalAddressImmediate(int64_t V) const;
+ /// isLegalAddressImmediate - Return true if the integer value can be used
+ /// as the offset of the target addressing mode for load / store of the
+ /// given type.
+ virtual bool isLegalAddressImmediate(int64_t V, const Type *Ty) const;
+
+ /// isLegalAddressImmediate - Return true if the GlobalValue can be used as
+ /// the offset of the target addressing mode.
virtual bool isLegalAddressImmediate(GlobalValue *GV) const;
+ /// isLegalAddressScale - Return true if the integer value can be used as
+ /// the scale of the target addressing mode for load / store of the given
+ /// type.
+ virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
+
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask
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