[llvm-branch-commits] [llvm] [CodeGen] Add 2 subtarget hooks canLowerToZeroCycleReg[Move|Zeroing] (PR #148428)

tomershafir wrote: sorry for the 2 bad commit names, had a problem locally with `spr` and cant update them https://github.com/llvm/llvm-project/pull/148428 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/

[llvm-branch-commits] [llvm] [CodeGen] Prevent register coalescer rematerialization based on target (PR #148430)

https://github.com/tomershafir updated https://github.com/llvm/llvm-project/pull/148430 >From 3d3d156da4c35e4421652d621e0a070ab2b8e5f7 Mon Sep 17 00:00:00 2001 From: tomershafir Date: Tue, 15 Jul 2025 19:13:17 +0300 Subject: [PATCH] fix format Created using spr 1.3.6 --- llvm/lib/CodeGen/Regi

[llvm-branch-commits] [CodeGen] Prevent register coalescer rematerialization based on target (PR #148430)

https://github.com/tomershafir updated https://github.com/llvm/llvm-project/pull/148430 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [CodeGen] Add target hook shouldReMaterializeTrivialRegDef (PR #148429)

https://github.com/tomershafir updated https://github.com/llvm/llvm-project/pull/148429 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [CodeGen] Prevent register coalescer rematerialization based on target (PR #148430)

https://github.com/tomershafir updated https://github.com/llvm/llvm-project/pull/148430 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [CodeGen] Add target hook shouldReMaterializeTrivialRegDef (PR #148429)

https://github.com/tomershafir updated https://github.com/llvm/llvm-project/pull/148429 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen] Add 2 subtarget hooks canLowerToZeroCycleReg[Move|Zeroing] (PR #148428)

https://github.com/tomershafir updated https://github.com/llvm/llvm-project/pull/148428 >From 9efe85048c2f68b724949172898fb4880ad8b4a4 Mon Sep 17 00:00:00 2001 From: tomershafir Date: Tue, 15 Jul 2025 12:39:26 +0300 Subject: [PATCH 1/3] git log Created using spr 1.3.6 --- llvm/lib/Target/AArc

[llvm-branch-commits] [CodeGen] Prevent register coalescer rematerialization based on target (PR #148430)

@@ -1400,6 +1403,12 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP, if (!Edit.canRematerializeAt(RM, ValNo, CopyIdx)) return false; + if (!TII->shouldReMaterializeTrivialRegDef(CopyMI, DstReg, SrcReg)) { tomershafir wrote:

[llvm-branch-commits] [CodeGen] Prevent register coalescer rematerialization based on target (PR #148430)

tomershafir wrote: This is part of a patch series: * https://github.com/llvm/llvm-project/pull/148430 * https://github.com/llvm/llvm-project/pull/148429 * https://github.com/llvm/llvm-project/pull/148428 * https://github.com/llvm/llvm-project/pull/148427 https://github.com/llvm/llvm-project/pul

[llvm-branch-commits] [CodeGen] Add target hook shouldReMaterializeTrivialRegDef (PR #148429)

tomershafir wrote: This is part of a patch series: * https://github.com/llvm/llvm-project/pull/148430 * https://github.com/llvm/llvm-project/pull/148429 * https://github.com/llvm/llvm-project/pull/148428 * https://github.com/llvm/llvm-project/pull/148427 https://github.com/llvm/llvm-project/pul

[llvm-branch-commits] [CodeGen] Add 2 subtarget hooks canLowerToZeroCycleReg[Move|Zeroing] (PR #148428)

tomershafir wrote: This is part of a patch series: * https://github.com/llvm/llvm-project/pull/148430 * https://github.com/llvm/llvm-project/pull/148429 * https://github.com/llvm/llvm-project/pull/148428 * https://github.com/llvm/llvm-project/pull/148427 https://github.com/llvm/llvm-project/pul

[llvm-branch-commits] [CodeGen] Add target hook shouldReMaterializeTrivialRegDef (PR #148429)

https://github.com/tomershafir created https://github.com/llvm/llvm-project/pull/148429 Adds a target hook `shouldReMaterializeTrivialRegDef` that enables target to specify wether rematerialization of the copy is beneficial. This patch also provide an implementation for AArch64 based on the ne

[llvm-branch-commits] [CodeGen] Prevent register coalescer rematerialization based on target (PR #148430)

https://github.com/tomershafir created https://github.com/llvm/llvm-project/pull/148430 This change makes the register coalescer prevent rematerialization of a trivial def for a move instruction, if the target guides against it, based on the new target hook `shouldReMaterializeTrivialRegDef`.

[llvm-branch-commits] [CodeGen] Add 2 subtarget hooks canLowerToZeroCycleReg[Move|Zeroing] (PR #148428)

https://github.com/tomershafir created https://github.com/llvm/llvm-project/pull/148428 Adds 2 subtarget hooks `canLowerToZeroCycleRegMove` and `canLowerToZeroCycleRegZeroing` to enable query if an instruction can be lowered to a zero cycle instruction. The logic depends on the microarchitect