arsenm wrote:
> ping
Fix the description
https://github.com/llvm/llvm-project/pull/109937
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https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/110229
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@@ -3851,3 +3851,14 @@ SIRegisterInfo::getSubRegAlignmentNumBits(const
TargetRegisterClass *RC,
}
return 0;
}
+
+SmallVector
+SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
+ const MachineFunction &MF) const {
+ SmallVector RegFlags;
+ c
@@ -1716,6 +1716,19 @@ bool GCNTargetMachine::parseMachineFunctionInfo(
MFI->reserveWWMRegister(ParsedReg);
}
+ auto setRegisterFlags = [&](const VRegInfo &Info) {
+for (uint8_t Flag : Info.Flags) {
+ MFI->setFlag(Info.VReg, Flag);
+}
arsen
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/111634
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Akshat-Oke wrote:
ping
https://github.com/llvm/llvm-project/pull/109937
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https://github.com/Akshat-Oke updated
https://github.com/llvm/llvm-project/pull/111634
>From 8e7f36627516a76d76ac7bb1d8c756261b6bbc5c Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 9 Oct 2024 05:01:22 +
Subject: [PATCH 1/2] [MIR] Add missing noteNewVirtualRegister callbacks
---
llvm
https://github.com/Akshat-Oke updated
https://github.com/llvm/llvm-project/pull/110229
>From f4a65dea10cd581aada8cbdf33dae5a66518ddcf Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Fri, 27 Sep 2024 08:58:39 +
Subject: [PATCH 1/7] [AMDGPU] Serialize WWM_REG vreg flag
---
llvm/lib/Target/A
https://github.com/Akshat-Oke updated
https://github.com/llvm/llvm-project/pull/111634
>From 8e7f36627516a76d76ac7bb1d8c756261b6bbc5c Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 9 Oct 2024 05:01:22 +
Subject: [PATCH] [MIR] Add missing noteNewVirtualRegister callbacks
---
llvm/lib
https://github.com/cdevadas commented:
The changes you made in llvm/lib/CodeGen/MIRParser/MIRParser.cpp are not
related to this PR.
Create a separate NFC patch for it.
https://github.com/llvm/llvm-project/pull/111634
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@@ -684,8 +684,8 @@ class SIMachineFunctionInfo final : public
AMDGPUMachineFunction,
void setFlag(Register Reg, uint8_t Flag) {
assert(Reg.isVirtual());
-if (VRegFlags.inBounds(Reg))
- VRegFlags[Reg] |= Flag;
+VRegFlags.grow(Reg);
Akshat-O
arsenm wrote:
ping
https://github.com/llvm/llvm-project/pull/103939
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https://github.com/Akshat-Oke ready_for_review
https://github.com/llvm/llvm-project/pull/111634
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https://github.com/Akshat-Oke edited
https://github.com/llvm/llvm-project/pull/111634
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Akshat-Oke wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/111634?utm_source=stack-comment-downstack-mergeability-warnin
https://github.com/Akshat-Oke edited
https://github.com/llvm/llvm-project/pull/110229
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https://github.com/llvm/llvm-project/pull/110229
>From 2b877142d7a9346033d02e5a977d2dcaa440258c Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 9 Oct 2024 05:01:22 +
Subject: [PATCH 1/7] [MIR] Add missing noteNewVirtualRegister callbacks
---
llvm
https://github.com/Akshat-Oke created
https://github.com/llvm/llvm-project/pull/111634
None
>From 2b877142d7a9346033d02e5a977d2dcaa440258c Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 9 Oct 2024 05:01:22 +
Subject: [PATCH] [MIR] Add missing noteNewVirtualRegister callbacks
---
ll
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/110815
>From 078f5f02502edadcc9c86f3e45f69e9fac918656 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 2 Oct 2024 11:20:23 +0400
Subject: [PATCH 1/3] DAG: Preserve more flags when expanding gep
This allows sele
https://github.com/fmayer closed
https://github.com/llvm/llvm-project/pull/110337
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https://github.com/vitalybuka approved this pull request.
https://github.com/llvm/llvm-project/pull/110337
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https://github.com/kovdan01 dismissed
https://github.com/llvm/llvm-project/pull/110705
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https://github.com/kovdan01 commented:
With latest update, test-suite passes, thanks!
https://github.com/llvm/llvm-project/pull/110705
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clementval wrote:
How recent is your latest rebase? They are missing files in this PR.
https://github.com/llvm/llvm-project/pull/110298
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@@ -171,145 +76,88 @@ set(sources
unit-map.cpp
unit.cpp
utf.cpp
- ${FORTRAN_MODULE_OBJECTS}
)
-include(AddFlangOffloadRuntime)
-
-# List of files that are buildable for all devices.
-set(supported_files
- ISO_Fortran_binding.cpp
- allocatable.cpp
- allocator-regist
https://github.com/hokein approved this pull request.
https://github.com/llvm/llvm-project/pull/111318
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@@ -454,6 +454,14 @@ class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
// No check if the subreg is supported by the current RC is made.
unsigned getSubRegAlignmentNumBits(const TargetRegisterClass *RC,
unsigned SubReg) const;
https://github.com/klausler commented:
This is a gigantic change and I don't understand why it's being made. Why is
so much code moving out of flang/ ?
https://github.com/llvm/llvm-project/pull/110298
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@@ -3839,3 +3839,14 @@ SIRegisterInfo::getSubRegAlignmentNumBits(const
TargetRegisterClass *RC,
}
return 0;
}
+
+SmallVector>
+SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
+ const MachineFunction &MF) const {
+ SmallVector> RegFlags;
+
@@ -3839,3 +3839,14 @@ SIRegisterInfo::getSubRegAlignmentNumBits(const
TargetRegisterClass *RC,
}
return 0;
}
+
+SmallVector>
+SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
+ const MachineFunction &MF) const {
+ SmallVector> RegFlags;
+
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/103939
>From b655b4c3d3be5f8347ff4bc8fa37c1553f1fd980 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 14 Aug 2024 16:51:08 +0400
Subject: [PATCH] Local: Handle noalias.addrspace in copyMetadataForLoad
---
llv
nickdesaulniers wrote:
ping @lntue for review here.
https://github.com/llvm/llvm-project/pull/106006
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https://github.com/tblah approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/110298
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https://github.com/kadircet approved this pull request.
https://github.com/llvm/llvm-project/pull/111245
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@@ -1,15 +0,0 @@
-if (FLANG_CUF_RUNTIME)
Meinersbur wrote:
File has been moved to FortranRuntime/unittests/Runtime/CUDA/CMakeLists.txt
(https://github.com/llvm/llvm-project/pull/110298/files/8b984fea71966e325e8e1306ab1da34be47ff746#diff-c6d68be4180e8ba3884bdd150
@@ -3839,3 +3839,14 @@ SIRegisterInfo::getSubRegAlignmentNumBits(const
TargetRegisterClass *RC,
}
return 0;
}
+
+SmallVector>
+SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
+ const MachineFunction &MF) const {
+ SmallVector> RegFlags;
+
https://github.com/Akshat-Oke updated
https://github.com/llvm/llvm-project/pull/110229
>From 1cbc26fe2de38ae4e174aec128b39c899dab9136 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Fri, 27 Sep 2024 08:58:39 +
Subject: [PATCH 1/5] [AMDGPU] Serialize WWM_REG vreg flag
---
llvm/lib/Target/A
@@ -13,19 +13,22 @@
#include "Utils.h"
#include "Clauses.h"
+#include
+
+#include
#include
+#include
TIFitis wrote:
Are all of the header file changes necessary? Just making sure we only have the
minimal set here.
https://github.com/llvm/llvm-project/p
@@ -2663,6 +2657,8 @@ static llvm::omp::OpenMPOffloadMappingFlags
mapParentWithMembers(
auto mapOp = dyn_cast(mapData.MapClause[mapDataIndex]);
int firstMemberIdx = getMapDataMemberIdx(
mapData, getFirstOrLastMappedMemberPtr(mapOp, true));
+// NOTE/TODO: Sh
https://github.com/TIFitis approved this pull request.
Added couple of nit comments. Otherwise happy with the patch. Thank you for the
amazing work :)
https://github.com/llvm/llvm-project/pull/91
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https://github.com/TIFitis edited
https://github.com/llvm/llvm-project/pull/91
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@@ -2468,51 +2468,45 @@ static int getMapDataMemberIdx(MapInfoData &mapData,
omp::MapInfoOp memberOp) {
return std::distance(mapData.MapClause.begin(), res);
}
-static omp::MapInfoOp getFirstOrLastMappedMemberPtr(omp::MapInfoOp mapInfo,
-
@@ -684,8 +684,8 @@ class SIMachineFunctionInfo final : public
AMDGPUMachineFunction,
void setFlag(Register Reg, uint8_t Flag) {
assert(Reg.isVirtual());
-if (VRegFlags.inBounds(Reg))
- VRegFlags[Reg] |= Flag;
+VRegFlags.grow(Reg);
cdevadas
@@ -684,8 +684,8 @@ class SIMachineFunctionInfo final : public
AMDGPUMachineFunction,
void setFlag(Register Reg, uint8_t Flag) {
assert(Reg.isVirtual());
-if (VRegFlags.inBounds(Reg))
- VRegFlags[Reg] |= Flag;
+VRegFlags.grow(Reg);
Akshat-O
@@ -225,32 +359,79 @@ class MapInfoFinalizationPass
fir::FirOpBuilder &builder,
mlir::Operation *target) {
auto mapClauseOwner =
-llvm::dyn_cast(target);
+llvm::dyn_cast_if_present(
+
@@ -145,11 +146,174 @@ createMapInfoOp(fir::FirOpBuilder &builder,
mlir::Location loc,
builder.getIntegerAttr(builder.getIntegerType(64, false), mapType),
builder.getAttr(mapCaptureType),
builder.getStringAttr(name), builder.getBoolAttr(partialMap));
-
ret
@@ -183,99 +347,69 @@ getComponentObject(std::optional object,
return getComponentObject(baseObj.value(), semaCtx);
}
-static void
-generateMemberPlacementIndices(const Object &object,
- llvm::SmallVectorImpl &indices,
-
@@ -49,38 +51,95 @@ using DeclareTargetCapturePair =
// and index data when lowering OpenMP map clauses. Keeps track of the
// placement of the component in the derived type hierarchy it rests within,
// alongside the generated mlir::omp::MapInfoOp for the mapped component.
-st
@@ -145,11 +146,174 @@ createMapInfoOp(fir::FirOpBuilder &builder,
mlir::Location loc,
builder.getIntegerAttr(builder.getIntegerType(64, false), mapType),
builder.getAttr(mapCaptureType),
builder.getStringAttr(name), builder.getBoolAttr(partialMap));
-
ret
@@ -183,99 +347,69 @@ getComponentObject(std::optional object,
return getComponentObject(baseObj.value(), semaCtx);
}
-static void
-generateMemberPlacementIndices(const Object &object,
- llvm::SmallVectorImpl &indices,
-
@@ -183,99 +347,69 @@ getComponentObject(std::optional object,
return getComponentObject(baseObj.value(), semaCtx);
}
-static void
-generateMemberPlacementIndices(const Object &object,
- llvm::SmallVectorImpl &indices,
-
@@ -183,99 +347,69 @@ getComponentObject(std::optional object,
return getComponentObject(baseObj.value(), semaCtx);
}
-static void
-generateMemberPlacementIndices(const Object &object,
- llvm::SmallVectorImpl &indices,
-
@@ -0,0 +1,161 @@
+!RUN: %flang_fc1 -emit-hlfir -fopenmp %s -o - | FileCheck %s
+
+!CHECK: %[[ALLOCA:.*]] = fir.alloca
!fir.type<_QFtest_derived_type_allocatable_map_operand_and_block_additionTone_layer{i:f32,scalar:!fir.box>,array_i:!fir.array<10xi32>,j:f32,array_j:!fir.box>>,k:
@@ -145,11 +146,174 @@ createMapInfoOp(fir::FirOpBuilder &builder,
mlir::Location loc,
builder.getIntegerAttr(builder.getIntegerType(64, false), mapType),
builder.getAttr(mapCaptureType),
builder.getStringAttr(name), builder.getBoolAttr(partialMap));
-
ret
@@ -145,11 +146,174 @@ createMapInfoOp(fir::FirOpBuilder &builder,
mlir::Location loc,
builder.getIntegerAttr(builder.getIntegerType(64, false), mapType),
builder.getAttr(mapCaptureType),
builder.getStringAttr(name), builder.getBoolAttr(partialMap));
-
ret
@@ -49,38 +51,95 @@ using DeclareTargetCapturePair =
// and index data when lowering OpenMP map clauses. Keeps track of the
// placement of the component in the derived type hierarchy it rests within,
// alongside the generated mlir::omp::MapInfoOp for the mapped component.
-st
https://github.com/ergawy commented:
Reviewed `Utils.h/.cpp`, submitting the current state of the review to prevent
double-reviews when possible.
https://github.com/llvm/llvm-project/pull/92
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@@ -145,11 +146,174 @@ createMapInfoOp(fir::FirOpBuilder &builder,
mlir::Location loc,
builder.getIntegerAttr(builder.getIntegerType(64, false), mapType),
builder.getAttr(mapCaptureType),
builder.getStringAttr(name), builder.getBoolAttr(partialMap));
-
ret
https://github.com/ergawy edited
https://github.com/llvm/llvm-project/pull/92
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https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/109410
>From b695265d5a72bf3c6ebe137df4d730fb92df08c5 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 14 Aug 2024 13:57:14 +0400
Subject: [PATCH 1/2] AMDGPU: Custom expand flat cmpxchg which may access
private
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/109408
>From fe3d55c18a74cc418315f7b04ae8390a638e2efd Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Thu, 12 Sep 2024 12:44:04 +0400
Subject: [PATCH] AMDGPU: Add baseline tests for cmpxchg custom expansion
We need
@@ -3839,3 +3839,14 @@ SIRegisterInfo::getSubRegAlignmentNumBits(const
TargetRegisterClass *RC,
}
return 0;
}
+
+SmallVector>
+SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
+ const MachineFunction &MF) const {
+ SmallVector> RegFlags;
+
@@ -3839,3 +3839,14 @@ SIRegisterInfo::getSubRegAlignmentNumBits(const
TargetRegisterClass *RC,
}
return 0;
}
+
+SmallVector>
+SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
+ const MachineFunction &MF) const {
+ SmallVector> RegFlags;
+
@@ -1,15 +0,0 @@
-if (FLANG_CUF_RUNTIME)
tblah wrote:
why was this file deleted?
https://github.com/llvm/llvm-project/pull/110298
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@@ -454,6 +454,16 @@ class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
// No check if the subreg is supported by the current RC is made.
unsigned getSubRegAlignmentNumBits(const TargetRegisterClass *RC,
unsigned SubReg) const;
@@ -3839,3 +3839,14 @@ SIRegisterInfo::getSubRegAlignmentNumBits(const
TargetRegisterClass *RC,
}
return 0;
}
+
+SmallVector>
+SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
+ const MachineFunction &MF) const {
+ SmallVector> RegFlags;
+
@@ -684,8 +684,8 @@ class SIMachineFunctionInfo final : public
AMDGPUMachineFunction,
void setFlag(Register Reg, uint8_t Flag) {
assert(Reg.isVirtual());
-if (VRegFlags.inBounds(Reg))
- VRegFlags[Reg] |= Flag;
+VRegFlags.grow(Reg);
arsenm w
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