Re: [lldb-dev] [RFC] Support for AArch64/Arm64 scalable vector extension (SVE)

2019-07-12 Thread Greg Clayton via lldb-dev
Sounds like each register can very in size each time you stop if I read the docs correctly. As Pavel said "dynamic_size_dwarf_expr" might work for you here. Registers in a lldb_private::RegisterContext can have their sizes using: uint32_t RegisterContext::UpdateDynamicRegisterSize(const lldb_

Re: [lldb-dev] [RFC] Support for AArch64/Arm64 scalable vector extension (SVE)

2019-04-26 Thread Pavel Labath via lldb-dev
On 25/04/2019 00:07, Omair Javaid via lldb-dev wrote: I would also like to open a discussion on how we can implement variable length registers in LLDB and what could be the consequences of those changes. I am not saying I am particularly happy with how it was implemented, but you should take

[lldb-dev] [RFC] Support for AArch64/Arm64 scalable vector extension (SVE)

2019-04-24 Thread Omair Javaid via lldb-dev
Hi, I am going to be starting work on implementing LLDB support for AArch64/Arm64 scalable vector extension (SVE) in coming weeks. For a quick walk through of SVE please read through this doc here: https://www.kernel.org/doc/Documentation/arm64/sve.txt In summary it allows hardware + kernel which