On Wed, Sep 03, 2014 at 10:36:57PM -0400, Jerome Glisse wrote:
> On Wed, Sep 03, 2014 at 10:31:18PM -0400, Jerome Glisse wrote:
> > On Thu, Sep 04, 2014 at 12:25:23PM +1000, Benjamin Herrenschmidt wrote:
> > > On Wed, 2014-09-03 at 22:07 -0400, Jerome Glisse wrote:
> > >
> > > > So in the meantime
On Fri, Sep 05, 2014 at 03:28:47PM +1000, Michael Neuling wrote:
> The Debian powerpc little endian architecture is called ppc64le. This
Huh? ppc64le or ppc64el?
> is the default architecture used by Ubuntu for powerpc.
>
> The below checks the kernel config to see if we are compiling little
>
On Thu, Nov 27, 2014 at 05:48:41PM +0530, Madhavan Srinivasan wrote:
> This patch re-write the current local_* functions to CR5 based one.
> Base flow for each function is
>
> {
> set cr5(eq)
> load
> ..
> store
> clear cr5(eq)
> }
>
> Above set of instructions are
On Thu, Nov 27, 2014 at 05:48:40PM +0530, Madhavan Srinivasan wrote:
> This patch create the infrastructure to handle the CR based
> local_* atomic operations. Local atomic operations are fast
> and highly reentrant per CPU counters. Used for percpu
> variable updates. Local atomic operations o
On Wed, Dec 03, 2014 at 08:29:37PM +0530, Madhavan Srinivasan wrote:
> On Tuesday 02 December 2014 03:05 AM, Gabriel Paubert wrote:
> > On Thu, Nov 27, 2014 at 05:48:40PM +0530, Madhavan Srinivasan wrote:
> >> diff --git a/arch/powerpc/include/asm/exception-64s.h
> >>
On Mon, May 13, 2013 at 05:09:59PM +1000, Michael Neuling wrote:
> David Woodhouse wrote:
>
> > From: David Woodhouse
> >
> > Some versions of GCC apparently expect this to be provided by libgcc.
> >
> > Signed-off-by: David Woodhouse
> > ---
> > Untested.
> >
> > diff --git a/arch/powerpc/k
On Mon, May 13, 2013 at 11:38:13AM +0100, David Woodhouse wrote:
> On Mon, 2013-05-13 at 11:33 +0100, David Woodhouse wrote:
> >
> > On Mon, 2013-05-13 at 09:33 +0200, Gabriel Paubert wrote:
> > > Actually, I'd swap the two mr instructions to never
> > > ha
On Wed, Jul 22, 2015 at 03:51:03PM +1000, Michael Ellerman wrote:
> On Tue, 2015-07-21 at 12:28 +0530, Anshuman Khandual wrote:
> > From: "khand...@linux.vnet.ibm.com"
> >
> > This patch adds some documentation to 'patch_slb_encoding' function
> > explaining about how it clears the existing immed
On Fri, May 09, 2014 at 06:41:13AM -0700, Paul E. McKenney wrote:
> On Fri, May 09, 2014 at 05:47:12PM +1000, Anton Blanchard wrote:
> > I am seeing an issue where a CPU running perf eventually hangs.
> > Traces show timer interrupts happening every 4 seconds even
> > when a userspace task is runni
On Thu, Jun 12, 2014 at 06:22:11AM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2014-06-11 at 14:37 -0500, Christoph Lameter wrote:
> > Looking at arch/powerpc/include/asm/percpu.h I see that the per cpu offset
> > comes from a local_paca field and local_paca is in r13. That means that
> > for al
On Thu, Jun 12, 2014 at 07:26:39AM -0500, Segher Boessenkool wrote:
> > Actually, from gcc/config/rs6000.h:
> >
> > /* 1 for registers that have pervasive standard uses
> >and are not available for the register allocator.
>
> [snip]
>
> > So cr5, which is number 73, is never used by gcc.
>
On Thu, Jan 30, 2014 at 12:20:21PM +, Moese, Michael wrote:
> Hello PPC-developers,
> I'm currently trying to benchmark access speeds to our PCIe-connected IP-cores
> located inside our FPGA. On x86-based systems I was able to achieve bursts for
> both read and write access. On PPC32, using an
On Mon, Feb 03, 2014 at 08:16:49AM +0100, Michael Moese wrote:
> Allow for IO memory to be mapped cacheable for performing
> PCI read bursts.
>
> Signed-off-by: Michael Moese
> ---
> arch/powerpc/include/asm/io.h | 3 +++
> arch/powerpc/mm/pgtable_32.c | 8
> 2 files changed, 11 insert
On Thu, Feb 06, 2014 at 12:09:00PM +1000, Stephen N Chivers wrote:
> I have a MPC8548e based board and an application that makes
> extensive use of floating point including numerous calls to cos.
> In the same program there is the use of an sqlite database.
>
> The kernel is derived from 2.6.31 an
Hi Stephen,
On Fri, Feb 07, 2014 at 11:27:57AM +1000, Stephen N Chivers wrote:
> Gabriel Paubert wrote on 02/06/2014 07:26:37 PM:
>
> > From: Gabriel Paubert
> > To: Stephen N Chivers
> > Cc: linuxppc-dev@lists.ozlabs.org, Chris Proctor
> > Date: 02/06
On Fri, Feb 07, 2014 at 02:49:40PM -0600, James Yang wrote:
> On Fri, 7 Feb 2014, Gabriel Paubert wrote:
>
> > Hi Stephen,
> >
> > On Fri, Feb 07, 2014 at 11:27:57AM +1000, Stephen N Chivers wrote:
> > > Gabriel Paubert wrote on 02/06/2014 07:26:37 PM:
>
On Mon, Feb 10, 2014 at 11:17:38AM +, David Laight wrote:
> > > However, your other solutions are better.
> > >
> > >
> > > > > >
> > > > > > mask = (FM & 1);
> > > > > > mask |= (FM << 3) & 0x10;
> > > > > > mask |= (FM << 6) & 0x100;
> > > > > > mask |= (FM << 9) & 0x1000;
> > > > > > mask |=
On Mon, Feb 10, 2014 at 12:32:18PM +, David Laight wrote:
> > I disagree, perhaps mostly because the compiler is not clever enough, but
> > right
> > now the code for solution 1 is (actually I have rewritten the code
> > and it reads:
> >
> > mask = (FM & 1)
> > | ((FM
Hi James,
On Mon, Feb 10, 2014 at 11:03:07AM -0600, James Yang wrote:
[snipped]
> > Ok, if you have measured that method1 is faster than method2, let us go for
> > it.
> > I believe method2 would be faster if you had a large out-of-order execution
> > window, because more parallelism can
On Thu, Mar 06, 2014 at 09:44:47AM +, David Laight wrote:
> From: Sukadev Bhattiprolu
> > When checking whether a bit representing a register is set in
> > sample_regs, a 64-bit mask, use 64-bit value (1LL).
> >
> > Signed-off-by: Sukadev Bhattiprolu
> > ---
> > tools/perf/util/unwind.c |
On Fri, Jan 30, 2015 at 05:37:29AM +, Markus Stockhausen wrote:
> > Von: Scott Wood [scottw...@freescale.com]
> > Gesendet: Freitag, 30. Januar 2015 01:49
> > An: Markus Stockhausen
> > Cc: Michael Ellerman; linuxppc-dev@lists.ozlabs.org; Herbert Xu
> > Betreff: Re: AW: SPE & Interrupt context
On Fri, Jan 30, 2015 at 09:39:41AM +, Markus Stockhausen wrote:
> > Von: Gabriel Paubert [paub...@iram.es]
> > Gesendet: Freitag, 30. Januar 2015 09:49
> > An: Markus Stockhausen
> > Cc: Scott Wood; linuxppc-dev@lists.ozlabs.org; Herbert Xu
> > Betreff: Re: AW: SP
On Sat, Mar 28, 2015 at 12:19:10PM +1100, Michael Ellerman wrote:
> This adds a test of the switch_endian() syscall we added in the previous
> commit.
>
> We test it by calling the endian switch syscall, and then executing some
> code in the other endian to check everything went as expected. That
On Wed, Mar 09, 2016 at 12:38:18AM -0600, Scott Wood wrote:
> On Tue, Mar 08, 2016 at 08:59:12AM +0100, Alessio Igor Bogani wrote:
> > The mtmsr() function hangs during restart. Make reboot works on
> > MVME5100 removing that function call.
> > ---
> > arch/powerpc/platforms/embedded6xx/mvme5100.c
On Wed, Mar 09, 2016 at 03:26:21PM -0600, Scott Wood wrote:
> On Wed, 2016-03-09 at 11:28 +0100, Gabriel Paubert wrote:
> > On Wed, Mar 09, 2016 at 12:38:18AM -0600, Scott Wood wrote:
> > > On Tue, Mar 08, 2016 at 08:59:12AM +0100, Alessio Igor Bogani wrote:
> > > &
Hi Michael,
On Fri, Apr 01, 2016 at 05:14:35PM +1100, Michael Ellerman wrote:
> On Wed, 2016-03-30 at 23:49 +0530, Hari Bathini wrote:
> > Some of the interrupt vectors on 64-bit POWER server processors are
> > only 32 bytes long (8 instructions), which is not enough for the full
> ...
> > Le
On Fri, Sep 25, 2015 at 12:28:30PM +0300, Denis Kirjanov wrote:
> On 9/25/15, Arnd Bergmann wrote:
> > On Friday 25 September 2015 14:01:39 Michael Neuling wrote:
> >> This adds a benchmark directory to the powerpc selftests and adds a
> >> gettimeofday() benchmark to it.
> >>
> >> Suggested-by: M
On Fri, Oct 16, 2015 at 08:20:13AM +0200, Christophe JAILLET wrote:
> Le 15/10/2015 08:36, Michael Ellerman a écrit :
> >On Thu, 2015-10-15 at 07:56 +0200, Christophe JAILLET wrote:
> >>Use 'of_property_read_u32()' instead of 'of_get_property()'+pointer
> >>dereference in order to avoid access to p
On Mon, Nov 30, 2015 at 06:08:23PM +0100, Christian Zigotzky wrote:
> Hi All,
>
> I have tested the PA Semi Ethernet with the kernels 4.2.3 and 4.3.0
> today. With the kernel 4.2.3 it works but with the kernel 4.3.0
> final it doesn't work.
>
> After that I tested some git kernels and release can
On Thu, Dec 17, 2015 at 01:43:12PM +1100, Alistair Popple wrote:
> Move __raw_rw_writeq() from platforms/powernv/pci-ioda.c to
^
Typo?
(not a big deal)
Gabriel
> include/asm/io.h so that it can be used by other code.
>
> Signed-off-by: Alistair Popple
> ---
> arch/powerpc/inc
On Fri, Mar 06, 2020 at 11:26:36AM +1100, Gustavo Romero wrote:
> Fix typos found in comments about the parameter passed
> through r5 to kvmppc_{save,restore}_tm_hv functions.
Actually "iff" is a common shorthand in some fields and not necessarily
a spelling error:
https://en.wikipedia.org/wiki/I
On Thu, Oct 04, 2018 at 10:41:13AM +0300, Raz wrote:
> Frankly, the more I read the more perplexed I get. For example,
> according to BOOK III-S, chapter 3,
> the MSR bits are differ from the ones described in
> arch/powerpc/include/asm/reg.h.
> Bit zero, is LE, but in the book it is 64-bit mode.
On Sat, Dec 22, 2018 at 05:04:51PM -0600, Segher Boessenkool wrote:
> On Sat, Dec 22, 2018 at 08:37:28PM +0100, christophe leroy wrote:
> > Le 22/12/2018 à 18:16, Segher Boessenkool a écrit :
> > >On Sat, Dec 22, 2018 at 02:08:02PM +0100, christophe leroy wrote:
> > >>
> > >>Usually, Guarded implie
On Fri, Jan 18, 2019 at 05:18:19PM +0100, Arnd Bergmann wrote:
> The IPC system call handling is highly inconsistent across architectures,
> some use sys_ipc, some use separate calls, and some use both. We also
> have some architectures that require passing IPC_64 in the flags, and
> others that s
On Thu, Jan 24, 2019 at 04:58:41PM +0100, Christophe Leroy wrote:
>
>
> Le 24/01/2019 à 16:01, Christophe Leroy a écrit :
> >
> >
> > Le 24/01/2019 à 10:43, Christophe Leroy a écrit :
> > >
> > >
> > > On 01/24/2019 01:06 AM, Michael Ellerman wrote:
> > > > Christophe Leroy writes:
> > > > >
On Fri, Jun 08, 2018 at 10:20:41AM +, Christophe Leroy wrote:
> The generic implementation of strlen() reads strings byte per byte.
>
> This patch implements strlen() in assembly based on a read of entire
> words, in the same spirit as what some other arches and glibc do.
>
> On a 8xx the tim
On Wed, Jun 27, 2018 at 05:39:15PM +1200, Michael Schmitz wrote:
> Ben,
>
> Am 27.06.2018 um 15:27 schrieb Benjamin Herrenschmidt:
> > On Wed, 2018-06-27 at 13:08 +1000, Michael Ellerman wrote:
> > > > I will rewrite patch 10/12 after Arnd's fixes and this series have all
> > > > made their way th
On Thu, Jun 28, 2018 at 11:56:34PM -0300, Thiago Jung Bauermann wrote:
>
> Hello,
>
> Ram Pai writes:
>
> > Key 2 is preallocated and reserved for execute-only key. In rare
> > cases if key-2 is unavailable, mprotect(PROT_EXEC) will behave
> > incorrectly. NOTE: mprotect(PROT_EXEC) uses execute
On Fri, Jun 29, 2018 at 09:58:37PM -0300, Thiago Jung Bauermann wrote:
>
> Gabriel Paubert writes:
>
> > On Thu, Jun 28, 2018 at 11:56:34PM -0300, Thiago Jung Bauermann wrote:
> >>
> >> Hello,
> >>
> >> Ram Pai writes:
> >>
> &
On Thu, Jan 16, 2020 at 07:11:36AM +0100, Christophe Leroy wrote:
> Hi Segher,
>
> I'm trying to see if we could enhance TCP checksum calculations by splitting
> inline assembly blocks to give GCC the opportunity to mix it with other
> stuff, but I'm getting difficulties with the carry.
>
> As fa
On Thu, Jan 16, 2020 at 07:57:29AM -0600, Segher Boessenkool wrote:
> On Thu, Jan 16, 2020 at 09:06:08AM +0100, Gabriel Paubert wrote:
> > On Thu, Jan 16, 2020 at 07:11:36AM +0100, Christophe Leroy wrote:
> > > Hi Segher,
> > >
> > > I'm trying to see if w
On Wed, Oct 05, 2011 at 12:30:49PM -, Thomas Gleixner wrote:
> The following series marks the obvious interrupts IRQF_NO_THREAD to
> prevent forced interrupt threading - no guarantee of completeness :)
>
> The last patch enables the forced threading mechanism in the core
> code, which in turn
On Wed, Oct 05, 2011 at 05:31:48PM +0200, Thomas Gleixner wrote:
> On Wed, 5 Oct 2011, Gabriel Paubert wrote:
>
> > On Wed, Oct 05, 2011 at 12:30:49PM -, Thomas Gleixner wrote:
> > > The following series marks the obvious interrupts IRQF_NO_THREAD to
> > > prev
On Mon, Oct 17, 2011 at 11:40:54PM +0200, nello martuscielli wrote:
> i'm trying to enable marvel gigabit ethernet support but it doesn't work.
> Here my dmesg instead my config is attached.
[snipped]
> via_rhine: v1.10-LK1.5.0 2010-10-09 Written by Donald Becker
> mv643xx_eth: MV-643xx 10/100/1000
On Thu, Jul 12, 2012 at 04:59:12PM -0700, Sukadev Bhattiprolu wrote:
> From: Sukadev Bhattiprolu
> Date: Tue, 3 Jul 2012 13:32:46 -0700
> Subject: [PATCH 1/2] power: Define PV_POWER7P
>
> This change is based on the patch that Carl Love posted to LKML
>
> https://lkml.org/lkml/2012/6/22/30
On Sat, Sep 22, 2012 at 02:12:42PM +0400, malc wrote:
> On Sat, 22 Sep 2012, Segher Boessenkool wrote:
>
> > > Is it possible to determine if _native_ isel is available from userspace
> > > somehow?
> >
> > Just try to execute one and catch the SIGILL?
> >
>
> Unfortunately my kernel emulates I
On Sun, Sep 23, 2012 at 03:46:06AM +0200, Segher Boessenkool wrote:
> Why does the kernel emulate this, btw? I can see emulation is useful
> for running older binaries, for instructions that have been removed
> from the architecture; but for newly added instructions, or optional
> instructions, it
On Mon, Sep 24, 2012 at 05:58:37PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2012-09-24 at 09:55 +0200, Gabriel Paubert wrote:
> > On Sun, Sep 23, 2012 at 03:46:06AM +0200, Segher Boessenkool wrote:
> > > Why does the kernel emulate this, btw? I can see emulation is useful
On Fri, Nov 09, 2012 at 05:18:58PM +1100, Michael Neuling wrote:
> This set of patches adds support for taking exceptions with the MMU on which
> is
> supported by POWER8.
>
> A new set of exception vectors is added at 0xc000___4xxx. When the HW
> takes us here, MSR IR/DR will be set alr
On Fri, Nov 09, 2012 at 05:26:42PM +1100, Michael Neuling wrote:
> A PVR of 0x0F04 means we are arch v2.07 complicate ie, POWER8.
Huh?
s/complicate/compliant/ ?
Also ie has to be written with dots (i.e.).
Gabriel
>
> Signed-off-by: Michael Neuling
>
> diff --git a/arch/powe
On Sat, Apr 28, 2012 at 06:53:49PM -0500, Larry Finger wrote:
> Following commit a79dd5a titled "tty/serial/pmac_zilog: Fix suspend & resume",
> my Powerbook G4 Titanium showed the following stack dump:
>
> [ 36.878225] irq 23: nobody cared (try booting with the "irqpoll" option)
> [ 36.878251
On Fri, May 25, 2012 at 02:29:06PM +0100, David Laight wrote:
> We have a system with linux 2.6.32 and the somewhat archaic
> uClibc 0.9.27 (but I'm not sure the current version is
> any better, and I think there are binary compatibility
> if we update).
>
> I've just discovered that pread() is 'i
On Thu, May 31, 2012 at 07:04:42AM +, Wrobel Heinz-R39252 wrote:
> Michael,
>
> > On Wed, 2012-05-30 at 16:33 +0200, Steffen Rumler wrote:
> > > I've found the following root cause:
> > >
> > > (6) Unfortunately, the trampoline code (do_plt_call()) is using
> > register r11 to setup the j
On Fri, Jun 01, 2012 at 11:33:37AM +, Wrobel Heinz-R39252 wrote:
> > > I believe that the basic premise is that you should provide a directly
> > > reachable copy of the save/rstore functions, even if this means that
> > you need several copies of the functions.
> >
> > I just fixed a very sim
On Tue, Jun 05, 2012 at 08:00:42AM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2012-06-04 at 13:03 +0200, Gabriel Paubert wrote:
> > There is no conflict to the ABI. These functions are supposed to be
> > directly reachable from whatever code
> > section may need them.
On Tue, Jun 05, 2012 at 08:00:42AM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2012-06-04 at 13:03 +0200, Gabriel Paubert wrote:
> > There is no conflict to the ABI. These functions are supposed to be
> > directly reachable from whatever code
> > section may need them.
On Thu, Jun 21, 2012 at 03:36:01PM +1000, Michael Ellerman wrote:
> On Wed, 2012-06-20 at 17:50 +1000, Stephen Rothwell wrote:
> > Hi all,
> >
> > After merging the final tree, today's linux-next build (powerpc
> > allyesconfig) failed like this:
> >
> > powerpc64-linux-ld: arch/powerpc/net/built
On Fri, Nov 19, 2010 at 08:42:46AM -0700, Gary Thomas wrote:
> In this case, note that PCI device :00:0c.0 is at 0xc000.
> This causes problems because it's a truly stupid device that does
> not work properly at PCI [relative] address 0x. It simply
> does not respond at that addres
On Thu, Sep 10, 2009 at 02:27:11PM +0530, Poonam Aggrwal wrote:
> This patch creates the dts files for each core and splits the devices between
> the two cores for P2020RDB.
>
> core0 has memory, L2, i2c, spi, dma1, usb, eth0, eth1, crypto, global-util,
> pci0
> core1 has L2, dma2, eth0, pci1, ms
On Thu, Sep 10, 2009 at 08:48:38PM +0530, Aggrwal Poonam-B10812 wrote:
>
>
> > -Original Message-
> > From: Gabriel Paubert [mailto:paub...@iram.es]
> > Sent: Thursday, September 10, 2009 3:03 PM
> > To: Aggrwal Poonam-B10812
> > Cc: linuxppc-...@oz
On Fri, Sep 11, 2009 at 05:17:50PM +0530, Aggrwal Poonam-B10812 wrote:
>
>
> > -Original Message-
> > From: Gabriel Paubert [mailto:paub...@iram.es]
> > Sent: Thursday, September 10, 2009 9:33 PM
> > To: Aggrwal Poonam-B10812
> > Cc: linuxppc-...@oz
On Mon, Sep 21, 2009 at 05:13:05PM +0200, diba...@libero.it wrote:
> Hi,
>
> I have an MPC880 @133MHz. If I look into the load (with uptime) I get
> values around 3.0 but my CPU is always under 5 percent (top). How could I
> explain this? I'm using linux 2.6.19 with xenomai but no xenomai applic
On Thu, Oct 08, 2009 at 10:45:12AM +0200, Jérôme Pouiller wrote:
> I did some grep on codebase. I have not found any other instances of
> nested functions, but my regexps are not enough to be 100% sure.
>From Documentation/CodingStyle, written by the Head Penguin himself:
"Heretic people all ove
On Fri, Oct 16, 2009 at 09:12:34AM +0800, wilbur.chan wrote:
> ppc 8270, kernel 2.6.21.7
>
> I took the following steps:
>
>
> In a system call function , say , sys_reboot, interrupt was disabled
> by local_irq_disable.
>
> Then , value at the address of 0xc50 was set to a value , say ,
>
On Fri, Oct 30, 2009 at 10:46:46AM -0600, Jonathan Haws wrote:
> > Michael Buesch wrote:
> > > Yes, I think the barrier is wrong.
> > > Please try with
> > >
> > > #define mb() __asm__ __volatile__("eieio\n sync\n" : : :
> > "memory")
> >
> >
> > For uncached memory, eieio should be enough.
On Wed, Nov 25, 2009 at 04:07:46PM +0800, Li Yang wrote:
> On Sun, Nov 22, 2009 at 4:01 AM, Segher Boessenkool
> wrote:
> >>> You need to be a bit more careful tho. You must not allow RAM managed by
> >>> the kernel to be mapped non-cachable.
> >>
> >> Even if the user explicitly sets the O_SYNC f
On Thu, Nov 26, 2009 at 03:36:56PM +1100, Benjamin Herrenschmidt wrote:
> On Tue, 2009-11-24 at 22:00 +0100, Segher Boessenkool wrote:
> >
> > Sure, the memory controllers don't do coherency. I'm slightly worried
> > about two things:
> > 1) Will the generic code use M=0 as well? Is it a problem
On Wed, Feb 04, 2009 at 02:50:07PM +1100, Benjamin Herrenschmidt wrote:
>
> > + hose->first_busno = bus_range ? bus_range[0] : 0;
> > + hose->last_busno = bus_range ? bus_range[1] : 0xff;
> > +
> > + setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc, 0);
>
> Minor in the context of amigaone but sti
After the last changes, the mv643xx_eth driver now detects
a spurious interface on port 0. Since only port 1 is actually
connected to a PHY, remove its description.
Signed-off-by: Gabriel Paubert
---
Tested on the last batch of Pegasos produced. Caveat: do not enable
the Marvell PHY driver in
On Sat, Mar 14, 2009 at 02:49:02PM +0100, Segher Boessenkool wrote:
>> Another option might be simply to say that if an app has used FP, VMX
>> or
>> VSX -once-, then it's likely to do it again and just keep re-enabling
>> it :-)
>>
>> I'm serious here, do we know that many cases where these thing
On Wed, Apr 22, 2009 at 10:04:29AM +0200, Nicolas Lavocat wrote:
> Hi everybody!
>
> I' am trying to configure a PCI bridge on a private board, with a
> powerpc . In a first time, I tried to get informations about PCI
> devices, in order to be sure that my read and write methods work (
> u
On Thu, Jan 28, 2010 at 05:20:55PM -0600, Joel Schopp wrote:
> On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
> there is performance benefit to idling the higher numbered threads in
> the core.
>
Really 2, 3, or 4? When you have 4 idle threads out of 4, performance
beco
On Sun, Jan 31, 2010 at 10:14:03PM +1100, Anton Blanchard wrote:
>
> With dynamic irq descriptors the overhead of a large NR_IRQS is much lower
> than it used to be. With more MSI-X capable adapters and drivers exploiting
> multiple vectors we may as well allow the user to increase it beyond the
On Thu, Feb 04, 2010 at 01:39:35PM +, Paride Legovini wrote:
> Hello,
> I'm just started working on some mvme5100 boards, and so I discovered
> that support for these cards has been dropped with linux-2.6.27 due to
> lack of interest. Here is the relevent post on linuxppc-embedded:
>
> http://
On Wed, Mar 10, 2010 at 04:14:41PM +0100, acrux wrote:
> hi,
> mv643xx_eth driver seems to be broken (and very often there is a kernel panic
> too).
> Last working kernel is 2.6.31.2
>
> here a dmesg from 2.6.32.9:
My Pegasos running a pristine 2.6.32 seems to disagree with you.
[...]
Linux ver
On Thu, Apr 15, 2010 at 03:53:53PM +0200, Roman Fietze wrote:
> Hello Bill,
>
> On Thursday 15 April 2010 15:01:59 Bill Gatliff wrote:
>
> > Are you talking about this code here?
> >
> > void
> > shadowUpdatePacked (ScreenPtr pScreen,
> > shadowBufPtr pBuf)
> >
On Sun, Oct 10, 2010 at 06:35:47PM +1100, Benjamin Herrenschmidt wrote:
> On Sat, 2010-10-09 at 20:37 -0500, pac...@kosh.dhis.org wrote:
> > Pegasos has no keyboard again. I blame commit
> > 540c6c392f01887dcc96bef0a41e63e6c1334f01, which tries to find i8042 IRQs in
> > the device-tree but doesn't
On Tue, Apr 05, 2011 at 08:28:50AM +1000, Benjamin Herrenschmidt wrote:
>
> > Ok, I got fed up about it. The patch referred above is obviously wrong since
> > it leaves interrupts at 0 when a device_type or name of 8042 is found,
> > so what about the following?
> >
> > I can ship it with a sign
Hi,
I've had the following funny crashes on PPC machines, with
cataleptic X server as a consequence:
kernel: [drm] Setting GART location based on new memory map
kernel: Oops: Exception in kernel mode, sig: 4 [#1]
kernel: CHRP
kernel: last sysfs file: /sys/devices/pci0001:01/0001:01:08.0/r
On Wed, Apr 06, 2011 at 06:46:55PM +1000, Dave Airlie wrote:
> 2011/4/6 Uwe Kleine-König :
> > Hi Gabriel,
> >
> > On Tue, Apr 05, 2011 at 01:52:59AM +0200, Gabriel Paubert wrote:
> >> I've had the following funny crashes on PPC machines, with
> &
Hi Dave,
> This is the old DRM driver for radeon, which relies on userspace to
> start X then calls the kernel
Actually, even the old DRM driver occasionally hangs on this machine,
I suspect a missing barrier, but I might be completely off base.
The system is up, only X uses 100% of one
Hi Dave,
sorry, in my previous message I forgot the strace
output, which is an inifinite loop of the following:
--- SIGALRM (Alarm clock) @ 0 (0) ---
sigreturn() = ? (mask now [])
ioctl(7, 0xc0286429, 0xffdf9bb8)= -1 EBUSY (Device or resource busy)
---
On Thu, Apr 07, 2011 at 04:04:35PM +0200, Michel Dänzer wrote:
> On Mit, 2011-04-06 at 22:43 +0200, Gabriel Paubert wrote:
> >
> > The probem is that, at least on one of my machines, the new driver
> > does not work: the system hangs (apparently solid, but it's befor
Hi Micel,
On Mon, Apr 11, 2011 at 05:32:43PM +0200, Michel Dänzer wrote:
> [ Adding the dri-devel list ]
>
> Have you ruled out any MSI related problems? I think the IRQ not working
> could explain the symptoms...
Booting with MSI disabled does not change anything. Actually on this
machi
On Tue, Apr 12, 2011 at 01:46:10PM +0200, Michel Dänzer wrote:
> >
> > With no_wb=1 the driver goes a bit further but the X server ends
> > up in an infinite ioctl loop and the logs are:
>
> Which ioctl does it loop on? Please provide the Xorg.0.log file as well.
>From memory, the code was 0x64
On Tue, Apr 12, 2011 at 07:29:22PM +0200, Michel Dänzer wrote:
> On Die, 2011-04-12 at 14:00 +0200, Gabriel Paubert wrote:
> > On Tue, Apr 12, 2011 at 01:46:10PM +0200, Michel Dänzer wrote:
> > > >
> > > > With no_wb=1 the driver goes a bit further but the X serv
On Tue, Apr 12, 2011 at 01:46:10PM +0200, Michel Dänzer wrote:
> BTW, if your kernel contains commit
> 69a07f0b117a40fcc1a479358d8e1f41793617f2, can you try if reverting that
> helps?
My kernel is pristine 2.6.38 and does not include this commit
(was introduced before 2.6.39-rc1 according to gitk)
On Wed, Apr 13, 2011 at 06:16:13PM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2011-04-13 at 09:59 +0200, Gabriel Paubert wrote:
> >
> > Well, X is dead, or rather in an infinite ioctl loop as described
> > above.
> > IIRC, the display enters a power-down mode and
On Wed, Apr 13, 2011 at 10:59:14AM +0200, Andreas Schwab wrote:
> Uwe Kleine-König writes:
>
> > $ git name-rev --refs=refs/tags/v2.6\*
> > 69a07f0b117a40fcc1a479358d8e1f41793617f2
> > 69a07f0b117a40fcc1a479358d8e1f41793617f2 tags/v2.6.39-rc2~3^2~43^2~4
> >
> > so it was introduced just before -
On Wed, Apr 13, 2011 at 02:12:16PM +0200, Michel Dänzer wrote:
> On Mit, 2011-04-13 at 09:59 +0200, Gabriel Paubert wrote:
> > On Tue, Apr 12, 2011 at 07:29:22PM +0200, Michel Dänzer wrote:
> > > On Die, 2011-04-12 at 14:00 +0200, Gabriel Paubert wrote:
> > > > On T
12 in all
failure cases.
Specifically, the case where the device-tree contains nothing matching
pnpPNP,303 or pnpPNP,f03 doesn't seem to be handled well. It sort of falls
through to the old code, but leaves the IRQs set to 0.
Signed-off-by: Gabriel Paubert
---
This fix has only been tested
On Fri, Jun 17, 2011 at 02:54:00PM +1000, Anton Blanchard wrote:
> Implement a POWER7 optimised memcpy using VMX. For large aligned
> copies this new loop is over 10% faster and for large unaligned
> copies it is over 200% faster.
>
> On POWER7 unaligned stores rarely slow down - they only flush w
On Sun, Jun 26, 2011 at 11:14:13PM +0100, Ben Hutchings wrote:
> On Thu, 2011-06-23 at 20:36 +0800, Andrew Buckeridge wrote:
> > Package: linux-image-3.0.0-rc3-powerpc
> > Version: 3.0.0~rc3-1~experimental.1
> >
> > On Wed, 22 Jun 2011 04:01:38 +0100
> > Ben Hutchings wrote:
> >
> > > > linux-im
On Thu, Jan 08, 2009 at 11:53:10PM -0600, Matt Sealey wrote:
> Lennert Buytenhek wrote:
>> On Thu, Jan 08, 2009 at 11:38:33PM -0600, Matt Sealey wrote:
>>
>> On this topic, I sent a patch to linuxppc-dev@ some time ago that moves
>> the mv643xx_eth SRAM window programming code from the Pegasos plat
On Thu, May 14, 2009 at 10:59:02AM +0200, Simon Richter wrote:
> Hi,
>
> I just tried upgrading my PegasosII to 2.6.29, and found that the Marvell
> driver shows two Ethernet ports now, one with a MAC address ending in
> ...:de:ad:01 (which is the port that is not wired to the outside), and the
>
references to MV64360 config option which
no more exists.
Signed-off-by: Gabriel Paubert
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a0d1146..1dfeb62 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -360,7 +360,7 @@ config PPCBUG_NVRAM
config IRQ_ALL_CPUS
->dev->dev.parent in dma allocation/freeing/mapping/unmapping
functions.
Signed-off-by: Gabriel Paubert
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index a400d71..6bb5af3 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -569,7 +569,7 @@ stat
On Mon, May 18, 2009 at 01:24:49PM +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2009-05-15 at 20:18 +0200, Gabriel Paubert wrote:
> > Since PPC_MUTIPLATFORM was removed, it was impossible to select the
> > driver for mv643xx_eth on the Pegasos. Fix by allowing to select
> &g
Since PPC_MUTIPLATFORM was removed, it was impossible to select the
driver for mv643xx_eth on the Pegasos. Fix by allowing to select
the driver on CHRP platforms; Pegasos is a CHRP platform and the driver
will not work without arch/powerpc/platforms/chrp/pegasos_eth.
Signed-off-by: Gabriel
On Mon, May 18, 2009 at 10:48:58AM -0700, Medve Emilian-EMMEDVE1 wrote:
> > -Original Message-
> > From: linuxppc-dev-bounces+emilian.medve=freescale@ozlabs.org
> [mailto:linuxppc-dev-
> > bounces+emilian.medve=freescale@ozlabs.org] On Behalf Of Gabriel
>
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