patchset on 4.5-rc1
Frederic Barrat (18):
cxl: Move common code away from bare-metal-specific files
cxl: Move bare-metal specific code to specialized files
cxl: Define process problem state area at attach time only
cxl: Introduce implementation-specific API
cxl: Rename some bare-metal speci
me p2 registers not needed from a guest and the PCI interface.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/cxl.h| 24 +
drivers/misc/cxl/irq.c
state area.
Remove calls to cxl_assign_psn_space during init. The function is
already called on the attach paths.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/api.c | 11 ++-
1 file changed, 2 insertions(+), 9 dele
From: Christophe Lombard
Move around some functions which will be accessed from the bare-metal
and guest environments.
Code in native.c and pci.c is meant to be bare-metal specific.
Other files contain code which may be shared with guests.
Co-authored-by: Frederic Barrat
Signed-off-by
Rename a few functions, changing the 'cxl_' prefix to either
'cxl_pci_' or 'cxl_native_', to make clear that the implementation is
bare-metal specific.
Those functions will have an equivalent implementation for a guest in
a later patch.
Co-authored-by: Christophe Lo
-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/api.c | 8 +--
drivers/misc/cxl/context.c | 4 +-
drivers/misc/cxl/cxl.h | 53 +++---
drivers/misc/cxl/fault.c | 6 +-
drivers/misc/cxl/file.c| 15 ++---
drivers
The context parameter when calling cxl_irq() should be strongly typed.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/cxl.h | 2 +-
drivers/misc/cxl/irq.c | 3 +--
2 files changed, 2 insertions
A few functions are mostly common between bare-metal and guest and
just need minor tuning. To avoid crowding the backend API, introduce a
few 'if' based on the CPU being in HV mode.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
is different. Rework the code so that the
range 0 is treated like the other ranges.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/irq.c | 78 +-
1 file changed, 64
From: Christophe Lombard
The hcalls introduced for CAPI use a possible new value:
H_STATE (invalid state).
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
arch/powerpc/include/asm/hvcall.h | 1 +
1 file changed, 1
r image to
the coherent platform facility, and for
validating the entire image after the download.
H_CONTROL_CA_FACILITY Allow the partition to manipulate or query
certain coherent platform facility behaviors.
Co-authored-by: Frederic Barrat
Sig
From: Christophe Lombard
Introduce sub-structures containing the bare-metal specific fields in
the structures describing the adapter (struct cxl) and AFU (struct
cxl_afu).
Update all their references.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe
ID assigned by the cxl driver from the
process element ID visible to the user applications. In bare-metal,
the 2 IDs match.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/Makefile | 1 +
drivers/misc/cxl/api.c | 2
From: Christophe Lombard
Filter out a few adapter parameters which don't make sense in a guest.
Document the changes.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
Documentation/ABI/testing/sysfs-class-cxl | 8 +++
drivers/mis
: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/api.c| 63 ++-
drivers/misc/cxl/cxl.h| 6 +-
drivers/misc/cxl/guest.c | 26
drivers/misc/cxl/native.c | 50 +++
drivers/misc/cxl/pci.c
Add new entry point to scan the device tree at boot in a guest,
looking for CAPI devices.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/base.c | 25 +
1 file changed, 25
flashing is successful, an rtas call is made to update the device
tree with the new properties values for the adapter and the AFU(s)
Add a new char device for the adapter, so that the flash tool can
access the card, even if there is no valid AFU on it.
Co-authored-by: Frederic Barrat
Signed-off-by
found to be disabled, detach all existing contexts from
it before issuing a AFU reset to re-enable it.
Before detaching contexts, notify any kernel driver through the EEH
callbacks of the AFU pci device.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe
From: Christophe Lombard
To ease debugging, add a few tracepoints around the CAPI hcalls.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/hcalls.c | 9 +++
drivers/misc/cxl/trace.h | 193
Le 21/02/2016 23:30, Manoj Kumar a écrit :
Subject: [PATCH v4 08/18] cxl: IRQ allocation for guests
Date: Tue, 16 Feb 2016 22:39:01 +0100
From: Frederic Barrat
To: imun...@au1.ibm.com, michael.neul...@au1.ibm.com,
m...@ellerman.id.au, linuxppc-dev@lists.ozlabs.org
The PSL interrupt is not
Manoj,
Point taken. Those constants are all defined in the architecture
document (CAIA). We should probably use more macros there.
However, since those were not introduced by this patch, I'll put it in
my todo list for the future, but don't intend to address it in this
patchset.
Fred
Le 2
2016 22:39:05 +0100
From: Frederic Barrat
To: imun...@au1.ibm.com, michael.neul...@au1.ibm.com,
m...@ellerman.id.au, linuxppc-dev@lists.ozlabs.org
From: Christophe Lombard
The new of.c file contains code to parse the device tree to find out
about CAPI adapters and AFUs.
guest.c implement
Le 21/02/2016 22:44, Manoj Kumar a écrit :
Code specific to bare-metal is meant to be in native.c or pci.c
only. It's basically anything which touches the capi p1 registers,
I thought we were going to avoid using the CAPI term externally.
Please update if submitting a v4 of this patch series.
+
+/**
+ * cxl_h_validate_adapter_image - Validate the base image in the
coherent
+ *platoform facility.
platoform->platform
Irreverent to the Socratic amongst us.
Hope we didn't hurt your feelings :-D
Fred
___
This series adds support for a cxl card in a powerVM guest.
It requires firmware FW840 and an activation code for cxl (CAPI).
Note that pHyp only claims support for cxlflash, and not generic
support for FPGA CAPI accelerators. cxlflash uses the (slightly
modified) Nallatech card, so the memcopy AF
me p2 registers not needed from a guest and the PCI interface.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/cxl.h| 24 +
drivers/misc/cxl/irq.c
state area.
Remove calls to cxl_assign_psn_space during init. The function is
already called on the attach paths.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/api.c | 11 ++-
1 file changed, 2 insertions(+), 9 dele
Rename a few functions, changing the 'cxl_' prefix to either
'cxl_pci_' or 'cxl_native_', to make clear that the implementation is
bare-metal specific.
Those functions will have an equivalent implementation for a guest in
a later patch.
Co-authored-by: Christophe Lo
-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/api.c | 8 +--
drivers/misc/cxl/context.c | 4 +-
drivers/misc/cxl/cxl.h | 53 +++---
drivers/misc/cxl/fault.c | 6 +-
drivers/misc/cxl/file.c| 15 ++---
drivers
/deleting the context. Only the handler is
different. Rework the code so that the range 0 is treated like the
other ranges.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/irq.c | 78
A few functions are mostly common between bare-metal and guest and
just need minor tuning. To avoid crowding the backend API, introduce a
few 'if' based on the CPU being in HV mode.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
ID assigned by the cxl driver from the
process element ID visible to the user applications. In bare-metal,
the 2 IDs match.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/Makefile | 1 +
drivers/misc/cxl/api.c | 2
The context parameter when calling cxl_irq() should be strongly typed.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/cxl.h | 2 +-
drivers/misc/cxl/irq.c | 3 +--
2 files changed, 2 insertions
From: Christophe Lombard
Move around some functions which will be accessed from the bare-metal
and guest environments.
Code in native.c and pci.c is meant to be bare-metal specific.
Other files contain code which may be shared with guests.
Co-authored-by: Frederic Barrat
Signed-off-by
From: Christophe Lombard
The hcalls introduced for cxl use a possible new value:
H_STATE (invalid state).
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
arch/powerpc/include/asm/hvcall.h | 1 +
1 file changed, 1
Add new entry point to scan the device tree at boot in a guest,
looking for cxl devices.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/base.c | 25 +
1 file changed, 25
From: Christophe Lombard
Filter out a few adapter parameters which don't make sense in a guest.
Document the changes.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
Documentation/ABI/testing/sysfs-class-cxl | 8 +++
drivers/mis
r image to
the coherent platform facility, and for
validating the entire image after the download.
H_CONTROL_CA_FACILITY Allow the partition to manipulate or query
certain coherent platform facility behaviors.
Co-authored-by: Frederic Barrat
Sig
found to be disabled, detach all existing contexts from
it before issuing a AFU reset to re-enable it.
Before detaching contexts, notify any kernel driver through the EEH
callbacks of the AFU pci device.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe
From: Christophe Lombard
To ease debugging, add a few tracepoints around the cxl hcalls.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/hcalls.c | 9 +++
drivers/misc/cxl/trace.h | 193
From: Christophe Lombard
Introduce sub-structures containing the bare-metal specific fields in
the structures describing the adapter (struct cxl) and AFU (struct
cxl_afu).
Update all their references.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe
: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/api.c| 63 ++-
drivers/misc/cxl/cxl.h| 6 +-
drivers/misc/cxl/guest.c | 26
drivers/misc/cxl/native.c | 50 +++
drivers/misc/cxl/pci.c
flashing is successful, an rtas call is made to update the device
tree with the new properties values for the adapter and the AFU(s)
Add a new char device for the adapter, so that the flash tool can
access the card, even if there is no valid AFU on it.
Co-authored-by: Frederic Barrat
Signed-off-by
to use the proper timebase-to-time
conversion.
Signed-off-by: Frederic Barrat
Cc: # 4.3+
---
drivers/misc/cxl/pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 4c1903f..0c6c17a1 100644
--- a/drivers/misc/cxl/pci.c
+++ b
Le 24/02/2016 21:03, Manoj Kumar a écrit :
From: Christophe Lombard
+#define CXL_DEV_MINORS 13 /* 1 control + 4 AFUs * 3
(dedicated/master/shared) */
Where does this limit of 4 AFUs come from?
Is this related to CXL_MAX_SLICES?
Should this be a computed value, in case the number of AFUs/
Le 24/02/2016 21:15, Manoj Kumar a écrit :
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
+module_init(cxl_base_init);
Is this a remnant from when there were two modules?
Do you really need two module_init() calls (can't one be called from the
other)?
What is the tear-down portion of
vsec, when cxl probe is unable to
find necessary vsec entries in device pci config space. The error
message logged are of the form :
cxl-pci 0004:00:00.0: ABORTING: CXL VSEC not found!
cxl-pci 0004:00:00.0: cxl_init_adapter failed: -19
Cc: Ian Munsie
Cc: Frederic Barrat
Signed-off-by: Vaibhav
ication to cxlflash (and remove the now obsolete cxl_get_phys_dev()
kernel API, as discussed in this thread with Mikey). So no more
dependencies.
It will be part of the powerVM patchset v6
Fred
Le 19/01/2016 18:14, Frederic Barrat a écrit :
Introduce a new API to read the VPD of the adapte
me p2 registers not needed from a guest and the PCI interface.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
drivers/misc/cxl/cxl.h| 24 +
drivers/misc/cxl/irq.c
This series adds support for a cxl card in a powerVM guest.
It requires firmware FW840 and an activation code for cxl (CAPI).
Note that pHyp only claims support for cxlflash, and not generic
support for FPGA CAPI accelerators. cxlflash uses the (slightly
modified) Nallatech card, so the memcopy AF
From: Christophe Lombard
Move around some functions which will be accessed from the bare-metal
and guest environments.
Code in native.c and pci.c is meant to be bare-metal specific.
Other files contain code which may be shared with guests.
Co-authored-by: Frederic Barrat
Signed-off-by
state area.
Remove calls to cxl_assign_psn_space during init. The function is
already called on the attach paths.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
drivers/misc/cxl/api.c
-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
drivers/misc/cxl/api.c | 8 +--
drivers/misc/cxl/context.c | 4 +-
drivers/misc/cxl/cxl.h | 53 +++---
drivers/misc/cxl/fault.c | 6 +-
drivers/misc/cxl/file.c
Rename a few functions, changing the 'cxl_' prefix to either
'cxl_pci_' or 'cxl_native_', to make clear that the implementation is
bare-metal specific.
Those functions will have an equivalent implementation for a guest in
a later patch.
Co-authored-by: Christophe Lo
/deleting the context. Only the handler is
different. Rework the code so that the range 0 is treated like the
other ranges.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
drivers/misc/cxl/irq.c | 78
A few functions are mostly common between bare-metal and guest and
just need minor tuning. To avoid crowding the backend API, introduce a
few 'if' based on the CPU being in HV mode.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
R
The context parameter when calling cxl_irq() should be strongly typed.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
drivers/misc/cxl/cxl.h | 2 +-
drivers/misc/cxl/irq.c | 3 +--
2 files
From: Christophe Lombard
The hcalls introduced for cxl use a possible new value:
H_STATE (invalid state).
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
arch/powerpc/include/asm/hvcall.h
r image to
the coherent platform facility, and for
validating the entire image after the download.
H_CONTROL_CA_FACILITY Allow the partition to manipulate or query
certain coherent platform facility behaviors.
Co-authored-by: Frederic Barrat
Sig
ID assigned by the cxl driver from the
process element ID visible to the user applications. In bare-metal,
the 2 IDs match.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
drivers/misc/cxl
flashing is successful, an rtas call is made to update the device
tree with the new properties values for the adapter and the AFU(s)
Add a new char device for the adapter, so that the flash tool can
access the card, even if there is no valid AFU on it.
Co-authored-by: Frederic Barrat
Signed-off-by
From: Christophe Lombard
Filter out a few adapter parameters which don't make sense in a guest.
Document the changes.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
---
Documentation/ABI/testing/sysfs-class-cxl
Add new entry point to scan the device tree at boot in a guest,
looking for cxl devices.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
drivers/misc/cxl/base.c | 25
: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
drivers/misc/cxl/api.c| 63 ++-
drivers/misc/cxl/cxl.h| 6 +-
drivers/misc/cxl/guest.c | 26
drivers/misc/cxl/native.c
found to be disabled, detach all existing contexts from
it before issuing a AFU reset to re-enable it.
Before detaching contexts, notify any kernel driver through the EEH
callbacks of the AFU pci device.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe
From: Christophe Lombard
To ease debugging, add a few tracepoints around the cxl hcalls.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
Acked-by: Ian Munsie
---
drivers/misc/cxl/hcalls.c | 9 +++
drivers/misc/cxl
To read the adapter VPD, drivers can't rely on pci config APIs, as it
wouldn't work on powerVM. cxl introduced a new kernel API especially
for this, so start using it.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/scs
From: Christophe Lombard
Introduce sub-structures containing the bare-metal specific fields in
the structures describing the adapter (struct cxl) and AFU (struct
cxl_afu).
Update all their references.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe
provides the cxl_pci_read_adapter_vpd() API for
that purpose.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/api.c | 1 -
include/misc/cxl.h | 3 ---
2 files changed, 4 deletions(-)
diff --git a/drivers/misc/cxl/api.c b
Hi Michael,
Le 09/03/2016 06:55, Michael Ellerman a écrit :
This breaks the SMP=n build:
Arg! I'm adding it to my checklist.
Thanks for the fix.
Fred
I've fixed it up with:
diff --git a/drivers/misc/cxl/hcalls.c b/drivers/misc/cxl/hcalls.c
index f01d4c012620..d6d11f4056d7 100644
--- a/d
Hi Ian,
Le 08/03/2016 02:48, Ian Munsie a écrit :
diff --git a/drivers/misc/cxl/file.c b/drivers/misc/cxl/file.c
...
+static inline bool ctx_event_pending(struct cxl_context *ctx)
+{
+ if (ctx->pending_irq || ctx->pending_fault || ctx->pending_afu_err)
+ return true;
+
+
Le 09/03/2016 12:09, Michael Ellerman a écrit :
This appears to make cxl_get_phys_dev() completely unused, doesn't it?
If so, please send me a follow-up patch to remove it entirely.
I would have sworn there was one internal call to it, but I was confused
by some older version.
Follow-up
Function cxl_get_phys_dev() was removed from the kernel API by a
previous patch, but it's actually dead code. Remove it.
Signed-off-by: Frederic Barrat
---
drivers/misc/cxl/api.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/misc/cxl/api.c b/drivers/misc/cxl/api.c
Le 09/03/2016 13:42, Michael Ellerman a écrit :
I've applied the following patch, let me know if there's anything wrong with
it. It would be great if we could do something cleaner.
I think this is fine.
I've built pseries_le_defconfig and powernv_defconfig, and did minimum
of testing with t
Hi Vaibhav,
Le 09/03/2016 15:37, Vaibhav Jain a écrit :
I would propose these two apis.
/*
* fetches an event from the driver event queue. NULL means that queue
* is empty. Can sleep if needed. The memory for cxl_event is allocated
* by module being called. Hence it can be potentially be la
e and there are no known use of it.
Introduce a psl_timebase module parameter to control whether PSL
timebase is required or not. Default is to allow initializaton even if
syncing failed.
Default behavior will be changed when current issues with some cxl
adapters are resolved.
Signed-off-by: Fre
e and there are no known use of it.
Introduce a psl_timebase module parameter to control whether PSL
timebase is required or not. Default is to allow initializaton even if
syncing failed.
Default behavior will be changed when current issues with some cxl
adapters are resolved.
Signed-off-by: Fre
Hi Mikey,
Le 15/03/2016 01:27, Michael Neuling a écrit :
I'm not happy with doing this unless we add something which advertises
that it's synced or not to userspace.
If we do that, I'm happy to just fail without the need of the parameter
but advertise it to userspace.
OK, so I'm guessing that
Ian, Miley,
OK, I'm convinced.
New version of the patch out shortly.
Fred
___
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Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
fail if it can't. Instead, it reports a
status via /sys.
Signed-off-by: Frederic Barrat
---
Patch will need a small update for next, due to the powerVM patchset. Will send
that as soon as this one is agreed upon.
Documentation/ABI/testing/sysfs-class-cxl | 8
drivers/misc
Le 15/03/2016 04:56, Michael Ellerman a écrit :
And it just sounds like a big hack around broken hardware, which we'll have to
carry for the foreseeable future.
I discussed with Mikey about what would be acceptable here. There's
basically no good solution. No matter how we workaround the issu
the PSL timebase when the card
is initialized, but ignores the error if it can't. Instead, it reports
a status via /sys.
Signed-off-by: Frederic Barrat
Acked-by: Michael Neuling
Acked-by: Ian Munsie
---
Applies on 4.5 tree. Version to be picked-up potentially by distros.
Needs a refresh for
the PSL timebase when the card
is initialized, but ignores the error if it can't. Instead, it reports
a status via /sys.
Signed-off-by: Frederic Barrat
---
Applies on current (4.6) tree.
Changelog:
version for 4.6 adds definition of psl_timebase_synced attribute for LPARs
v2: Update commit ms
Thanks Andrew!
Reviewed-by: fbar...@linux.vnet.ibm.com
Fred
Le 18/04/2016 07:03, Andrew Donnellan a écrit :
Make a couple more variables static. Found by sparse.
Signed-off-by: Andrew Donnellan
---
drivers/misc/cxl/flash.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
PSL designers recommend a larger value for the mmio hang pulse, 256 us
instead of 1 us. The CAIA architecture states that it needs to be
smaller than 1/2 of the RTOS timeout set in the PHB for outbound
non-posted transactions, which is still (easily) the case here.
Signed-off-by: Frederic Barrat
Received privately:
Tested-by: Frank Haverkamp
Le 19/04/2016 18:34, Frederic Barrat a écrit :
PSL designers recommend a larger value for the mmio hang pulse, 256 us
instead of 1 us. The CAIA architecture states that it needs to be
smaller than 1/2 of the RTOS timeout set in the PHB for
detach, thus the struct pid of the
task attaching is never freed. The fix is to simply remove the call to
get_pid().
Signed-off-by: Frederic Barrat
---
drivers/misc/cxl/api.c | 1 -
drivers/misc/cxl/file.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/misc/cxl/api.c b
Le 03/11/2015 00:48, Ian Munsie a écrit :
Excerpts from Michael Ellerman's message of 2015-11-02 11:53:45 +1100:
On Thu, 2015-10-29 at 13:39 +0100, Frederic Barrat wrote:
When the cxl driver creates a context, it stores the pid of the
calling task, incrementing the reference count o
it reduces the number of
processes that can run simultaneously by one.
The fix is to simply remove the call to get_pid().
There is a separate patch for the kernel API, since it goes to
different kernel versions.
Signed-off-by: Frederic Barrat
Cc: # 3.18+
---
drivers/misc/cxl/file.c | 2 +-
1
it reduces the number of
processes that can run simultaneously by one.
The fix is to simply remove the call to get_pid().
There is a separate patch for the user API, since it goes to
different kernel versions.
Signed-off-by: Frederic Barrat
Cc: # 4.3+
---
drivers/misc/cxl/api.c | 1 -
1 file
der associated
with the context owning task.
Reported-by: Matthew R. Ochs
Reported-by: Frank Haverkamp
Suggested-by: Ian Munsie
Signed-off-by: Vaibhav Jain
Looks good to me. Thanks!
Reviewed-by: Frederic Barrat
___
Linuxppc-dev mailing list
Linuxppc-
the context is
attached through the kernel API.
Signed-off-by: Frederic Barrat
Suggested-by: Michael Neuling
Cc: # 4.3+
---
cxl kernel API is supported starting with 4.3 (for cxlflash)
drivers/misc/cxl/native.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/cxl
using it.
Signed-off-by: Frederic Barrat
---
drivers/misc/cxl/api.c | 8
include/misc/cxl.h | 5 +
2 files changed, 13 insertions(+)
diff --git a/drivers/misc/cxl/api.c b/drivers/misc/cxl/api.c
index ea3eeb7..c73aa3a 100644
--- a/drivers/misc/cxl/api.c
+++ b/drivers/misc/cxl/
Le 20/01/2016 03:20, Michael Neuling a écrit :
The only thing I'm a bit concerned about is are we going to end up
duplicating a lot of the linux PCI API, but I guess we are only going
to do this for things the papr HCALL interface mimics.
There are actually very few operations we can do on th
Le 22/01/2016 01:38, Michael Neuling a écrit :
On Thu, 2016-01-21 at 19:48 +0100, Frederic Barrat wrote:
Le 20/01/2016 03:20, Michael Neuling a écrit :
The only thing I'm a bit concerned about is are we going to end up
duplicating a lot of the linux PCI API, but I guess we are only goi
Le 26/01/2016 04:11, Michael Ellerman a écrit :
This no longer applies, since we merged 7b8ad495d592 ("cxl: Fix DSI misses when
the context owning task exits").
Yes, on 4.5, it has been superseded by 7b8ad495d592.
It may still be worth considering for stable releases though.
Fred
me p2 registers not needed from a guest and the PCI interface.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/cxl.h| 24 +
drivers/misc/cxl/irq.c| 205 +--
drivers/misc/cxl/m
kernel API, flash of the adapter and failure handling
Changelog:
v1->v2: (v1 was privately reviewed)
- integrate comments from Michael Neuling and Ian Munsie
- add another patch to the series: adapter failure handling
- base patchset on 4.5-rc1
Frederic Barrat (16):
cxl: Move common code a
From: Christophe Lombard
Move around some functions which will be accessed from the bare-metal
and guest environments.
Code in native.c and pci.c is meant to be bare-metal specific. Other
files contain code which may be shared with guests.
Co-authored-by: Frederic Barrat
Signed-off-by
: Frederic Barrat
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/api.c | 10 ++--
drivers/misc/cxl/context.c | 4 +-
drivers/misc/cxl/cxl.h | 53 +++---
drivers/misc/cxl/fault.c | 6 +-
drivers/misc/cxl/file.c| 15 ++---
drivers/misc/cxl/irq.c | 19
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