For the arm64 kernel, when it processes hardware memory errors for
synchronize notifications(do_sea()), if the errors is consumed within the
kernel, the current processing is panic. However, it is not optimal.
Take copy_from/to_user for example, If ld* triggers a memory error, even in
kernel mode,
If hardware errors are encountered during page copying, returning the bytes
not copied is not meaningful, and the caller cannot do any processing on
the remaining data. Returning -EFAULT is more reasonable, which represents
a hardware error encountered during the copying.
Signed-off-by: Tong Tiang
The copy_mc_to_kernel() helper is memory copy implementation that handles
source exceptions. It can be used in memory copy scenarios that tolerate
hardware memory errors(e.g: pmem_read/dax_copy_to_iter).
Currnently, only x86 and ppc suuport this helper, after arm64 support
ARCH_HAS_COPY_MC , we in
x86/powerpc has it's implementation of copy_mc_to_user(), we add generic
fallback in include/linux/uaccess.h prepare for other architechures to
enable CONFIG_ARCH_HAS_COPY_MC.
Signed-off-by: Tong Tiangen
Acked-by: Michael Ellerman
---
arch/powerpc/include/asm/uaccess.h | 1 +
arch/x86/include/a
For SEA exception, kernel require take some action to recover from memory
error, such as isolate poison page adn kill failure thread, which are done
in memory_failure().
During our test, the failure thread cannot be killed due to this issue[1],
Here, I temporarily workaround this issue by sending
Currently, many scenarios that can tolerate memory errors when copying page
have been supported in the kernel[1~5], all of which are implemented by
copy_mc_[user]_highpage(). arm64 should also support this mechanism.
Due to mte, arm64 needs to have its own copy_mc_[user]_highpage()
architecture im
Problem
=
With the increase of memory capacity and density, the probability of memory
error also increases. The increasing size and density of server RAM in data
centers and clouds have shown increased uncorrectable memory errors.
Currently, more and more scenarios that can tolerate memory
Le 27/05/2024 à 14:10, Oscar Salvador a écrit :
> On Sun, May 26, 2024 at 11:22:28AM +0200, Christophe Leroy wrote:
>> In order to fit better with standard Linux page tables layout, add
>> support for 8M pages using contiguous PTE entries in a standard
>> page table. Page tables will then be popu
Le 28/05/2024 à 07:41, Oscar Salvador a écrit :
> On Mon, May 27, 2024 at 03:30:01PM +0200, Christophe Leroy wrote:
>> --- a/mm/gup.c
>> +++ b/mm/gup.c
>> @@ -547,7 +547,7 @@ static int gup_hugepte(struct vm_area_struct *vma, pte_t
>> *ptep, unsigned long sz
>> if (pte_end < end)
>>
Hi Amit,
Thanks for taking a look!
On Tue, May 28, 2024 at 12:25:58PM +0530, Amit Daniel Kachhap wrote:
>
>
> On 5/3/24 18:31, Joey Gouly wrote:
> > Implement the PKEYS interface, using the Permission Overlay Extension.
> >
> > Signed-off-by: Joey Gouly
> > Cc: Catalin Marinas
> > Cc: Will D
On Fri, May 03, 2024 at 02:01:18PM +0100, Joey Gouly wrote:
> Hi all,
>
> This series implements the Permission Overlay Extension introduced in 2022
> VMSA enhancements [1]. It is based on v6.9-rc5.
>
> One possible issue with this version, I took the last bit of HWCAP2.
>
> Changes since v3[2]:
Hi Esben,
es...@geanix.com wrote on Tue, 28 May 2024 14:28:52 +0200:
> While use of fsl_ifc driver with NAND flash is fine, as the fsl_ifc_nand
> driver selects FSL_IFC automatically, we need the CONFIG_FSL_IFC option to
> be selectable for platforms using fsl_ifc with NOR flash.
>
> Fixes: ea0c
On 28/05/2024 14:28, Esben Haabendal wrote:
> With CONFIG_FSL_IFC now being user-visible, and thus changed from a select
> to depends in CONFIG_MTD_NAND_FSL_IFC, the dependencies needs to be
> selected in config snippets.
>
> Signed-off-by: Esben Haabendal
> ---
> arch/powerpc/configs/85xx-hw.co
Le 28/05/2024 à 14:28, Esben Haabendal a écrit :
> [Vous ne recevez pas souvent de courriers de es...@geanix.com. Découvrez
> pourquoi ceci est important à https://aka.ms/LearnAboutSenderIdentification ]
>
> While use of fsl_ifc driver with NAND flash is fine, as the fsl_ifc_nand
> driver selec
On 28/05/2024 15:15, Christophe Leroy wrote:
>
>
> Le 28/05/2024 à 14:28, Esben Haabendal a écrit :
>> [Vous ne recevez pas souvent de courriers de es...@geanix.com. Découvrez
>> pourquoi ceci est important à https://aka.ms/LearnAboutSenderIdentification ]
>>
>> While use of fsl_ifc driver with
On 28/05/2024 15:33, Esben Haabendal wrote:
> Krzysztof Kozlowski writes:
>
>> On 28/05/2024 14:28, Esben Haabendal wrote:
>>> With CONFIG_FSL_IFC now being user-visible, and thus changed from a select
>>> to depends in CONFIG_MTD_NAND_FSL_IFC, the dependencies needs to be
>>> selected in config
On Tue, May 21, 2024 at 06:13:35PM +0800, Shengjiu Wang wrote:
> Add compatible string "fsl,imx95-xcvr" for i.MX95 platform.
>
> The difference between each platform is in below table.
>
> +-++--++
> | SOC | PHY | eARC/ARC | SPDIF |
> +-+-
On Wed, 22 May 2024 11:08:24 +0800, Shengjiu Wang wrote:
> There are two MQS instances on the i.MX95 platform.
> The definition of bit positions in the control register are
> different. In order to support these MQS modules, define
> two compatible strings to distinguish them.
>
> As one instanc
On Fri, May 24, 2024, Kai Huang wrote:
> > @@ -1548,6 +1548,9 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int
> > cpu)
> > struct vcpu_svm *svm = to_svm(vcpu);
> > struct svm_cpu_data *sd = per_cpu_ptr(&svm_data, cpu);
> > + if (vcpu->scheduled_out && !kvm_pause_in_guest(vcpu->kv
Hi All,
Xorg doesn't start anymore since the RC1 of kernel 6.10. We tested it
with the VirtIO GPU and with some Radeon cards.
Another error message: Failed to start Setup Virtual Console.
Maybe this is the issue: + CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y
Tested with FSL P5040, FSL P5020, and PA
On 28.05.24 22:00, Christian Zigotzky wrote:
Hi All,
Xorg doesn't start anymore since the RC1 of kernel 6.10. We tested it
with the VirtIO GPU and with some Radeon cards.
Another error message: Failed to start Setup Virtual Console.
Maybe this is the issue: + CONFIG_ARCH_HAS_KERNEL_FPU_SUPPO
From: "Dr. David Alan Gilbert"
'cgr_comp' has been unused since
commit 96f413f47677 ("soc/fsl/qbman: fix issue in
qman_delete_cgr_safe()").
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
drivers/soc/fsl/qbman/qman.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/soc/fsl
On Tue, May 28, 2024 at 11:15 PM Rob Herring wrote:
>
> On Tue, May 21, 2024 at 06:13:35PM +0800, Shengjiu Wang wrote:
> > Add compatible string "fsl,imx95-xcvr" for i.MX95 platform.
> >
> > The difference between each platform is in below table.
> >
> > +-++--++
>
Hello,
Please review this series and let me know if any changes are needed.
Thanks,
Gautam
On Tue, May 28, 2024 at 02:54:58PM -0400, Eric Chanudet wrote:
> When DEFERRED_STRUCT_PAGE_INIT=y, use a node's cpu count as maximum
> thread count for the deferred initialization of struct pages via padata.
> This should result in shorter boot times for these configurations by
> going through page
Hi,
Kindly ping.
Appreciate comments and suggestions so I could go ahead.
Thanks
Zhenzhong
>-Original Message-
>From: Duan, Zhenzhong
>Subject: [PATCH v4 0/3] PCI/AER: Handle Advisory Non-Fatal error
>
>Hi,
>
>This is a relay work of Qingshun's v2 [1], but changed to focus on ANFE
>proc
On Tue, May 28, 2024 at 02:54:58PM -0400, Eric Chanudet wrote:
> When DEFERRED_STRUCT_PAGE_INIT=y, use a node's cpu count as maximum
> thread count for the deferred initialization of struct pages via padata.
> This should result in shorter boot times for these configurations by
> going through page
27 matches
Mail list logo
