Code patching on powerpc with a STRICT_KERNEL_RWX uses a userspace
address in a temporary mm now. Use __put_user() to avoid write failures
due to KUAP when attempting a "hijack" on the patching address.
Signed-off-by: Christopher M. Riedl
---
drivers/misc/lkdtm/perms.c | 9 -
1 file chan
When live patching with STRICT_KERNEL_RWX a mapping is installed at a
"patching address" with temporary write permissions. Provide a
LKDTM-only accessor function for this address in preparation for a LKDTM
test which attempts to "hijack" this mapping by writing to it from
another CPU.
Signed-off-b
A previous commit implemented an LKDTM test on powerpc to exploit the
temporary mapping established when patching code with STRICT_KERNEL_RWX
enabled. Extend the test to work on x86_64 as well.
Signed-off-by: Christopher M. Riedl
---
drivers/misc/lkdtm/perms.c | 29 ++---
Powerpc allows for multiple CPUs to patch concurrently. When patching
with STRICT_KERNEL_RWX a single patching_mm is allocated for use by all
CPUs for the few times that patching occurs. Use a spinlock to protect
the patching_mm from concurrent use.
Modify patch_instruction() to acquire the lock,
When compiled with CONFIG_STRICT_KERNEL_RWX, the kernel must create
temporary mappings when patching itself. These mappings temporarily
override the strict RWX text protections to permit a write. Currently,
powerpc allocates a per-CPU VM area for patching. Patching occurs as
follows:
1. Ma
Now that patching requires a lock to prevent concurrent access to
patching_mm, every call to patch_instruction() acquires and releases a
spinlock. There are several places where patch_instruction() is called
in a loop. Convert these to acquire the lock once before the loop, call
patch_instruction_u
When live patching with STRICT_KERNEL_RWX the CPU doing the patching
must temporarily remap the page(s) containing the patch site with +W
permissions. While this temporary mapping is in use, another CPU could
write to the same mapping and maliciously alter kernel text. Implement a
LKDTM test to att
Switching to a different mm with Hash translation causes SLB entries to
be preloaded from the current thread_info. This reduces SLB faults, for
example when threads share a common mm but operate on different address
ranges.
Preloading entries from the thread_info struct may not always be
appropria
With Book3s64 Hash translation, manually inserting a PTE requires
updating the Linux PTE, inserting a SLB entry, and inserting the hashed
page. The first is handled via the usual kernel abstractions, the second
requires slb_allocate_user() which is currently 'static', and the third
is available via
When live patching with STRICT_KERNEL_RWX a mapping is installed at a
"patching address" with temporary write permissions. Provide a
LKDTM-only accessor function for this address in preparation for a LKDTM
test which attempts to "hijack" this mapping by writing to it from
another CPU.
Signed-off-b
When code patching a STRICT_KERNEL_RWX kernel the page containing the
address to be patched is temporarily mapped as writeable. Currently, a
per-cpu vmalloc patch area is used for this purpose. While the patch
area is per-cpu, the temporary page mapping is inserted into the kernel
page tables for t
x86 supports the notion of a temporary mm which restricts access to
temporary PTEs to a single CPU. A temporary mm is useful for situations
where a CPU needs to perform sensitive operations (such as patching a
STRICT_KERNEL_RWX kernel) requiring temporary mappings without exposing
said mappings to
Le 29/04/2021 à 05:15, Jordan Niethe a écrit :
From: Russell Currey
The set_memory_{ro/rw/nx/x}() functions are required for
STRICT_MODULE_RWX, and are generally useful primitives to have. This
implementation is designed to be generic across powerpc's many MMUs.
It's possible that this coul
From: Arnd Bergmann
gcc-11 points out that modifying local variables next to a
longjmp/setjmp may cause undefined behavior:
arch/powerpc/kexec/crash.c: In function 'crash_kexec_prepare_cpus.constprop':
arch/powerpc/kexec/crash.c:108:22: error: variable 'ncpus' might be clobbered
by 'longjmp' or
"Gautham R. Shenoy" writes:
> From: "Gautham R. Shenoy"
>
> Commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for
> CEDE(0)") sets the exit latency of CEDE(0) based on the latency values
> of the Extended CEDE states advertised by the platform
>
> On POWER9 LPARs, the firmwares advertise
Laurent Dufour writes:
> After a LPM, the device tree node ibm,dynamic-reconfiguration-memory may be
> updated by the hypervisor in the case the NUMA topology of the LPAR's
> memory is updated.
>
> This is caught by the kernel, but the memory's node is updated because
> there is no way to move a
Daniel Axtens writes:
> Hi Alexey,
>
>> The $(CPP) (do only preprocessing) macro is already defined in Makefile.
>> However POWERPC redefines it and adds $(KBUILD_CFLAGS) which results
>> in flags duplication. Which is not a big deal by itself except for
>> the flags which depend on other flags an
Hello Michael,
On Thu, Apr 29, 2021 at 07:56:25PM +1000, Michael Ellerman wrote:
> "Gautham R. Shenoy" writes:
> > From: "Gautham R. Shenoy"
> >
> > Commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for
> > CEDE(0)") sets the exit latency of CEDE(0) based on the latency values
> > of th
Le 29/04/2021 à 12:27, Aneesh Kumar K.V a écrit :
Laurent Dufour writes:
After a LPM, the device tree node ibm,dynamic-reconfiguration-memory may be
updated by the hypervisor in the case the NUMA topology of the LPAR's
memory is updated.
This is caught by the kernel, but the memory's node is
Le 29/04/2021 à 13:31, Laurent Dufour a écrit :
Le 29/04/2021 à 12:27, Aneesh Kumar K.V a écrit :
Laurent Dufour writes:
After a LPM, the device tree node ibm,dynamic-reconfiguration-memory may be
updated by the hypervisor in the case the NUMA topology of the LPAR's
memory is updated.
This i
From: "Gautham R. Shenoy"
Commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for
CEDE(0)") sets the exit latency of CEDE(0) based on the latency values
of the Extended CEDE states advertised by the platform
On POWER9 LPARs, the firmwares advertise a very low value of 2us for
CEDE1 exit l
Le 29/04/2021 à 12:27, Aneesh Kumar K.V a écrit :
Laurent Dufour writes:
After a LPM, the device tree node ibm,dynamic-reconfiguration-memory may be
updated by the hypervisor in the case the NUMA topology of the LPAR's
memory is updated.
This is caught by the kernel, but the memory's node is
On Mon, 1 Mar 2021 17:36:53 +1100, Alexey Kardashevskiy wrote:
> The IOMMU table is divided into pools for concurrent mappings and each
> pool has a separate spinlock. When taking the ownership of an IOMMU group
> to pass through a device to a VM, we lock these spinlocks which triggers
> a false ne
On Thu, 4 Mar 2021 06:55:37 -0500, Athira Rajeev wrote:
> Sampled Instruction Event Register (SIER) field [46:48]
> identifies the sampled instruction type. ISA v3.1 says value
> of 0b111 for this field as reserved, but in POWER10 it denotes
> LARX/STCX type which will hopefully be fixed in ISA v3.
On Thu, 4 Mar 2021 01:40:15 -0500, Athira Rajeev wrote:
> Memory events (mem-loads and mem-stores) currently use the threshold
> event selection as issue to finish. Power10 supports issue to complete
> as part of thresholding which is more appropriate for mem-loads and
> mem-stores. Hence fix the e
On Tue, 16 Feb 2021 14:33:05 +1100, Alexey Kardashevskiy wrote:
> Killing a VM on a host under memory pressure kills a host which is
> annoying. 1/2 reduces the chances, 2/2 eliminates panic() on
> ioda2.
>
>
> This is based on sha1
> f40ddce88593 Linus Torvalds "Linux 5.11".
>
> [...]
Applied
On Wed, 21 Apr 2021 17:24:03 + (UTC), Christophe Leroy wrote:
> AS arch/powerpc/platforms/52xx/lite5200_sleep.o
> arch/powerpc/platforms/52xx/lite5200_sleep.S: Assembler messages:
> arch/powerpc/platforms/52xx/lite5200_sleep.S:184: Warning: invalid register
> expression
>
> In the foll
On Sat, 24 Apr 2021 10:34:43 + (UTC), Christophe Leroy wrote:
> Modules are now located before kernel, KASAN area has to
> be extended accordingly.
Applied to powerpc/next.
[1/1] powerpc/kasan: Fix shadow start address with modules
https://git.kernel.org/powerpc/c/30c400886bad4ac1801516
On Fri, 23 Apr 2021 13:52:10 + (UTC), Christophe Leroy wrote:
> Return of user_read_access_begin() is tested the wrong way,
> leading to a SIGSEGV when the user address is valid and likely
> an Oops when the user address is bad.
>
> Fix the test.
Applied to powerpc/next.
[1/1] powerpc/signal
On Tue, 20 Apr 2021 13:32:48 + (UTC), Christophe Leroy wrote:
> At the time being, the fixmap area is defined at the top of
> the address space or just below KASAN.
>
> This definition is not valid for PPC64.
>
> For PPC64, use the top of the I/O space.
>
> [...]
Applied to powerpc/next.
[
On Wed, 16 Dec 2020 11:36:08 +, Colin King wrote:
> There is a spelling mistake in the Kconfig help text. Fix it.
Applied to powerpc/next.
[1/1] powerpc/44x: fix spelling mistake in Kconfig "varients" -> "variants"
https://git.kernel.org/powerpc/c/ee6b25fa7c037e42cc5f3b5c024b2a779edab6d
On Thu, 25 Feb 2021 17:19:49 +1100, Daniel Axtens wrote:
> Also based on the RFI and entry flush tests, it counts the L1D misses
> by doing a syscall that does user access: uname, in this case.
Applied to powerpc/next.
[1/1] selftests/powerpc: Add uaccess flush test
https://git.kernel.org/p
On Thu, 18 Mar 2021 14:44:14 -0300, Leonardo Bras wrote:
> Currently both iommu_alloc_coherent() and iommu_free_coherent() align the
> desired allocation size to PAGE_SIZE, and gets system pages and IOMMU
> mappings (TCEs) for that value.
>
> When IOMMU_PAGE_SIZE < PAGE_SIZE, this behavior may cau
On Thu, 18 Mar 2021 14:44:17 -0300, Leonardo Bras wrote:
> As of today, doing iommu_range_alloc() only for !largealloc (npages <= 15)
> will only be able to use 3/4 of the available pages, given pages on
> largepool not being available for !largealloc.
>
> This could mean some drivers not being a
On Wed, 21 Apr 2021 22:54:01 +1000, Michael Ellerman wrote:
> Sparse says:
> arch/powerpc/kernel/fadump.c:48:16: warning: symbol 'fadump_kobj' was not
> declared. Should it be static?
> arch/powerpc/kernel/fadump.c:55:27: warning: symbol 'crash_mrange_info' was
> not declared. Should it be st
On Tue, 20 Apr 2021 14:22:09 +1000, Michael Ellerman wrote:
> FA_DUMP (Firmware Assisted Dump) is a powerpc only feature that should
> be enabled in our defconfig to get some build / test coverage.
Applied to powerpc/next.
[1/1] powerpc/64s: Add FA_DUMP to defconfig
https://git.kernel.org/p
On Tue, 2 Mar 2021 13:09:54 +1100, Michael Ellerman wrote:
> This is an IBM specific driver that we should enable to get some
> build/boot testing.
Applied to powerpc/next.
[1/1] powerpc/configs: Add IBMVNIC to some 64-bit configs
https://git.kernel.org/powerpc/c/421a7483878cf3f356ebb871eff
On Sun, 25 Apr 2021 21:58:31 +1000, Michael Ellerman wrote:
> lkp reported a randconfig failure:
>
> In file included from arch/powerpc/include/asm/book3s/64/pkeys.h:6,
> from arch/powerpc/kvm/book3s_64_mmu_host.c:15:
> arch/powerpc/include/asm/book3s/64/hash-pkey.h:
On Thu, 22 Apr 2021 01:17:32 +1000, Nicholas Piggin wrote:
> The memory ordering comment no longer applies, because mm_ctx_id is
> no longer used anywhere. At best always been difficult to follow.
>
> It's better to consider the load on which the slbmte depends on, which
> the MMU depends on befor
On Wed, 21 Apr 2021 14:06:47 -0700, Randy Dunlap wrote:
> On a kernel config with ALTIVEC=y and PPC_FPU not set/enabled,
> there are build errors:
>
> drivers/cpufreq/pmac32-cpufreq.c:262:2: error: implicit declaration of
> function 'enable_kernel_fp' [-Werror,-Wimplicit-function-declaration]
>
On Mon, 26 Apr 2021 13:35:18 -0700, Nathan Chancellor wrote:
> Commit 9975f852ce1b ("powerpc/uaccess: Remove calls to __get_user_bad()
> and __put_user_bad()") switch to BUILD_BUG() in the default case, which
> leaves x uninitialized. This will not be an issue because the build will
> be broken in
On Mon, 12 Apr 2021 16:52:14 +0530, Ravi Bangoria wrote:
> Power10 introduced 2nd watchpoint (DAWR). ISA 3.1, Book 3S, Ch 9 -
> 'Debug Facilities' covers the feature in detail. Kernel patches to
> enable the 2nd DAWR are already in[1], including kvm enablement[2].
> These patches adds selftests for
On Mon, 29 Mar 2021 17:01:03 +0530, Vaibhav Jain wrote:
> In case an nvdimm is found to be unarmed during probe then set its
> NDD_UNARMED flag before nvdimm_create(). This would enforce a
> read-only access to the ndimm region. Presently even if an nvdimm is
> unarmed its not marked as read-only o
On Tue, 2 Feb 2021 11:34:36 +0800, Yang Li wrote:
> Eliminate the following coccicheck warning:
> ./arch/powerpc/platforms/powernv/setup.c:160:2-3: Unneeded semicolon
Applied to powerpc/next.
[1/1] powerpc/64s: remove unneeded semicolon
https://git.kernel.org/powerpc/c/caea7b833d866e0badf4b
On Tue, 2 Feb 2021 11:21:36 +0800, Yang Li wrote:
> Eliminate the following coccicheck warning:
> ./arch/powerpc/kernel/eeh.c:782:2-3: Unneeded semicolon
Applied to powerpc/next.
[1/1] powerpc/eeh: remove unneeded semicolon
https://git.kernel.org/powerpc/c/f3d03fc748d4e48f4cd8dea1bfeb173cb3
On Mon, 8 Feb 2021 18:41:10 +0800, Yang Li wrote:
> Eliminate the following coccicheck warning:
> ./tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c:327:4-5: Unneeded
> semicolon
Applied to powerpc/next.
[1/1] selftests/powerpc: remove unneeded semicolon
https://git.kernel.org/powerpc/c
Hi,
Le 28/04/2021 à 20:14, Jonathan Neuschäfer a écrit :
Hi,
On Wed, Apr 28, 2021 at 11:33:24AM +1000, Jordan Niethe wrote:
On Mon, Apr 26, 2021 at 1:40 AM Jonathan Neuschäfer
wrote:
Hi,
I recently booted my Wii again, and I noticed a regression at boot time.
Output stops after the "Finali
-20210429 (attached as .config)
compiler: powerpc64le-linux-gcc (GCC) 9.3.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-341
Commit 7c95d8893fb5 ("powerpc: Change calling convention for
create_branch() et. al.") complexified the frame of function
do_feature_fixups(), leading to GCC setting up a stack
guard when CONFIG_STACKPROTECTOR is selected.
The problem is that do_feature_fixups() is called very early
while 'current
When a CPU is hot added, the CPU ids are taken from the available mask from
the lower possible set. If that set of values was previously used for CPU
attached to a different node, this seems to application like if these CPUs
have migrated from a node to another one which is not expected in real
lif
On Thu, Apr 29, 2021 at 04:52:09PM +, Christophe Leroy wrote:
> Commit 7c95d8893fb5 ("powerpc: Change calling convention for
> create_branch() et. al.") complexified the frame of function
> do_feature_fixups(), leading to GCC setting up a stack
> guard when CONFIG_STACKPROTECTOR is selected.
>
When a LPAR is migratable, we should consider the maximum possible NUMA
node instead the number of NUMA node from the actual system.
The DT property 'ibm,current-associativity-domains' is defining the maximum
number of nodes the LPAR can see when running on that box. But if the LPAR
is being migra
On 4/29/21 3:27 AM, Aneesh Kumar K.V wrote:
> Laurent Dufour writes:
>
>> After a LPM, the device tree node ibm,dynamic-reconfiguration-memory may be
>> updated by the hypervisor in the case the NUMA topology of the LPAR's
>> memory is updated.
>>
>> This is caught by the kernel, but the memory's
On 4/29/21 11:19 AM, Laurent Dufour wrote:
> When a LPAR is migratable, we should consider the maximum possible NUMA
> node instead the number of NUMA node from the actual system.
>
> The DT property 'ibm,current-associativity-domains' is defining the maximum
> number of nodes the LPAR can see whe
On 4/28/21 9:46 AM, Christophe Leroy wrote:
> At the time being, arch_make_huge_pte() has the following prototype:
>
> pte_t arch_make_huge_pte(pte_t entry, struct vm_area_struct *vma,
>struct page *page, int writable);
>
> vma is used to get the pages shift
LANG gives a weak default to each LC_* in case it is not explicitly
defined. LC_ALL, if set, overrides all other LC_* variables.
LANG < LC_CTYPE, LC_COLLATE, LC_MONETARY, LC_NUMERIC, ... < LC_ALL
This is why documentation such as [1] suggests to set LC_ALL in build
scripts to get the determ
allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a002-20210429
x86_64 randconfig-a001-20210429
x86_64 randconfig-a003
randconfig-a005-20210429
x86_64 randconfig-a006-20210429
x86_64 randconfig-a004-20210429
x86_64 randconfig-a002-20210429
x86_64 randconfig-a001-20210429
x86_64 randconfig-a003-20210429
i386 randconfig-a005-20210429
i386
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi Linus,
Please pull powerpc updates for 5.13.
No conflicts that I'm aware of.
Notable out of area changes:
51c66ad849a7 powerpc/bpf: Implement extended BPF on PPC32
Documentation/admin-guide/sysctl/net.rst
808094fcbf41 lib/vdso: Add vd
This converts the prom_init string users to the early string function
which don't suffer from KASAN or any other debugging enabled.
Cc: xe-linux-exter...@cisco.com
Signed-off-by: Daniel Walker
---
arch/powerpc/kernel/prom_init.c| 185 ++---
arch/powerpc/kernel/prom_in
This switched x86 early string users to use the early string variants
and re-enabled KASAN on general string functions use thru out the rest
of the system.
Cc: xe-linux-exter...@cisco.com
Signed-off-by: Daniel Walker
---
arch/x86/mm/mem_encrypt_identity.c | 4 ++--
lib/Makefile
This systems allows some string functions to be moved into
lib/early_string.c and they will be prepended with "early_" and compiled
without debugging like KASAN.
This is already done on x86 for,
"AMD Secure Memory Encryption (SME) support"
and on powerpc prom_init.c , and EFI's libstub.
The AMD
On Fri, Apr 30, 2021 at 10:56:27AM +0900, Masahiro Yamada wrote:
> LANG gives a weak default to each LC_* in case it is not explicitly
> defined. LC_ALL, if set, overrides all other LC_* variables.
>
> LANG < LC_CTYPE, LC_COLLATE, LC_MONETARY, LC_NUMERIC, ... < LC_ALL
>
> This is why docume
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