To allow building syscall_64.c smoothly on PPC32, add stub version
of irq_soft_mask_return().
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/hw_irq.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/include/asm/hw_irq.h
b/arch/powerpc/include/asm/hw_irq.h
inde
Instead of hard comparing task flags with _TIF_32BIT, use
is_compat_task(). The advantage is that it returns 0 on PPC32
allthough _TIF_32BIT is always set.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/syscall.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arc
Save r3 in regs->orig_r3 in system_call_exception()
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/entry_64.S | 1 -
arch/powerpc/kernel/syscall.c | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index
In system_call_exception(), MSR_RI needs to also be checked on 8xx.
Only book3e doesn't have MSR_RI.
On PPC32, MSR_PR is checked in real mode to avoid clobbering the
stack, so no need to check and panic in system_call_exception().
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/syscall.
That's port of PPC64 syscall entry/exit logic in C to PPC32.
Performancewise:
Before : 311 cycles on null_syscall
After : 353 cycles on null_syscall
Note: before the patch, if calling NVGPRS all the time as well,
we have 335 cycles on null_syscall
Signed-off-by: Christophe Leroy
---
arch/powe
When r3 is not modified, reload it from regs->orig_r3 to free
volatile registers. This avoids a stack frame for the likely part
of syscall_call_exception()
Before : 353 cycles on null_syscall
After : 347 cycles on null_syscall
Before the patch:
c000b4d4 :
c000b4d4: 7c 08 02 a6 mflr
To allow that, syscall_exit_prepare() gets split in 3 parts.
On PPC32, the three parts are called from entry_32.S
On PPC64, we keep a syscall_exit_prepare() function which
concatenates the three parts.
One benefit is also that the likely part of
syscall_exit_prepare_begin() and the syscall_exit_pr
Le 06/04/2020 à 03:25, Nicholas Piggin a écrit :
Christophe Leroy's on April 6, 2020 3:44 am:
Before : 347 cycles on null_syscall
After : 327 cycles on null_syscall
The problem I had doing this is that signal delivery wnats full regs,
and you don't know if you have a signal pending ahead o
Le 06/04/2020 à 03:29, Nicholas Piggin a écrit :
Christophe Leroy's on April 6, 2020 3:44 am:
When r3 is not modified, reload it from regs->orig_r3 to free
volatile registers. This avoids a stack frame for the likely part
of syscall_call_exception()
Before : 353 cycles on null_syscall
After
Le 06/04/2020 à 03:42, Nicholas Piggin a écrit :
Christophe Leroy's on April 6, 2020 3:44 am:
syscall_64.c will be reused almost as is for PPC32.
Rename it syscall.c
Don't mind this, but I wonder if we can rename it to interrupt.c.
Interrupt for me is irq.
Maybe exception.c ?
Exception
Le 06/04/2020 à 03:52, Nicholas Piggin a écrit :
Christophe Leroy's on April 6, 2020 3:44 am:
ifdef out specific PPC64 stuff to allow building
syscall_64.c on PPC32.
Modify Makefile to always build syscall.o
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/Makefile | 5 ++---
a
On Thu, 2020-04-02 at 22:28 +1100, Michael Ellerman wrote:
> Leonardo Bras
> TBH I think we could just drop that printk() entirely.
>
> Or we could tell printk() that we're in NMI context so that it uses the
> percpu buffers.
>
> We should probably do the latter anyway, in case there's any othe
On Fri, Apr 03, 2020 at 05:13:25PM +1000, Nicholas Piggin wrote:
> Michal Suchánek's on March 25, 2020 5:38 am:
> > On Tue, Mar 24, 2020 at 06:48:20PM +1000, Nicholas Piggin wrote:
> >> Michal Suchanek's on March 19, 2020 10:19 pm:
> >> > There are two almost identical copies for 32bit and 64bit.
>
perf_callchain_user_64 and perf_callchain_user_32 are nearly identical.
Consolidate into one function with thin wrappers.
Suggested-by: Nicholas Piggin
Signed-off-by: Michal Suchanek
---
arch/powerpc/perf/callchain.h| 24 +++-
arch/powerpc/perf/callchain_32.c | 21 ++
On Fri, Apr 03, 2020 at 03:01:03PM +0530, Gautham R Shenoy wrote:
> On Fri, Apr 03, 2020 at 12:20:26PM +1000, Nicholas Piggin wrote:
> > Gautham R. Shenoy's on March 31, 2020 10:10 pm:
> > > From: "Gautham R. Shenoy"
> > >
> > > ISA v3.0 allows the guest to execute a stop instruction. For this, t
On Wed, Apr 01, 2020 at 04:45:35PM +0800, Shengjiu Wang wrote:
> In order to support new EASRC and simplify the code structure,
> We decide to share the common structure between them. This bring
> a problem that EASRC accept format directly from devicetree, but
> ASRC accept width from devicetree.
https://bugzilla.kernel.org/show_bug.cgi?id=207129
--- Comment #4 from Erhard F. (erhar...@mailbox.org) ---
Without CONFIG_VMAP_STACK I had one crash after 2-3 hours of building but the
panic timer kicked in and rebooted the machine. Now it has been building
packages for hours again without any an
On Wed, Apr 01, 2020 at 04:45:36PM +0800, Shengjiu Wang wrote:
> In order to align with new ESARC, we add new property fsl,asrc-format.
> The fsl,asrc-format can replace the fsl,asrc-width, driver
> can accept format from devicetree, don't need to convert it to
> format through width.
>
> Signed-o
Just some small comments.
On Wed, Apr 01, 2020 at 04:45:37PM +0800, Shengjiu Wang wrote:
> In order to align with new ESARC, we add new property fsl,asrc-format.
> The fsl,asrc-format can replace the fsl,asrc-width, driver
> can accept format from devicetree, don't need to convert it to
> format t
On 04/06/2020 10:06 AM, Michael Ellerman wrote:
On Fri, 2020-04-03 at 09:56:56 UTC, Michael Ellerman wrote:
The tm-poison test includes inline asm which is 64-bit only, so the
test must be built 64-bit in order to work.
Otherwise it fails, eg:
# file tm-poison
tm-poison: ELF 32-bit MSB ex
On Wed, Apr 01, 2020 at 04:45:38PM +0800, Shengjiu Wang wrote:
> static int fsl_asrc_probe(struct platform_device *pdev)
> {
> struct device_node *np = pdev->dev.of_node;
> struct fsl_asrc *asrc;
> + struct fsl_asrc_priv *asrc_priv;
Could we move it before "struct fsl_asrc *asrc
From: Grigore Popescu
[ Upstream commit fe8fe7723a3a824790bda681b40efd767e2251a7 ]
The dpio irqs must be registered when you can actually
receive interrupts, ie when the dpios are created.
Kernel goes through NULL pointer dereference errors
followed by kernel panic [1] because the dpio irqs are
Hi Christoph,
> Replace the coredump ->read method with a ->dump method that must call
> dump_emit itself. That way we avoid a buffer allocation an messing with
> set_fs() to call into code that is intended to deal with user buffers.
> For the ->get case we can now use a small on-stack buffer and
From: Grigore Popescu
[ Upstream commit fe8fe7723a3a824790bda681b40efd767e2251a7 ]
The dpio irqs must be registered when you can actually
receive interrupts, ie when the dpios are created.
Kernel goes through NULL pointer dereference errors
followed by kernel panic [1] because the dpio irqs are
Christophe Leroy's on April 7, 2020 4:20 am:
>
>
> Le 06/04/2020 à 03:42, Nicholas Piggin a écrit :
>> Christophe Leroy's on April 6, 2020 3:44 am:
>>> syscall_64.c will be reused almost as is for PPC32.
>>>
>>> Rename it syscall.c
>>
>> Don't mind this, but I wonder if we can rename it to inter
Christophe Leroy's on April 7, 2020 4:18 am:
>
>
> Le 06/04/2020 à 03:25, Nicholas Piggin a écrit :
>> Christophe Leroy's on April 6, 2020 3:44 am:
>>> Before : 347 cycles on null_syscall
>>> After : 327 cycles on null_syscall
>>
>> The problem I had doing this is that signal delivery wnats ful
On Wed, Apr 01, 2020 at 04:45:40PM +0800, Shengjiu Wang wrote:
> EASRC (Enhanced Asynchronous Sample Rate Converter) is a new IP module
> found on i.MX8MN. It is different with old ASRC module.
>
> The primary features for the EASRC are as follows:
> - 4 Contexts - groups of channels with an indep
Christophe Leroy's on April 7, 2020 4:16 am:
> regs->softe doesn't exist on PPC32.
>
> Add helpers to get and set regs->softe.
> Those helpers will void on PPC32.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/include/asm/hw_irq.h | 21 +++--
> 1 file changed, 19 inser
Christophe Leroy's on April 7, 2020 4:16 am:
> + ret = syscall_exit_prepare_end(ret, regs, ti_flags);
> + if (unlikely(ret & 0x8000)) {
> + ret &= ~0x8000;
We could just add our own set of defines for these, there's no real
reason to use _TIF_RESTOREALL as I had.
Thank
On Monday, 6 April 2020 8:42:57 PM AEST Jordan Niethe wrote:
> On Mon, 6 Apr 2020, 7:52 pm Alistair Popple, wrote:
> > > diff --git a/arch/powerpc/include/asm/inst.h
> > > b/arch/powerpc/include/asm/inst.h index 70b37a35a91a..7e23e7146c66
> > > 100644
> > > --- a/arch/powerpc/include/asm/inst.h
>
Ever since 1st Apr, linux-next starts to trigger a NULL pointer NIP on POWER9
below using
this config,
https://raw.githubusercontent.com/cailca/linux-mm/master/powerpc.config
It takes a while to reproduce, so before I bury myself into bisecting and just
send a head-up
to see if anyone spots any
> -Original Message-
> From: Mian Yousaf Kaukab
> Sent: 2020年4月4日 5:21
> To: linux...@vger.kernel.org; Andy Tang ;
> shawn...@kernel.org; Leo Li
> Cc: viresh.ku...@linaro.org; linux-ker...@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org; linuxppc-dev@lists.ozlabs.org; Mian
> Yous
Mauro Carvalho Chehab writes:
> This small series address a regression caused by a new patch at
> docs-next (and at linux-next).
>
> Before this patch, when a cross-reference to a chapter within the
> documentation is needed, we had to add a markup like:
>
> .. _foo:
>
> foo
> ==
On Mon, Apr 06, 2020 at 12:41:01PM -0300, Leonardo Bras wrote:
> Hello Bharata,
>
> On Fri, 2020-04-03 at 20:08 +0530, Bharata B Rao wrote:
> > The patch would be more complete with the following change that ensures
> > that DRCONF_MEM_HOTREMOVABLE flag is set for non-boot-time hotplugged
> > memo
Nicholas Piggin's on April 3, 2020 9:05 pm:
> Christophe Leroy's on April 3, 2020 8:31 pm:
>>
>>
>> Le 03/04/2020 à 11:35, Nicholas Piggin a écrit :
>>> There is no need to allow user accesses when probing kernel addresses.
>>
>> I just discovered the following commit
>> https://git.kernel.org/
get/put_user can be called with nontrivial arguments. fs/proc/page.c
has a good example:
if (put_user(stable_page_flags(ppage), out)) {
stable_page_flags is quite a lot of code, including spin locks in the
page allocator.
Ensure these arguments are evaluated before user access is allowed.
Th
Christophe Leroy's on April 4, 2020 12:35 am:
>
>
> Le 03/04/2020 à 15:26, Nicholas Piggin a écrit :
>> PAPR does not specify that fwnmi sreset should be interlocked, and
>> PowerVM (and therefore now QEMU) do not require it.
>>
>> These "ibm,nmi-interlock" calls are ignored by firmware, but the
Christophe Leroy's on April 4, 2020 12:45 am:
>
>
> Le 03/04/2020 à 15:26, Nicholas Piggin a écrit :
>> Similarly to the previous patch, do not trace system reset. This code
>> is used when there is a crash or hang, and tracing disturbs the system
>> more and has been known to crash in the crash
Christophe Leroy's on April 4, 2020 12:19 am:
>
>
> Le 03/04/2020 à 15:26, Nicholas Piggin a écrit :
>> This allows rtas_args to be put on the machine check stack, which
>> avoids a lot of complications with re-entrancy deadlocks.
>>
>> Reviewed-by: Mahesh Salgaonkar
>> Signed-off-by: Nicholas
Christophe Leroy's on April 4, 2020 12:30 am:
>
>
> Le 03/04/2020 à 15:26, Nicholas Piggin a écrit :
>> In the interest of reducing code and possible failures in the
>> machine check and system reset paths, grab the "ibm,nmi-interlock"
>> token at init time.
>>
>> Reviewed-by: Mahesh Salgaonkar
There's a bunch of problems we hit bringing up fwnmi sreset and testing
with mce injection on QEMU. Mostly pseries issues.
This series of fixes applies on top of next-test, the machine
check reconcile patch won't apply cleanly to previous kernels but
it might want to be backported. We can do that
The architecture allows for machine check exceptions to cause idle
wakeups which resume at the 0x200 address which has to return via
the idle wakeup code, but the early machine check handler is run
first.
The case of a no state-loss sleep is broken because the early
handler uses non-volatile regis
Acked-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index bbf3109c5cba..3322000316ab 100644
--- a/arch/powerpc/kern
A spare interrupt stack slot is needed to save irq state when
reconciling NMIs (sreset and decrementer soft-nmi). _DAR is used
for this, but we want to reconcile machine checks as well, which
do use _DAR. Switch to using RESULT instead, as it's used by
system calls.
Signed-off-by: Nicholas Piggin
pseries fwnmi machine check code pops the soft-irq checks in rtas_call
(after the previous patch to remove rtas_token from this call path).
Rather than play whack a mole with these and forever having fragile
code, it seems better to have the early machine check handler perform
the same kind of reco
In the interest of reducing code and possible failures in the
machine check and system reset paths, grab the "ibm,nmi-interlock"
token at init time.
Reviewed-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/firmware.h| 1 +
arch/powerpc/platforms/pseries/ra
This was discovered developing qemu fwnmi sreset support. This
off-by-one bug means the last 16 bytes of the rtas area can not
be used for a 16 byte save area.
It's not a serious bug, and QEMU implementation has to retain a
workaround for old kernels, but it's good to tighten it.
Acked-by: Mahesh
If there is some error with the fwnmi save area, r3 has already been
modified which doesn't help with debugging.
Only update r3 when to restore the saved value.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/pseries/ras.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
PAPR does not specify that fwnmi sreset should be interlocked, and
PowerVM (and therefore now QEMU) do not require it.
These "ibm,nmi-interlock" calls are ignored by firmware, but there
is a possibility that the sreset could have interrupted a machine
check and release the machine check's interloc
This allows rtas_args to be put on the machine check stack, which
avoids a lot of complications with re-entrancy deadlocks.
Reviewed-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/setup_64.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
di
With the previous patch, machine checks can use rtas_call_unlocked
which avoids the rtas spinlock which would deadlock if a machine
check hits while making an rtas call.
This also avoids the complex rtas error logging which has more rtas calls
and includes kmalloc (which can return memory beyond R
machine_check_early is taken as an NMI, so nmi_enter is used there.
machine_check_exception is no longer taken as an NMI (it's invoked
via irq_work in the case a machine check hits in kernel mode), so
remove the nmi_enter from that case.
In NMI context, hash faults don't try to refill the hash tab
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/ftrace.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/include/asm/ftrace.h
b/arch/powerpc/include/asm/ftrace.h
index f54a08a2cd70..bc76970b6ee5 100644
--- a/arch/powerpc/include/asm/ftrace.h
+++ b/arc
Rather than notrace annotations throughout a significant part of the
machine check code across kernel/ pseries/ and powernv/ which can
easily be broken and is infrequently tested, use paca->ftrace_enabled
to blanket-disable tracing of the real-mode non-maskable handler.
Acked-by: Naveen N. Rao
Si
Similarly to the previous patch, do not trace system reset. This code
is used when there is a crash or hang, and tracing disturbs the system
more and has been known to crash in the crash handling path.
Acked-by: Naveen N. Rao
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/traps.c | 5 ++
System Reset and Machine Check interrupts that are not recoverable due
to being nested or interrupting when RI=0 currently panic. This is
not necessary, and can often just kill the current context and recover.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/traps.c | 6 +++---
1 file chan
Le 06/04/2020 à 23:00, Michal Suchanek a écrit :
perf_callchain_user_64 and perf_callchain_user_32 are nearly identical.
Consolidate into one function with thin wrappers.
Suggested-by: Nicholas Piggin
Signed-off-by: Michal Suchanek
---
arch/powerpc/perf/callchain.h| 24 +++
Le 07/04/2020 à 07:16, Nicholas Piggin a écrit :
machine_check_early is taken as an NMI, so nmi_enter is used there.
machine_check_exception is no longer taken as an NMI (it's invoked
via irq_work in the case a machine check hits in kernel mode), so
remove the nmi_enter from that case.
Euh .
Le 07/04/2020 à 07:16, Nicholas Piggin a écrit :
This allows rtas_args to be put on the machine check stack, which
avoids a lot of complications with re-entrancy deadlocks.
Reviewed-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
Reviewed-by: Christophe Leroy
---
arch/powerpc/ke
Le 07/04/2020 à 07:16, Nicholas Piggin a écrit :
PAPR does not specify that fwnmi sreset should be interlocked, and
PowerVM (and therefore now QEMU) do not require it.
These "ibm,nmi-interlock" calls are ignored by firmware, but there
is a possibility that the sreset could have interrupted a
Le 07/04/2020 à 07:16, Nicholas Piggin a écrit :
In the interest of reducing code and possible failures in the
machine check and system reset paths, grab the "ibm,nmi-interlock"
token at init time.
Reviewed-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
Reviewed-by: Christophe Leroy
Le 07/04/2020 à 07:16, Nicholas Piggin a écrit :
Signed-off-by: Nicholas Piggin
Reviewed-by: Christophe Leroy
---
arch/powerpc/include/asm/ftrace.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/include/asm/ftrace.h
b/arch/powerpc/include/asm/ftrace
Le 07/04/2020 à 07:16, Nicholas Piggin a écrit :
Rather than notrace annotations throughout a significant part of the
machine check code across kernel/ pseries/ and powernv/ which can
easily be broken and is infrequently tested, use paca->ftrace_enabled
to blanket-disable tracing of the real-m
Le 07/04/2020 à 07:16, Nicholas Piggin a écrit :
Similarly to the previous patch, do not trace system reset. This code
is used when there is a crash or hang, and tracing disturbs the system
more and has been known to crash in the crash handling path.
Acked-by: Naveen N. Rao
Signed-off-by: Ni
Le 07/04/2020 à 07:16, Nicholas Piggin a écrit :
System Reset and Machine Check interrupts that are not recoverable due
to being nested or interrupting when RI=0 currently panic. This is
not necessary, and can often just kill the current context and recover.
Signed-off-by: Nicholas Piggin
Le 20/03/2020 à 11:20, Michal Suchanek a écrit :
There are numerous references to 32bit functions in generic and 64bit
code so ifdef them out.
Signed-off-by: Michal Suchanek
---
v2:
- fix 32bit ifdef condition in signal.c
- simplify the compat ifdef condition in vdso.c - 64bit is redundant
-
On Mon, 2020-04-06 at 18:09 +1000, Jordan Niethe wrote:
> create_branch(), create_cond_branch() and translate_branch() return the
> instruction that they create, or return 0 to signal an error. Seperate
s/seperate/separate
> these concerns in preparation for an instruction type that is not just
>
On Tue, Apr 7, 2020 at 4:10 PM Balamuruhan S wrote:
>
> On Mon, 2020-04-06 at 18:09 +1000, Jordan Niethe wrote:
> > create_branch(), create_cond_branch() and translate_branch() return the
> > instruction that they create, or return 0 to signal an error. Seperate
>
> s/seperate/separate
thanks.
>
>
On Mon, 2020-04-06 at 18:09 +1000, Jordan Niethe wrote:
> In preparation for instructions having a more complex data type start
> using a macro, ppc_inst(), for making an instruction out of a u32. A
> macro is used so that instructions can be used as initializer elements.
> Currently this does not
On Mon, 2020-04-06 at 18:09 +1000, Jordan Niethe wrote:
> To execute an instruction out of line after a breakpoint, the NIP is set
> to the address of struct bpt::instr. Here a copy of the instruction that
> was replaced with a breakpoint is kept, along with a trap so normal flow
> can be resumed a
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