On Tue, Jun 20, 2017 at 12:54:45PM +0530, Anshuman Khandual wrote:
> On 06/17/2017 09:22 AM, Ram Pai wrote:
> > Handle Data and Instruction exceptions caused by memory
> > protection-key.
> >
> > Signed-off-by: Ram Pai
> > (cherry picked from commit a5e5217619a0c475fe0cacc3b0cf1d3d33c79a09)
Sorr
On Tue, Jun 20, 2017 at 12:24:53PM +0530, Anshuman Khandual wrote:
> On 06/17/2017 09:22 AM, Ram Pai wrote:
> > The value of the AMR register at the time of exception
> > is made available in gp_regs[PT_AMR] of the siginfo.
> >
> > This field can be used to reprogram the permission bits of
> > any
On Mon, Jun 19, 2017 at 09:06:13PM +1000, Michael Ellerman wrote:
> Ram Pai writes:
>
> > Signed-off-by: Ram Pai
> > ---
> > arch/powerpc/kernel/exceptions-64s.S | 16 ++--
> > 1 file changed, 10 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/powerpc/kernel/exceptions-64s.S
On Tue, Jun 20, 2017 at 12:16:40PM +0530, Anshuman Khandual wrote:
> On 06/19/2017 11:29 PM, Ram Pai wrote:
> > On Mon, Jun 19, 2017 at 09:06:13PM +1000, Michael Ellerman wrote:
> >> Ram Pai writes:
> >>
> >>> Signed-off-by: Ram Pai
> >>> ---
> >>> arch/powerpc/kernel/exceptions-64s.S | 16 +
On Tue, Jun 20, 2017 at 11:48:23AM +0530, Anshuman Khandual wrote:
> On 06/17/2017 09:22 AM, Ram Pai wrote:
> > The Documentaton file is moved from x86 into the generic area,
> > since this feature is now supported by more than one archs.
> >
> > Signed-off-by: Ram Pai
> > ---
> > Documentation/
On Tue, Jun 20, 2017 at 11:56:04AM +0530, Anshuman Khandual wrote:
> On 06/17/2017 09:22 AM, Ram Pai wrote:
> > Added test support for PowerPC implementation off protection keys.
> >
> > Signed-off-by: Ram Pai
>
> First of all, there are a lot of instances where we use *pkru*
> named functions o
Em Thu, Jun 15, 2017 at 01:16:32PM +0200, Mark Wielaard escreveu:
> On Thu, 2017-06-15 at 10:46 +0200, Milian Wolff wrote:
> > Just a quick question: Have you guys applied my recent patch:
> >
> > commit 5ea0416f51cc93436bbe497c62ab49fd9cb245b6
> > Author: Milian Wolff
> > Date: Thu Jun 1 23:00
Em Thu, Jun 15, 2017 at 10:46:16AM +0200, Milian Wolff escreveu:
> On Tuesday, June 13, 2017 5:55:09 PM CEST Ravi Bangoria wrote:
> Just a quick question: Have you guys applied my recent patch:
> commit 5ea0416f51cc93436bbe497c62ab49fd9cb245b6
> Author: Milian Wolff
> Date: Thu Jun 1 23:00:21
On Tue, Jun 20, 2017 at 10:06:35PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Thu, Jun 15, 2017 at 01:16:32PM +0200, Mark Wielaard escreveu:
> > On Thu, 2017-06-15 at 10:46 +0200, Milian Wolff wrote:
> > > Just a quick question: Have you guys applied my recent patch:
> > >
> > > commit 5ea0416f51
Nicholas Piggin writes:
> diff --git a/arch/powerpc/include/asm/thread_info.h
> b/arch/powerpc/include/asm/thread_info.h
> index a941cc6fc3e9..5995e4b2996d 100644
> --- a/arch/powerpc/include/asm/thread_info.h
> +++ b/arch/powerpc/include/asm/thread_info.h
> @@ -62,6 +63,24 @@ struct thread_info
On Wed, 21 Jun 2017 12:01:37 +1000
Michael Ellerman wrote:
> Nicholas Piggin writes:
>
> > diff --git a/arch/powerpc/include/asm/thread_info.h
> > b/arch/powerpc/include/asm/thread_info.h
> > index a941cc6fc3e9..5995e4b2996d 100644
> > --- a/arch/powerpc/include/asm/thread_info.h
> > +++ b/arc
On 06/21/2017 05:26 AM, Ram Pai wrote:
> On Tue, Jun 20, 2017 at 12:24:53PM +0530, Anshuman Khandual wrote:
>> On 06/17/2017 09:22 AM, Ram Pai wrote:
>>> The value of the AMR register at the time of exception
>>> is made available in gp_regs[PT_AMR] of the siginfo.
>>>
>>> This field can be used to
On 06/21/2017 05:13 AM, Ram Pai wrote:
> On Tue, Jun 20, 2017 at 12:54:45PM +0530, Anshuman Khandual wrote:
>> On 06/17/2017 09:22 AM, Ram Pai wrote:
>>> Handle Data and Instruction exceptions caused by memory
>>> protection-key.
>>>
>>> Signed-off-by: Ram Pai
>>> (cherry picked from commit a5e521
Hi Frank,
frowand.l...@gmail.com writes:
> From: Frank Rowand
>
> Remove "phandle", "linux,phandle", and "ibm,phandle" properties from
> the internal device tree. The phandle will still be in the struct
> device_node phandle field and will still be displayed as if it is
> a property in /proc/dev
The bit position is now marked reserved. Hence don't set the bit to 1.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/mmu.h | 1 -
arch/powerpc/kvm/book3s_hv.c | 6 +-
arch/powerpc/mm/pgtable-radix.c | 2 +-
3 files changed, 2 insertions(+), 7 del
On 06/21/2017 04:53 AM, Ram Pai wrote:
> On Tue, Jun 20, 2017 at 03:50:25PM +0530, Anshuman Khandual wrote:
>> On 06/17/2017 09:22 AM, Ram Pai wrote:
>>> Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
>>> in the 4K backed hpte pages. These bits continue to be used
>>> for 64K backed hpte
Emergency stacks have their thread_info mostly uninitialised, which in
particular means garbage preempt_count values.
Emergency stack code runs with interrupts disabled entirely, and is
used very rarely, so this has been unnoticed so far. It was found by a
proposed new powerpc watchdog that takes
On Wed, Jun 21, 2017 at 08:48:20AM +0530, Anshuman Khandual wrote:
> On 06/21/2017 05:26 AM, Ram Pai wrote:
> > On Tue, Jun 20, 2017 at 12:24:53PM +0530, Anshuman Khandual wrote:
> >> On 06/17/2017 09:22 AM, Ram Pai wrote:
> >>> The value of the AMR register at the time of exception
> >>> is made a
Hi Rob,
Michael has an issue that means this patch series is not OK in the
current form. I will work on a v7 to see if I can resolve the
issue.
-Frank
On 06/20/17 21:57, Michael Ellerman wrote:
> Hi Frank,
>
> frowand.l...@gmail.com writes:
>> From: Frank Rowand
>>
>> Remove "phandle", "linu
On Wed, Jun 21, 2017 at 09:24:36AM +0530, Anshuman Khandual wrote:
> On 06/21/2017 05:13 AM, Ram Pai wrote:
> > On Tue, Jun 20, 2017 at 12:54:45PM +0530, Anshuman Khandual wrote:
> >> On 06/17/2017 09:22 AM, Ram Pai wrote:
> >>> Handle Data and Instruction exceptions caused by memory
> >>> protecti
On Wed, Jun 21, 2017 at 11:05:33AM +0530, Anshuman Khandual wrote:
> On 06/21/2017 04:53 AM, Ram Pai wrote:
> > On Tue, Jun 20, 2017 at 03:50:25PM +0530, Anshuman Khandual wrote:
> >> On 06/17/2017 09:22 AM, Ram Pai wrote:
> >>> Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
> >>> in the
Ram Pai writes:
> Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
> in the 4K backed hpte pages. These bits continue to be used
> for 64K backed hpte pages in this patch, but will be freed
> up in the next patch.
>
> The patch does the following change to the 64K PTE format
>
> H_PAGE_B
Ram Pai writes:
> Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
> in the 64K backed hpte pages. This along with the earlier
> patch will entirely free up the four bits from 64K PTE.
>
> This patch does the following change to 64K PTE that is
> backed by 64K hpte.
>
> H_PAGE_F_SECOND w
Ram Pai writes:
> diff --git a/arch/powerpc/mm/hugetlbpage-hash64.c
> b/arch/powerpc/mm/hugetlbpage-hash64.c
> index a84bb44..239ca86 100644
> --- a/arch/powerpc/mm/hugetlbpage-hash64.c
> +++ b/arch/powerpc/mm/hugetlbpage-hash64.c
> @@ -22,6 +22,7 @@ int __hash_page_huge(unsigned long ea,
Ram Pai writes:
>
> +#ifdef CONFIG_PPC64_MEMORY_PROTECTION_KEYS
> +
> /*
> * This file is included by linux/mman.h, so we can't use cacl_vm_prot_bits()
> * here. How important is the optimization?
> */
> -static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,
> -
Add a helper that determines if all the devices contained in a given PE
are all from the same vendor or not. This can be useful in determining
if it's okay to make PE-wide changes that may be suitable for some
devices but not for others.
This is used later in the series.
Signed-off-by: Russell C
On PHB3/POWER8 systems, devices can select between two different sections
of address space, TVE#0 and TVE#1. TVE#0 is intended for 32bit devices
that aren't capable of addressing more than 4GB. Selecting TVE#1 instead,
with the capability of addressing over 4GB, is performed by setting bit 59
of
Ram Pai writes:
> Replace the magic number used to check for DSI exception
> with a meaningful value.
>
> Signed-off-by: Ram Pai
> ---
> arch/powerpc/include/asm/reg.h | 9 -
> arch/powerpc/kernel/exceptions-64s.S | 2 +-
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff
In P9, OCC(On Chip Controller) can be sent commands inband via shared
memory based command response interface. This patch adds a platform
driver to support the OCC command-response interface.
The skiboot patch for the interface is posted here:
https://lists.ozlabs.org/pipermail/skiboot/2017-June/
This patch adds support to get a unique token for async completion
requests. This will be used for creating non-repititive request
handles for consecutive requests in OPAL-OCC command/response
interface.
Signed-off-by: Shilpasri G Bhat
---
- No changes from V3
arch/powerpc/include/asm/opal.h
In P9, OCC (On-Chip-Controller) supports shared memory based
commad-response interface. Within the shared memory there is an OPAL
command buffer and OCC response buffer that can be used to send
inband commands to OCC. This patch adds a platform driver to support
the command/response interface betwe
On Wed, Jun 21, 2017 at 12:55:42PM +0530, Aneesh Kumar K.V wrote:
> Ram Pai writes:
>
> > Replace the magic number used to check for DSI exception
> > with a meaningful value.
> >
> > Signed-off-by: Ram Pai
> > ---
> > arch/powerpc/include/asm/reg.h | 9 -
> > arch/powerpc/kernel/
794320519941&w=2
>
> arch/powerpc/include/asm/thread_info.h | 19 +++
> arch/powerpc/kernel/setup_64.c | 6 +++---
> 2 files changed, 22 insertions(+), 3 deletions(-)
Hi Nicholas,
Thanks for the patch, Verified on next-20170621 and PowerPC bare-metal
boot
On Mittwoch, 21. Juni 2017 03:07:39 CEST Arnaldo Carvalho de Melo wrote:
> Em Thu, Jun 15, 2017 at 10:46:16AM +0200, Milian Wolff escreveu:
> > On Tuesday, June 13, 2017 5:55:09 PM CEST Ravi Bangoria wrote:
> > Just a quick question: Have you guys applied my recent patch:
> >
> > commit 5ea0416f51
On Wed, Jun 21, 2017 at 12:11:32PM +0530, Aneesh Kumar K.V wrote:
> Ram Pai writes:
>
> > Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
> > in the 4K backed hpte pages. These bits continue to be used
> > for 64K backed hpte pages in this patch, but will be freed
> > up in the next pat
Masahiro Yamada writes:
> 2017-06-14 15:45 GMT+09:00 Michael Ellerman :
>>
>> Acked-by: Michael Ellerman
>
> I have not seen it in linux-next yet.
>
> Who will pick it up?
In the original patch you said:
Fix them to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts path from
dtc_cpp_flags.
So I
Michael Bringmann writes:
> powerpc/hotplug: On systems like PowerPC which allow 'hot-add' of CPU
> or memory resources, it may occur that the new resources are to be
> inserted into nodes that were not used for these resources at bootup.
> In the kernel, any node that is used must be defined and
Michael Bringmann writes:
> On Power systems with shared configurations of CPUs and memory, there
> are some issues with association of additional CPUs and memory to nodes
> when hot-adding resources. These patches address some of those problems.
>
> powerpc/hotplug: On systems like PowerPC whic
This patch exports a in-kernel 'library' API which can be called by
other drivers to help interacting with an IBM XSL on a POWER9 system.
The XSL (Translation Service Layer) is a stripped down version of the
PSL (Power Service Layer) used in some cards such as the Mellanox CX5.
Like the PSL, it im
Thiago Jung Bauermann writes:
> Calling arch_update_cpu_topology from a CPU hotplug state machine callback
> hits a deadlock because the function tries to get a read lock on
> cpu_hotplug_lock while the state machine still holds a write lock on it.
>
> Since all callers of arch_update_cpu_topolog
Hi Thomas,
Thomas Besemer writes:
> I'm working on a project that is derived from the Yosemite
> PPC 440EP board. It's a legacy project that was running the
> 2.6.24 Kernel, and network traffic was stalling due to transmission
> halting without an understandable error (in this error condition, t
victora writes:
> Hi Alistair/Jeremy,
>
> I am working on a bug related to 1M hugepage size being registered on
> Linux (Power 8 Baremetal - Garrison).
Wasn't that caused by a firmware bug?
> I was checking dmesg and it seems that 1M page size is coming from
> firmware to Linux.
>
> [0.00
There is code duplicated over all architecture's headers for
futex_atomic_op_inuser. Namely op decoding, access_ok check for uaddr,
and comparison of the result.
Remove this duplication and leave up to the arches only the needed
assembly which is now in arch_futex_atomic_op_inuser.
This effective
Em Wed, Jun 21, 2017 at 10:16:56AM +0200, Milian Wolff escreveu:
> On Mittwoch, 21. Juni 2017 03:07:39 CEST Arnaldo Carvalho de Melo wrote:
> > Hi Millian, can I take this as an Acked-by or Tested-by?
> I have no access to any PowerPC hardware. In principle the code looks
> fine, but that's all I
Hi Christoph,
On 2017-06-20 15:16, Christoph Hellwig wrote:
On Tue, Jun 20, 2017 at 11:04:00PM +1000, Stephen Rothwell wrote:
git://git.linaro.org/people/mszyprowski/linux-dma-mapping.git#dma-mapping-next
Contacts: Marek Szyprowski and Kyungmin Park (cc'd)
I have called your tree dma-mapping-
One of the patches was doubled and sent twice yesterday.
Will update number regardless in future.
On 06/21/2017 04:54 AM, Michael Ellerman wrote:
> Michael Bringmann writes:
>
>> On Power systems with shared configurations of CPUs and memory, there
>> are some issues with association of addition
On Mittwoch, 21. Juni 2017 14:48:29 CEST Arnaldo Carvalho de Melo wrote:
> Em Wed, Jun 21, 2017 at 10:16:56AM +0200, Milian Wolff escreveu:
> > On Mittwoch, 21. Juni 2017 03:07:39 CEST Arnaldo Carvalho de Melo wrote:
> > > Hi Millian, can I take this as an Acked-by or Tested-by?
> >
> > I have no
On 06/21/2017 04:52 AM, Michael Ellerman wrote:
> Michael Bringmann writes:
>
>> powerpc/hotplug: On systems like PowerPC which allow 'hot-add' of CPU
>> or memory resources, it may occur that the new resources are to be
>> inserted into nodes that were not used for these resources at bootup.
>
Em Wed, Jun 21, 2017 at 04:19:11PM +0200, Milian Wolff escreveu:
> On Mittwoch, 21. Juni 2017 14:48:29 CEST Arnaldo Carvalho de Melo wrote:
> > Em Wed, Jun 21, 2017 at 10:16:56AM +0200, Milian Wolff escreveu:
> > > On Mittwoch, 21. Juni 2017 03:07:39 CEST Arnaldo Carvalho de Melo wrote:
> > > > Hi
On 06/21/2017 07:33 AM, Michael Ellerman wrote:
I am working on a bug related to 1M hugepage size being registered on
Linux (Power 8 Baremetal - Garrison).
Wasn't that caused by a firmware bug?
Ben/Stewart, does that ring a bell, something new, intended or not? :- )
Thanks,
I was checking
Hello Mimi,
Thanks for your review, and for queuing the other patches in this series.
Mimi Zohar writes:
> On Wed, 2017-06-07 at 22:49 -0300, Thiago Jung Bauermann wrote:
>> This patch introduces the modsig keyword to the IMA policy syntax to
>> specify that a given hook should expect the file
linux into perf/core
(2017-06-20 10:49:08 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
tags/perf-core-for-mingo-4.13-20170621
for you to fetch changes up to 701516ae3dec801084bc913d21e03fce15c61a0b:
perf script: Fix message bec
From: Paolo Bonzini
Porting PPC to libdw only needs an architecture-specific hook to move
the register state from perf to libdw.
The ARM and x86 architectures already use libdw, and it is useful to
have as much common code for the unwinder as possible. Mark Wielaard
has contributed a frame-base
;perf-core-for-mingo-4.13-20170719' of
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core
> (2017-06-20 10:49:08 +0200)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
> tags/perf-
This is the third in the series of patches to build out an appropriate
kprobes blacklist for powerpc. Since posting the second series (*),
there have been related changes to the code and I have brought that
series forward to account for those changes. As such, all patches from
the second series are
Currently, we assume that the function pointer we receive in
ppc_function_entry() points to a function descriptor. However, this is
not always the case. In particular, assembly symbols without the right
annotation do not have an associated function descriptor. Some of these
symbols are added to the
Commit b48bbb82e2b835 ("powerpc/64s: Don't unbalance the return branch
predictor in __replay_interrupt()") introduced __replay_interrupt_return
symbol with '.L' prefix in hopes of keeping it private. However, due to
the use of LOAD_REG_ADDR(), the assembler kept this symbol visible. Fix
the same by
Convert some of the symbols into private symbols and blacklist
system_call_common() and system_call() from kprobes. We can't take a
trap at parts of these functions as either MSR_RI is unset or the kernel
stack pointer is not yet setup.
Reviewed-by: Masami Hiramatsu
Signed-off-by: Naveen N. Rao
It is actually safe to probe system_call() in entry_64.S, but only till
we unset MSR_RI. To allow this, add a new symbol system_call_exit()
after the mtmsrd and blacklist that. Though the mtmsrd instruction
itself is now whitelisted, we won't be allowed to probe on it as we
don't allow probing on r
Blacklist all functions involved while handling a trap. We:
- convert some of the symbols into private symbols,
- remove the duplicate 'restore' symbol, and
- blacklist most functions involved while handling a trap.
Reviewed-by: Masami Hiramatsu
Signed-off-by: Naveen N. Rao
---
arch/powerpc/ker
We can't take traps with relocation off, so blacklist enter_rtas() and
rtas_return_loc(). However, instead of blacklisting all of enter_rtas(),
introduce a new symbol __enter_rtas from where on we can't take a trap
and blacklist that.
Signed-off-by: Naveen N. Rao
---
arch/powerpc/kernel/entry_64
Two simple updates for kprobes tracer:
- the first patch is a convenience and allows to probe module symbols
as well as any dot symbols (necessary on powerpc64 elfv1) without
having to provide a name for the probepoint.
- the second patch updates the newly added multiple_kprobes.tc test
case
When we derive event names, convert some expected symbols (such as ':'
used to specify module:name and '.' present in some symbols) into
underscores so that the event name is not rejected.
Before this patch:
# echo 'p kobject_example:foo_store' > kprobe_events
trace_kprobe: Failed to alloc
KPROBES_ON_FTRACE is only available on powerpc64le. Update comment to
clarify this.
Also, we should use an offset of 8 to ensure that the probe does not
fall on ftrace location. The current offset of 4 will fall before the
function local entry point and won't fire, while an offset of 12 or 16
will
On Sat, May 27, 2017 at 1:04 AM, Paul Mackerras wrote:
> This converts the powerpc VDSO time update function to use the new
> interface introduced in commit 576094b7f0aa ("time: Introduce new
> GENERIC_TIME_VSYSCALL", 2012-09-11). Where the old interface gave
> us the time as of the last update i
On 06/20/17 23:18, Frank Rowand wrote:
> Hi Rob,
>
> Michael has an issue that means this patch series is not OK in the
> current form. I will work on a v7 to see if I can resolve the
> issue.
>
> -Frank
< snip >
Hi Rob,
The issue is in patch 1. Patches 2 - 4 are small independent patches
th
On Wed, Jun 21, 2017 at 12:24:34PM +0530, Aneesh Kumar K.V wrote:
> Ram Pai writes:
>
>
>
> > diff --git a/arch/powerpc/mm/hugetlbpage-hash64.c
> > b/arch/powerpc/mm/hugetlbpage-hash64.c
> > index a84bb44..239ca86 100644
> > --- a/arch/powerpc/mm/hugetlbpage-hash64.c
> > +++ b/arch/powerpc
On 06/16/2017 11:10 AM, Christoph Hellwig wrote:
Hi all,
for a while we have a generic implementation of the dma mapping routines
that call into per-arch or per-device operations. But right now there
still are various bits in the interfaces where don't clearly operate
on these ops. This seri
Hi Michael -
>
> Thomas Besemer writes:
> > I'm working on a project that is derived from the Yosemite
> > PPC 440EP board. It's a legacy project that was running the
> > 2.6.24 Kernel, and network traffic was stalling due to transmission
> > halting without an understandable error (in this erro
Cc'ing dri-devel.
Dave.
On Tue, 13 Jun 2017, Tejun Heo wrote:
> Cc'ing David Airlie.
>
> This is from drm driver calling in idr_replace() w/ a negative id.
> Probably a silly bug in error handling path?
>
> Thanks.
>
> On Mon, Jun 12, 2017 at 08:10:54PM +0530, Abdul Haleem wrote:
> > Hi,
> >
On Tue, 2017-06-20 at 14:17 -0700, Thomas Besemer wrote:
> I'm working on a project that is derived from the Yosemite
> PPC 440EP board. It's a legacy project that was running the
> 2.6.24 Kernel, and network traffic was stalling due to transmission
> halting without an understandable error (in th
On 06/20, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> __of_attach_node() is not used outside of drivers/of/dynamic.c. Make
> it static and remove it from drivers/of/of_private.h.
>
> Signed-off-by: Frank Rowand
> ---
Reviewed-by: Stephen Boyd
--
Qualcomm Innovation Center, Inc.
Quoting Tejun Heo (2017-06-13 14:58:49)
> Cc'ing David Airlie.
>
> This is from drm driver calling in idr_replace() w/ a negative id.
> Probably a silly bug in error handling path?
No, this is the validation of an invalid userspace handle. The drm ABI
for handles is supposed to be a full u32 rang
adding Ben and Paul.
Hi Michael,
On 06/20/17 21:57, Michael Ellerman wrote:
> Hi Frank,
>
> frowand.l...@gmail.com writes:
>> From: Frank Rowand
>>
>> Remove "phandle", "linux,phandle", and "ibm,phandle" properties from
>> the internal device tree. The phandle will still be in the struct
>> de
Hi all,
On Tue, 13 Jun 2017 09:56:41 -0400 Tejun Heo wrote:
>
> (forwarding to Li w/ full body)
>
> Li, can you please take a look at this?
>
> Thanks.
>
> On Mon, Jun 12, 2017 at 04:53:42PM +0530, Abdul Haleem wrote:
> > Hi,
> >
> > linux-next kernel crashed while running CPU offline and onl
On Wed, 2017-06-21 at 13:36 +0530, Shilpasri G Bhat wrote:
> In P9, OCC (On-Chip-Controller) supports shared memory based
> commad-response interface. Within the shared memory there is an OPAL
> command buffer and OCC response buffer that can be used to send
> inband commands to OCC. This patch add
Michael Ellerman writes:
> Thiago Jung Bauermann writes:
>
>> Calling arch_update_cpu_topology from a CPU hotplug state machine callback
>> hits a deadlock because the function tries to get a read lock on
>> cpu_hotplug_lock while the state machine still holds a write lock on it.
>>
>> Since all
On Wed, 2017-06-21 at 14:45 -0300, Thiago Jung Bauermann wrote:
> Hello Mimi,
>
> Thanks for your review, and for queuing the other patches in this series.
>
> Mimi Zohar writes:
> > On Wed, 2017-06-07 at 22:49 -0300, Thiago Jung Bauermann wrote:
> >> This patch introduces the modsig keyword to
Memory protection keys enable applications to protect its
address space from inadvertent access or corruption from
itself.
The overall idea:
A process allocates a key and associates it with
a address range withinits address space.
The process than can dynamically set read/wri
Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6,
in the 4K backed HPTE pages. These bits continue to be used
for 64K backed HPTE pages in this patch, but will be freed
up in the next patch. The bit numbers are big-endian as
defined in the ISA3.0
The patch does the following change t
Introduce set_hidx_slot() which sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX)
bits at the appropriate location in the PTE of 4K PTE. In the
case of 64K PTE, it sets the bits in the second part of the PTE. Though
the implementation for the former just needs the slot parameter, it does
take some
Introduce get_hidx_gslot() which returns the slot number of the HPTE
in the global hash table.
This function will come in handy as we work towards re-arranging the
PTE bits in the later patches.
Signed-off-by: Ram Pai
---
arch/powerpc/include/asm/book3s/64/hash.h | 3 +++
arch/powerpc/mm/hash_
Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
in the 64K backed HPTE pages. This along with the earlier
patch will entirely free up the four bits from 64K PTE.
The bit numbers are big-endian as defined in the ISA3.0
This patch does the following change to 64K PTE that is
backed by 64K
The H_PAGE_F_SECOND,H_PAGE_F_GIX are not in the 64K main-PTE.
capture these changes in the dump pte report.
Signed-off-by: Ram Pai
---
arch/powerpc/mm/dump_linuxpagetables.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/dump_linuxpagetables.c
b/arch/power
replace redundant code in __hash_page_4K() with helper
functions get_hidx_gslot() and set_hidx_slot()
Signed-off-by: Ram Pai
---
arch/powerpc/mm/hash64_64k.c | 24 ++--
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/mm/hash64_64k.c b/arch/powerpc/
replace redundant code with helper functions
get_hidx_gslot() and set_hidx_slot()
Signed-off-by: Ram Pai
---
arch/powerpc/mm/hash64_4k.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/mm/hash64_4k.c b/arch/powerpc/mm/hash64_4k.c
index 6fa450c..c67
replace redundant code in flush_hash_page() with helper functions
get_hidx_gslot() and set_hidx_slot()
Signed-off-by: Ram Pai
---
arch/powerpc/mm/hash_utils_64.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/ha
Currently there are only 4bits in the vma flags to support 16 keys
on x86. powerpc supports 32 keys, which needs 5bits. This patch
introduces an addition bit in the vma flags.
Signed-off-by: Ram Pai
---
fs/proc/task_mmu.c | 6 +-
include/linux/mm.h | 18 +-
2 files changed,
Currently sys_pkey_create() provides the ability to disable read
and write permission on the key, at creation. powerpc has the
hardware support to disable execute on a pkey as well.This patch
enhances the interface to let disable execute at key creation
time. x86 does not allow this. Henc
x86 does not support disabling execute permissions on a pkey.
Signed-off-by: Ram Pai
---
arch/x86/kernel/fpu/xstate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index c24ac1e..d582631 100644
--- a/arch/x86/kernel/fpu/xstate.
Sys_pkey_alloc() allocates and returns available pkey
Sys_pkey_free() frees up the pkey.
Total 32 keys are supported on powerpc. However pkey 0,1 and 31
are reserved. So effectively we have 29 pkeys.
Each key can be initialized to disable read, write and execute
permissions. On powerpc a key
Store and restore the AMR, IAMR and UMOR register state of the task
before scheduling out and after scheduling in, respectively.
Signed-off-by: Ram Pai
---
arch/powerpc/include/asm/processor.h | 5 +
arch/powerpc/kernel/process.c| 18 ++
2 files changed, 23 insertion
This system call, associates the pkey with PTE of all
pages covering the given address range.
Signed-off-by: Ram Pai
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 22 ++-
arch/powerpc/include/asm/mman.h | 14 -
arch/powerpc/include/asm/pkeys.h | 21 ++-
Map the PTE protection key bits to the HPTE key protection bits,
while creating HPTE entries.
Signed-off-by: Ram Pai
---
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 5 +
arch/powerpc/include/asm/pkeys.h | 7 +++
arch/powerpc/mm/hash_utils_64.c | 5 +
3
Replace the magic number used to check for DSI exception
with a meaningful value.
Signed-off-by: Ram Pai
---
arch/powerpc/include/asm/reg.h | 7 ++-
arch/powerpc/kernel/exceptions-64s.S | 2 +-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.
Handle Data and Instruction exceptions caused by memory
protection-key.
Signed-off-by: Ram Pai
---
arch/powerpc/include/asm/mmu_context.h | 12 +
arch/powerpc/include/asm/pkeys.h | 9
arch/powerpc/include/asm/reg.h | 2 +-
arch/powerpc/mm/fault.c| 20
The value of the AMR register at the time of exception
is made available in gp_regs[PT_AMR] of the siginfo.
This field can be used to reprogram the permission bits of
any valid pkey.
Similarly the value of the pkey, whose protection got violated,
is made available at si_pkey field of the siginfo
Signed-off-by: Ram Pai
---
tools/testing/selftests/vm/Makefile |1 +
tools/testing/selftests/vm/pkey-helpers.h | 219
tools/testing/selftests/vm/protection_keys.c | 1395 +
tools/testing/selftests/x86/Makefile |2 +-
tools/testing/self
Abstracted out the arch specific code into the header file, and
added powerpc specific changes.
a) added 4k-backed hpte, memory allocator, powerpc specific.
b) added three test case where the key is associated after the page is
accessed/allocated/mapped.
c) cleaned up the code to make chec
Since PowerPC and Intel both support memory protection keys, moving
the documenation to arch-neutral directory.
Signed-off-by: Ram Pai
---
Documentation/vm/protection-keys.txt | 85 +++
Documentation/x86/protection-keys.txt | 85 --
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