Hi! Here is my fourth regression report for Linux 4.9. It lists 10
regressions I'm aware of. 6 of them are new; 11 got fixed (wow!)
since the last report -- that was two weeks ago, because I
didn't find any spare time to compile a report last Sunday :-/
As always: Are you aware of any other regre
Hi,
Geoff Levand writes:
> Hi Aneesh,
>
>> --- a/arch/powerpc/platforms/ps3/spu.c
>> +++ b/arch/powerpc/platforms/ps3/spu.c
>> @@ -205,7 +205,7 @@ static void spu_unmap(struct spu *spu)
>> static int __init setup_areas(struct spu *spu)
>> {
>> struct table {char* name; unsigned long addr
Hi Aneesh,
On 11/20/2016 10:03 AM, Aneesh Kumar K.V wrote:
> So I am trying to understand what the PPP bit value should be. I haven't
> studied PS3 enough to figure this out myself. So we use the SLB class
> value of 0 for the kernel and 1 for user. What is the expected PPP bit
> value for the ab
On Sat, Nov 19, 2016 at 11:38:40AM +1100, Balbir Singh wrote:
>
>
> On 18/11/16 18:28, Paul Mackerras wrote:
> > This adapts the KVM-HV hashed page table (HPT) code to read and write
> > HPT entries in the new format defined in Power ISA v3.00 on POWER9
> > machines. The new format moves the B (
On Sat, Nov 19, 2016 at 12:05:21PM +0530, Aneesh Kumar K.V wrote:
> Paul Mackerras writes:
>
> > On Fri, Nov 18, 2016 at 07:57:30PM +0530, Aneesh Kumar K.V wrote:
> >> Paul Mackerras writes:
> >> +
> >> > +/* Global flush of TLBs and partition table caches for this
> >> > lpid */
> >>
On Fri, Nov 18, 2016 at 05:09:26PM +0530, Naveen N. Rao wrote:
> ... rather than through notify_die(), to reduce path taken for handling
> kprobes. Similar to commit 6f6343f53d13 ("kprobes/x86: Call exception
> handlers directly from do_int3/do_debug").
>
> While at it, rename post_kprobe_handler(
This patch series, based on the current powerpc next branch, adds
various things we need in arch/powerpc in order to support KVM on
POWER9.
Michael, could you put these in a topic branch that I can pull?
Paul.
---
arch/powerpc/include/asm/mmu.h | 5
arch/powerpc/include/as
This defines real-mode versions of opal_int_get_xirr(), opal_int_eoi()
and opal_int_set_mfrr(), for use by KVM real-mode code.
It also exports opal_int_set_mfrr() so that the modular part of KVM
can use it to send IPIs.
Signed-off-by: Paul Mackerras
---
arch/powerpc/include/asm/opal.h
These definitions will be needed by KVM.
Signed-off-by: Paul Mackerras
---
arch/powerpc/include/asm/reg.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c491cfe..d2f868a 100644
--- a/arch/powerpc/include/asm/reg.h
++
POWER9 requires the host to set up a partition table, which is a
table in memory indexed by logical partition ID (LPID) which
contains the pointers to page tables and process tables for the
host and each guest.
This factors out the initialization of the partition table into
a single function. Thi
From: Suraj Jitindar Singh
ISA 3.00 adds the logical PVR value 0x0f05, so add a definition for
this.
Define PCR_ARCH_207 to reflect ISA 2.07 compatibility mode in the processor
compatibility register (PCR).
[pau...@ozlabs.org - moved dummy PCR_ARCH_300 value into next patch]
Signed-off-by:
On Mon, Oct 10, 2016 at 11:31:20AM +1100, Daniel Axtens wrote:
> A bunch of KVM functions are only called from assembler.
> Give them prototypes in asm-prototypes.h
> This reduces sparse warnings.
>
> Signed-off-by: Daniel Axtens
Thanks, applied to kvm-ppc-next.
Paul.
On Mon, Oct 17, 2016 at 03:15:50PM +, Wei Yongjun wrote:
> From: Wei Yongjun
>
> Using list_move_tail() instead of list_del() + list_add_tail().
>
> Signed-off-by: Wei Yongjun
Thanks, applied to kvm-ppc-next.
Paul.
On Mon, Oct 10, 2016 at 11:31:19AM +1100, Daniel Axtens wrote:
> Squash a couple of sparse warnings by making things static.
>
> Build tested.
>
> Signed-off-by: Daniel Axtens
Thanks, applied to kvm-ppc-next.
Paul.
Power 9 has In-Memory-Accumulation (IMA) infrastructure which contains
various Performance Monitoring Units (PMUs) at Nest level (these are
on-chip but off-core). These Nest PMU counters are handled by a Nest
IMA microcode. This microcode runs in the OCC (On-Chip Controller)
complex and its purpose
Create new header file "ima-pmu.h" to add the data structures
and macros needed for IMA pmu support.
Cc: Madhavan Srinivasan
Cc: Michael Ellerman
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Anton Blanchard
Cc: Sukadev Bhattiprolu
Cc: Michael Neuling
Cc: Stewart Smith
Cc: Stephane Er
This patch does three things :
- Enables "opal.c" to create a platform device for the IMA interface
according to the appropriate compatibility string.
- Find the reserved-memory region details from the system device tree
and get the base address of HOMER region address for each chip.
- We
Parse device tree to detect IMA units. Traverse through each IMA unit
node to find supported events and corresponding unit/scale files (if any).
Right now, only nest IMA units are supported.
The nest IMA unit event node from device tree will contain the offset in
the reserved memory region to get
Device tree IMA driver code parses the IMA units and their events. It
passes the information to IMA pmu code which is placed in powerpc/perf
as "ima-pmu.c".
This patch creates only event attributes and attribute groups for the
IMA pmus.
Cc: Madhavan Srinivasan
Cc: Michael Ellerman
Cc: Benjamin
Since, the IMA counters' data are periodically fed to a memory location,
the functions to read/update, start/stop, add/del can be generic and can
be used by all IMA PMU units.
This patch adds a set of generic ima pmu related event functions to be
used by each ima pmu unit. Add code to setup forma
Adds cpumask attribute to be used by each IMA pmu. Only one cpu (any
online CPU) from each chip for nest PMUs is designated to read counters.
On CPU hotplug, dying CPU is checked to see whether it is one of the
designated cpus, if yes, next online cpu from the same chip (for nest
units) is designa
On 18/11/16 13:02, kbuild test robot wrote:
> Hi Balbir,
>
> [auto build test ERROR on powerpc/next]
> [also build test ERROR on v4.9-rc5 next-20161117]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day
There is a new bit, LPCR_PECEu0, which controls wakeup from STOP
states on Hypervisor Virtualization Interrupts (which happen to
also be all external interrupts in host or bare metal mode).
It needs to be set or we will miss wakeups.
Signed-off-by: Benjamin Herrenschmidt
---
Paul, I haven't fix
Hi Paul,
[auto build test WARNING on powerpc/next]
[cannot apply to v4.9-rc6 next-20161117]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Paul-Mackerras/powerpc-64-Preparation-for-KVM-support-o
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