Hi Aneesh, On 11/20/2016 10:03 AM, Aneesh Kumar K.V wrote: > So I am trying to understand what the PPP bit value should be. I haven't > studied PS3 enough to figure this out myself. So we use the SLB class > value of 0 for the kernel and 1 for user. What is the expected PPP bit > value for the above ioremap range ? Once we clarify that may be we can figure > out > a way to express that in linux page table and later map that correctly > in hash fault. > > Right now we map PPP bits as below: > > kernel RW = 0b000 -> class 1 /user no access > kernel RO = 0b110 -> class 1 /user no access > USER RW = 0b010 -> class 0/kernel RW > USER RO = 0b011 -> class 1/kernel RO
I don't quite understand what is meant by these PPP bits and how those relate to the documented PTE bits. As for the PS3's spu shadow registers, they are read-only, and only used within the kernel, actually, only within platforms/ps3/spu.c. Here is a test I did that looped varying rflags. ps3_hpte_insert: rflags=0 result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=1 result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=2 result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=3 result=LV1_SUCCESS (0) ps3_hpte_insert: rflags=4 result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=5 result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=6 result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=7 result=LV1_SUCCESS (0) ps3_hpte_insert: rflags=8 result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=9 result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=a result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=b result=LV1_SUCCESS (0) ps3_hpte_insert: rflags=c result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=d result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=e result=LV1_ACCESS_VIOLATION (-5) ps3_hpte_insert: rflags=f result=LV1_SUCCESS (0) Please let me know what other info you need. -Geoff
