From: "Gautham R. Shenoy"
Hi,
In the current implementation, the code for ISA v3.0 stop
implementation has a couple of shortcomings.
a) The code hand-codes the values for ESL,EC,TR,MTL bits of PSSCR and
uses only the RL field from the firmware. While this is not
incorrect, since the hand-
From: "Gautham R. Shenoy"
Currently all the low-power idle states are expected to wake up
at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ
that puts the CPU to an idle state and never returns.
On ISA_300, when the ESL and EC bits in the PSSCR are zero, the
CPU is expected to wa
From: "Gautham R. Shenoy"
The power9_idle_stop method currently takes only the requested stop
level as a parameter and picks up the rest of the PSSCR bits from a
hand-coded macro. This is not a very flexible design, especially when
the firmware has the capability to communicate the psscr value an
On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote:
> change from v2:
> no code change, fix typos, update some comments
>
> change from v1:
> a simplier definition of default vcpu_is_preempted
> skip mahcine type check on ppc, and add config. remove dedicated macro.
>
From: Scott Wood
Sent: Thursday, September 29, 2016 4:03 AM
To: C.H. Zhao
Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org;
z.chen...@gmail.com; Jason Jin
Subject: Re: [v3,4/5] powerpc/pm: support deep sleep feature on T104x
On Tue, 2016-09-27 at 11:05 +, C.H. Zhao wrote
On 09/29/2016 12:10 PM, Peter Zijlstra wrote:
> On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote:
>> change from v2:
>> no code change, fix typos, update some comments
>>
>> change from v1:
>> a simplier definition of default vcpu_is_preempted
>> skip mahcine type check on
On Thu, Sep 29, 2016 at 12:23:19PM +0200, Christian Borntraeger wrote:
> On 09/29/2016 12:10 PM, Peter Zijlstra wrote:
> > On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote:
> >> change from v2:
> >>no code change, fix typos, update some comments
> >>
> >> change from v1:
> >>a sim
On 09/29/2016 12:23 PM, Christian Borntraeger wrote:
> On 09/29/2016 12:10 PM, Peter Zijlstra wrote:
>> On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote:
>>> change from v2:
>>> no code change, fix typos, update some comments
>>>
>>> change from v1:
>>> a simplier definition of de
On 09/29/2016 12:40 PM, Christian Borntraeger wrote:
> On 09/29/2016 12:23 PM, Christian Borntraeger wrote:
>> On 09/29/2016 12:10 PM, Peter Zijlstra wrote:
>>> On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote:
change from v2:
no code change, fix typos, update some comments
>
On Thu, Sep 29, 2016 at 10:38:01AM +0800, Yongji Xie wrote:
> On 2016/9/29 6:42, Bjorn Helgaas wrote:
>
> >On Tue, Sep 13, 2016 at 05:00:33PM +0800, Yongji Xie wrote:
> >>When using resource_alignment kernel parameter, the current
> >>implement reassigns the alignment by changing resources' size
>
On Wed, 2016-28-09 at 04:34:53 UTC, Gavin Shan wrote:
> Function eeh_pe_set_option() is used to apply the requested options
> (enable, disable, unfreeze) in EEH virtualization path. The semantics
> of this function isn't complete until freezing is supported.
>
> This allows to freeze the indicated
On Fri, 2016-24-06 at 06:44:19 UTC, Gavin Shan wrote:
> When issuing PHB reset, OPAL API opal_pci_poll() is called to drive
> the state machine in OPAL forward. However, we needn't always call
> the function under some circumstances like reset deassert.
>
> This avoids calling opal_pci_poll() when
On Tue, 2016-06-09 at 06:27:31 UTC, Balbir Singh wrote:
> When PCI Device pass-through is enabled via VFIO, KVM-PPC will
> pin pages using get_user_pages_fast(). One of the downsides of
> the pinning is that the page could be in CMA region. The CMA
> region is used for other allocations like the ha
On Sun, 2016-25-09 at 07:16:53 UTC, Anton Blanchard wrote:
> From: Anton Blanchard
>
> __kernel_get_syscall_map and __kernel_clock_getres use cmpli to
> check if the passed in pointer is non zero. cmpli maps to a 32 bit
> compare on binutils, so we ignore the top 32 bits.
>
> A simple test case
On Tue, Sep 13, 2016 at 05:00:34PM +0800, Yongji Xie wrote:
> When vfio passthroughs a PCI device of which MMIO BARs are
> smaller than PAGE_SIZE, guest will not handle the mmio
> accesses to the BARs which leads to mmio emulations in host.
>
> This is because vfio will not allow to passthrough on
From: Ravi Bangoria
The user stack dump feature was recently added for powerpc. But there
was no test case available to test it.
This test works same as on other architectures by preparing a stack
frame on the perf test thread and comparing each frame by unwinding it.
$ ./perf test 50
50:
kernel/git/acme/linux into perf/core
(2016-09-23 07:21:38 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
tags/perf-core-for-mingo-20160929
for you to fetch changes up to d18019a53a07e009899ff6b8dc5ec30f249360d9:
perf tests: Add dw
On 09/28, Kees Cook wrote:
>
> This is where the flags are actually built from what's coming in
> through the newly created exported function vm_brk_flags() below. The
> only flag we're acting on is VM_EXEC (passed in from set_brk() above).
> I think do_brk_flags() should mask the valid flags, or w
> -Original Message-
> From: Arvind Yadav [mailto:arvind.yadav...@gmail.com]
> Sent: Wednesday, September 28, 2016 5:45 AM
> To: le...@freescale.com; z...@zh-kernel.org; vinod.k...@intel.com
> Cc: dan.j.willi...@intel.com; linuxppc-dev@lists.ozlabs.org;
> dmaeng...@vger.kernel.org; linux-
Merge tag 'perf-core-for-mingo-20160922' of
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core
> (2016-09-23 07:21:38 +0200)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
> tags/
Mimi Zohar writes:
> The TPM PCRs are only reset on a hard reboot. In order to validate a
> TPM's quote after a soft reboot (eg. kexec -e), the IMA measurement list
> of the running kernel must be saved and then restored on the subsequent
> boot, possibly of a different architecture.
>
> The exi
Thiago Jung Bauermann writes:
> Hello Eric,
>
> Am Dienstag, 20 September 2016, 11:07:29 schrieb Eric W. Biederman:
>> A semi-generic concept called a hand-over buffer seems to be a
>> construction of infrustructure for no actual reason that will just
>> result in confusion. There are lots of th
On Thu, 2016-09-29 at 16:37 -0500, Eric W. Biederman wrote:
> Mimi Zohar writes:
>
> > The TPM PCRs are only reset on a hard reboot. In order to validate a
> > TPM's quote after a soft reboot (eg. kexec -e), the IMA measurement list
> > of the running kernel must be saved and then restored on th
Em Tue, Sep 27, 2016 at 04:18:46PM +0200, Jiri Olsa escreveu:
> On Mon, Sep 26, 2016 at 09:59:54AM -0700, Andi Kleen wrote:
> > On Mon, Sep 26, 2016 at 12:03:43PM -0300, Arnaldo Carvalho de Melo wrote:
> > > Em Mon, Sep 26, 2016 at 10:35:33AM +0200, Jiri Olsa escreveu:
> > > > ping.. is that workin
Am Donnerstag, 29 September 2016, 16:43:08 schrieb Eric W. Biederman:
> Thiago Jung Bauermann writes:
> > Hello Eric,
> >
> > Am Dienstag, 20 September 2016, 11:07:29 schrieb Eric W. Biederman:
> >> A semi-generic concept called a hand-over buffer seems to be a
> >> construction of infrustructure
In current implementation, pcibios_sriov_enable() is used by PPC
PowerNV platform only. In PowerNV specific pcibios_sriov_enable(),
PF's IOV BARs might be updated (shifted) by pci_update_resource().
It means the IOV BARs aren't ready for decoding incoming memory
address until pcibios_sriov_enable()
pci_update_resource() might be called to update (shift) IOV BARs
in PPC PowerNV specific pcibios_sriov_enable() when enabling PF's
SRIOV capability. At that point, the PF have been functional if
the SRIOV is enabled through sysfs entry "sriov_numvfs". The PF's
memory decoding (0x2 in PCI_COMMAND) s
On Wed, Sep 28, 2016 at 11:14:08AM +1000, Gavin Shan wrote:
>On Wed, Sep 28, 2016 at 10:06:44AM +1000, Benjamin Herrenschmidt wrote:
>>On Wed, 2016-09-28 at 09:37 +1000, Gavin Shan wrote:
>>>
>>> Yeah, it's safe to update it with memory decoding on. As the function call
>>> flow I listed in the ch
The fadump code calls vmcore_cleanup() which only exists if
CONFIG_PROC_VMCORE=y. We don't want to depend on CONFIG_PROC_VMCORE,
because it's user selectable, so just wrap the call in an #ifdef.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/fadump.c | 2 ++
1 file changed, 2 insertions
Hi Cyril,
On Wed, Sep 14, 2016 at 03:04:12PM +1000, Cyril Bur wrote:
> On Mon, 2016-09-12 at 15:33 +0800, wei.guo.si...@gmail.com wrote:
> > From: Anshuman Khandual
> >
> > This patch adds ptrace interface test for TM SPR registers. This
> > also adds ptrace interface based helper functions relat
From: Simon Guo
This selftest suite is for PPC register ptrace functionality. It
is also useful for Transaction Memory functionality verification.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
Test Result (All tests pass on both BE and LE)
From: Anshuman Khandual
This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.
Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside th
From: Simon Guo
There are some functions, especially register related, which can
be shared across multiple selftests/powerpc test directories.
This patch creates a new utility directory to store those shared
functionalities, so that the file layout becomes more neat.
Signed-off-by: Simon Guo
-
From: Anshuman Khandual
This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/sel
From: Anshuman Khandual
This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools
From: Anshuman Khandual
This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace
From: Anshuman Khandual
This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c | 169
From: Anshuman Khandual
This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Ma
From: Anshuman Khandual
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/test
From: Anshuman Khandual
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.
Signed-off-by: Anshuman Khandual
Sig
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftest
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c | 185
From: Anshuman Khandual
This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3
From: Anshuman Khandual
This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
1 file
From: Anshuman Khandual
Fixes the following build failure -
cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
for (int i = 0; i < NUM_LOOPS; i++) {
^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your cod
On 2016/9/29 19:54, Bjorn Helgaas wrote:
On Thu, Sep 29, 2016 at 10:38:01AM +0800, Yongji Xie wrote:
On 2016/9/29 6:42, Bjorn Helgaas wrote:
On Tue, Sep 13, 2016 at 05:00:33PM +0800, Yongji Xie wrote:
When using resource_alignment kernel parameter, the current
implement reassigns the alignme
在 2016/9/29 18:10, Peter Zijlstra 写道:
On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote:
change from v2:
no code change, fix typos, update some comments
change from v1:
a simplier definition of default vcpu_is_preempted
skip mahcine type check on ppc, and add
On 2016/9/29 22:00, Bjorn Helgaas wrote:
On Tue, Sep 13, 2016 at 05:00:34PM +0800, Yongji Xie wrote:
When vfio passthroughs a PCI device of which MMIO BARs are
smaller than PAGE_SIZE, guest will not handle the mmio
accesses to the BARs which leads to mmio emulations in host.
This is because vf
在 2016/9/29 18:31, Peter Zijlstra 写道:
On Thu, Sep 29, 2016 at 12:23:19PM +0200, Christian Borntraeger wrote:
On 09/29/2016 12:10 PM, Peter Zijlstra wrote:
On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote:
change from v2:
no code change, fix typos, update some comments
chan
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