In current implementation, pcibios_sriov_enable() is used by PPC
PowerNV platform only. In PowerNV specific pcibios_sriov_enable(),
PF's IOV BARs might be updated (shifted) by pci_update_resource().
It means the IOV BARs aren't ready for decoding incoming memory
address until pcibios_sriov_enable() returns.

This calls pcibios_sriov_enable() earlier before the IOV BARs are
enabled. As the result, the IOV BARs have been configured correctly
when they are enabled.

Signed-off-by: Gavin Shan <gws...@linux.vnet.ibm.com>
Tested-by: Carol Soto <cls...@us.ibm.com>
---
 drivers/pci/iov.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 2194b44..f1343f0 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -303,13 +303,6 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
                        return rc;
        }
 
-       pci_iov_set_numvfs(dev, nr_virtfn);
-       iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
-       pci_cfg_access_lock(dev);
-       pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
-       msleep(100);
-       pci_cfg_access_unlock(dev);
-
        iov->initial_VFs = initial;
        if (nr_virtfn < initial)
                initial = nr_virtfn;
@@ -320,6 +313,13 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
                goto err_pcibios;
        }
 
+       pci_iov_set_numvfs(dev, nr_virtfn);
+       iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
+       pci_cfg_access_lock(dev);
+       pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
+       msleep(100);
+       pci_cfg_access_unlock(dev);
+
        for (i = 0; i < initial; i++) {
                rc = pci_iov_add_virtfn(dev, i, 0);
                if (rc)
-- 
2.1.0

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