From: pan xinhui
__xchg_called_with_bad_pointer() can't tell us what codes use {cmp}xchg
in incorrect way. And no error will be reported until the link stage.
To fix such kinds of issues in a easy way, we use BUILD_BUG() here.
Signed-off-by: pan xinhui
---
arch/powerpc/include/asm/cmpxchg.h |
On Tue, Feb 23, 2016 at 04:45:16PM +0800, Pan Xinhui wrote:
> From: pan xinhui
>
> __xchg_called_with_bad_pointer() can't tell us what codes use {cmp}xchg
> in incorrect way. And no error will be reported until the link stage.
> To fix such kinds of issues in a easy way, we use BUILD_BUG() here.
Paul Mackerras writes:
> On Tue, Feb 23, 2016 at 10:18:05AM +0530, Aneesh Kumar K.V wrote:
>> The difference between 64K and 4K hash fault handling is confusing
>> with respect to when we set _PAGE_HASHPTE in the linux pte.
>> I was trying to find out whether we miss a hpte flush in any
>> scenar
"Aneesh Kumar K.V" writes:
> Hello,
>
> This series mostly consisting of code movement. One new thing added in this
> series
> is to switch book3s 64 to 4 level page table. The changes are done to
> accomodate
> the upcoming new memory model in future powerpc chips. The details of the new
> MMU
On Fri, Feb 12, 2016 at 06:16:40PM +0100, Gerald Schaefer wrote:
> On Fri, 12 Feb 2016 16:57:27 +0100
> Christian Borntraeger wrote:
>
> > > I'm also confused by pmd_none() is equal to !pmd_present() on s390. Hm?
> >
> > Don't know, Gerald or Martin?
>
> The implementation frequently changes de
On Tue, 2016-02-23 at 17:15 +0800, Boqun Feng wrote:
> On Tue, Feb 23, 2016 at 04:45:16PM +0800, Pan Xinhui wrote:
> > From: pan xinhui
> >
> > diff --git a/arch/powerpc/include/asm/cmpxchg.h
> > b/arch/powerpc/include/asm/cmpxchg.h
> > index d1a8d93..20c0a30 100644
> > --- a/arch/powerpc/includ
From: pan xinhui
__xchg_called_with_bad_pointer() can't tell us what codes use {cmp}xchg
in incorrect way. And no error will be reported until the link stage.
To fix such a kind of issues easily, we use BUILD_BUG_ON_MSG() here.
Signed-off-by: pan xinhui
---
change from V1:
use BUILD_BU
From: pan xinhui
__xchg_called_with_bad_pointer() can't tell us what codes use {cmp}xchg
in incorrect way. And no error will be reported until the link stage.
To fix such a kind of issues easily, we use BUILD_BUG_ON_MSG() here.
Signed-off-by: pan xinhui
---
change from V1:
use BUILD_BU
Not able to understand the first code block of follow_page_mask
function. follow_huge_addr function is expected to find the page
struct for the given address if it turns out to be a HugeTLB page
but then when it finds the page we bug on if it had been called
with FOLL_GET flag.
page = foll
On Tue, Feb 23, 2016 at 06:45:05PM +0530, Anshuman Khandual wrote:
> Not able to understand the first code block of follow_page_mask
> function. follow_huge_addr function is expected to find the page
> struct for the given address if it turns out to be a HugeTLB page
> but then when it finds the pa
This series adds support for a cxl card in a powerVM guest.
It requires firmware FW840 and an activation code for cxl (CAPI).
Note that pHyp only claims support for cxlflash, and not generic
support for FPGA CAPI accelerators. cxlflash uses the (slightly
modified) Nallatech card, so the memcopy AF
Move a few functions around to better separate code specific to
bare-metal environment from code which will be commonly used between
guest and bare-metal.
Code specific to bare-metal is meant to be in native.c or pci.c
only. It's basically anything which touches the card p1 registers,
some p2 regi
CXL kernel API was defining the process problem state area during
context initialization, making it possible to map the problem state
area before attaching the context. This won't work on a powerVM
guest. So force the logical behavior, like in userspace: attach first,
then map the problem state are
Rename a few functions, changing the 'cxl_' prefix to either
'cxl_pci_' or 'cxl_native_', to make clear that the implementation is
bare-metal specific.
Those functions will have an equivalent implementation for a guest in
a later patch.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic
The backend API (in cxl.h) lists some low-level functions whose
implementation is different on bare-metal and in a guest. Each
environment implements its own functions, and the common code uses
them through function pointers, defined in cxl_backend_ops
Co-authored-by: Christophe Lombard
Signed-of
The PSL interrupt cannot be multiplexed in a guest, as it is not
supported by the hypervisor. So an interrupt will be allocated
for it for each context. It will still be the first interrupt found in
the first interrupt range, but is treated almost like any other AFU
interrupt when creating/deleting
A few functions are mostly common between bare-metal and guest and
just need minor tuning. To avoid crowding the backend API, introduce a
few 'if' based on the CPU being in HV mode.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian
From: Christophe Lombard
The new of.c file contains code to parse the device tree to find out
about cxl adapters and AFUs.
guest.c implements the guest-specific callbacks for the backend API.
The process element ID is not known until the context is attached, so
we have to separate the context I
The context parameter when calling cxl_irq() should be strongly typed.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/cxl.h | 2 +-
drivers/misc/cxl/irq.c | 3 +--
2 files changed, 2 insertions(+),
From: Christophe Lombard
Move around some functions which will be accessed from the bare-metal
and guest environments.
Code in native.c and pci.c is meant to be bare-metal specific.
Other files contain code which may be shared with guests.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic
From: Christophe Lombard
The hcalls introduced for cxl use a possible new value:
H_STATE (invalid state).
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
arch/powerpc/include/asm/hvcall.h | 1 +
1 file changed, 1 inse
Add new entry point to scan the device tree at boot in a guest,
looking for cxl devices.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/base.c | 25 +
1 file changed, 25 inse
From: Christophe Lombard
Filter out a few adapter parameters which don't make sense in a guest.
Document the changes.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
Documentation/ABI/testing/sysfs-class-cxl | 8 +++
drivers/misc/cxl/
From: Christophe Lombard
The hypervisor calls provide an interface with a coherent platform
facility and function. It matches version 0.16 of the 'PAPR changes'
document.
The following hcalls are supported:
H_ATTACH_CA_PROCESSAttach a process element to a coherent platform
From: Christophe Lombard
Check the AFU state whenever an API is called. The hypervisor may
issue a reset of the adapter when it detects a fault. When it happens,
it launches an error recovery which will either move the AFU to a
permanent failure state, or in the disabled state.
If the AFU is foun
From: Christophe Lombard
To ease debugging, add a few tracepoints around the cxl hcalls.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/hcalls.c | 9 +++
drivers/misc/cxl/trace.h | 193 +++
From: Christophe Lombard
Introduce sub-structures containing the bare-metal specific fields in
the structures describing the adapter (struct cxl) and AFU (struct
cxl_afu).
Update all their references.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lomb
Like on bare-metal, the cxl driver creates a virtual PHB and a pci
device for the AFU. The configuration space of the device is mapped to
the configuration record of the AFU.
Reuse the code defined in afu_cr_read8|16|32() when reading the
configuration space of the AFU device.
Even though the (vi
From: Christophe Lombard
The new flash.c file contains the logic to flash a new image on the
adapter, through a hcall. It is an iterative process, with chunks of
data of 1M at a time. There are also 2 phases: write and verify. The
flash operation itself is driven from a user-land tool.
Once flash
This patch provides VIRT_CPU_ACCOUTING to PPC32 architecture.
PPC32 doesn't have the PACA structure, so we use the task_info
structure to store the accounting data.
In order to reuse on PPC32 the PPC64 functions, all u64 data has
been replaced by 'unsigned long' so that it is u32 on PPC32 and
u64
On Wed, Feb 17, 2016 at 02:08:41PM +1100, Michael Ellerman wrote:
>
> That stub uses r2 to find the location of itself, but it only works if r2
> holds
> the TOC for scsi_mod.ko. In this case r2 still contains ibmvscsi.ko's TOC.
Here's my solution, a bit rough still. This replaces the module_64.
On Tue, Feb 23, 2016 at 2:32 AM, Kirill A. Shutemov
wrote:
>
> I still worry about pmd_present(). It looks wrong to me. I wounder if
> patch below makes a difference.
Let's hope that's it, but in the meantime I do want to start the
discussion about what to do if it isn't. We're at rc5, and 4.5 is
On Tue, 23 Feb 2016 13:32:21 +0300
"Kirill A. Shutemov" wrote:
> On Fri, Feb 12, 2016 at 06:16:40PM +0100, Gerald Schaefer wrote:
> > On Fri, 12 Feb 2016 16:57:27 +0100
> > Christian Borntraeger wrote:
> >
> > > > I'm also confused by pmd_none() is equal to !pmd_present() on s390. Hm?
> > >
>
[adding Steve, since he worked on THP for 32-bit ARM]
On Tue, Feb 23, 2016 at 07:19:07PM +0100, Gerald Schaefer wrote:
> On Tue, 23 Feb 2016 13:32:21 +0300
> "Kirill A. Shutemov" wrote:
> > The theory is that the splitting bit effetely masked bogus pmd_present():
> > we had pmd_trans_splitting()
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
From: Christophe Lombard
Move around some functions which will be accessed from the bare-metal
and guest environments.
Code in native.c and pci.c is meant to be bare-metal specific.
Other files contain cod
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
Move a few functions around to better separate code specific to
bare-metal environment from code which will be commonly used between
guest and bare-metal.
Code specific to bare-metal is meant to be in nativ
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
CXL kernel API was defining the process problem state area during
context initialization, making it possible to map the problem state
area before attaching the context. This won't work on a powerVM
guest. S
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
The backend API (in cxl.h) lists some low-level functions whose
implementation is different on bare-metal and in a guest. Each
environment implements its own functions, and the common code uses
them through
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
Rename a few functions, changing the 'cxl_' prefix to either
'cxl_pci_' or 'cxl_native_', to make clear that the implementation is
bare-metal specific.
Those functions will have an equivalent implementatio
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
A few functions are mostly common between bare-metal and guest and
just need minor tuning. To avoid crowding the backend API, introduce a
few 'if' based on the CPU being in HV mode.
Co-authored-by: Christop
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
The context parameter when calling cxl_irq() should be strongly typed.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
driv
Fred: Thanks for revising the commit message.
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
The PSL interrupt cannot be multiplexed in a guest, as it is not
supported by the hypervisor. So an interrupt will be allocated
for it for each context. It will
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
From: Christophe Lombard
The hcalls introduced for cxl use a possible new value:
H_STATE (invalid state).
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Fred: Thanks for correcting those spellings.
Reviewed-by: Manoj Kumar
---
Manoj Kumar
On 2/23/2016 10:21 AM, Frederic Barrat wrote:
From: Christophe Lombard
The hypervisor calls provide an interface with a coherent platform
facility and function. It matches version 0.16 of the 'PAPR change
On Tue, 2016-02-23 at 17:21 +0100, Frederic Barrat wrote:
> From: Christophe Lombard
>
> The hcalls introduced for cxl use a possible new value:
> H_STATE (invalid state).
FWIW, this patch subject be powerpc: not cxl:
> Co-authored-by: Frederic Barrat
> Signed-off-by: Frederic Barrat
> Sign
On Wed, 2016-02-24 at 02:38 +0800, kbuild test robot wrote:
> Hi Christophe,
>
> [auto build test ERROR on powerpc/next]
> [also build test ERROR on v4.5-rc5 next-20160223]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improving the system]
Le 23/02/2016 20:28, Scott Wood a écrit :
On Wed, 2016-02-24 at 02:38 +0800, kbuild test robot wrote:
Hi Christophe,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.5-rc5 next-20160223]
[if your patch is applied to the wrong git tree, please drop us a note to
help
On Tue, 2016-02-23 at 20:32 +0100, christophe leroy wrote:
>
> Le 23/02/2016 20:28, Scott Wood a écrit :
> > On Wed, 2016-02-24 at 02:38 +0800, kbuild test robot wrote:
> > > Hi Christophe,
> > >
> > > [auto build test ERROR on powerpc/next]
> > >
On Tue, Feb 23, 2016 at 07:19:07PM +0100, Gerald Schaefer wrote:
> I'll check with Martin, maybe it is actually trivial, then we can
> do a quick test it to rule that one out.
Oh. I found a bug in __split_huge_pmd_locked(). Although, not sure if it's
_the_ bug.
pmdp_invalidate() is called for the
Hi Christophe,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.5-rc5 next-20160223]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Christophe-Leroy/powerpc32-provide
On Thu, Feb 18, 2016 at 09:06:06AM +0800, Zhao Qiang wrote:
> Add IC, SI and SIRAM document of QE to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2
> - Add interrupt-controller in Required properties
> - delete addres
On Tue, 2016-02-23 at 14:15 -0600, Rob Herring wrote:
> On Thu, Feb 18, 2016 at 09:06:06AM +0800, Zhao Qiang wrote:
> > Add IC, SI and SIRAM document of QE to
> > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> >
> > Signed-off-by: Zhao Qiang
> > ---
> > Changes for v2
> > - Add
On Thu, Feb 18, 2016 at 09:06:07AM +0800, Zhao Qiang wrote:
> Add ucc hdlc document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Not a very useful description.
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2
> - use ucc-hdlc instead of ucc_hdlc
> - add mor
On Tue, Feb 23, 2016 at 10:33:45PM +0300, Kirill A. Shutemov wrote:
> On Tue, Feb 23, 2016 at 07:19:07PM +0100, Gerald Schaefer wrote:
> > I'll check with Martin, maybe it is actually trivial, then we can
> > do a quick test it to rule that one out.
>
> Oh. I found a bug in __split_huge_pmd_locked
On Thu, Feb 18, 2016 at 09:06:08AM +0800, Zhao Qiang wrote:
> Add uqe_serial document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2
> - modify tx/rx-clock-name specification
>
> .../bindings/powerpc/fsl/cpm_qe
On Thu, Feb 18, 2016 at 09:06:09AM +0800, Zhao Qiang wrote:
> cpm_qe is supported on both powerpc and arm.
> and the QE code has been moved from arch/powerpc into
> drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
> to soc/fsl
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2
> -
On Tue, 2016-02-23 at 14:23 -0600, Rob Herring wrote:
> On Thu, Feb 18, 2016 at 09:06:08AM +0800, Zhao Qiang wrote:
> > Add uqe_serial document to
> > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> >
> > Signed-off-by: Zhao Qiang
> > ---
> > Changes for v2
> > - modify
On Tue, 23 Feb 2016, Kirill A. Shutemov wrote:
> On Tue, Feb 23, 2016 at 06:45:05PM +0530, Anshuman Khandual wrote:
> > Not able to understand the first code block of follow_page_mask
> > function. follow_huge_addr function is expected to find the page
> > struct for the given address if it turns o
This change adds a defconfig for the non-virtualised power platforms,
based on pseries_defconfig, but without pseries, and little-endian,
and no OF trampoline.
Signed-off-by: Jeremy Kerr
---
arch/powerpc/configs/powernv_defconfig | 307 +
1 file changed, 307 inser
Most current OpenPOWER platforms have an AST BMC, so add graphics
support via the AST DRM driver.
Signed-off-by: Jeremy Kerr
---
arch/powerpc/configs/powernv_defconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/configs/powernv_defconfig
b/arch/powerpc/c
There are a few firmware-provided interfaces for OpenPOWER platforms:
the PRD infrastructure, IPMI support, and MTD access to the PNOR flash.
This change adds these to powernv_defconfig
Signed-off-by: Jeremy Kerr
---
arch/powerpc/configs/powernv_defconfig | 6 ++
1 file changed, 6 insertion
On Wed, Feb 24, 2016 at 12:25 PM, Jeremy Kerr wrote:
> This change adds a defconfig for the non-virtualised power platforms,
> based on pseries_defconfig, but without pseries, and little-endian,
> and no OF trampoline.
Good idea!
We could drop the parallel port and the Intel ethernet drivers, bu
Hi Jeremy,
Jeremy Kerr writes:
> +CONFIG_RTC_CLASS=y
> +CONFIG_RTC_DRV_GENERIC=y
Would recommend using CONFIG_RTC_DRV_OPAL=y instead of using the generic
RTC driver.
Cheers,
~ Vaibhav
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On 24/02/16 04:00, Torsten Duwe wrote:
> On Wed, Feb 17, 2016 at 02:08:41PM +1100, Michael Ellerman wrote:
>> That stub uses r2 to find the location of itself, but it only works if r2
>> holds
>> the TOC for scsi_mod.ko. In this case r2 still contains ibmvscsi.ko's TOC.
> Here's my solution, a b
We need to remove the SQUASH_TOC_SAVE_INSNS bits as well, now that the
ppc64_profile_stub_insns does not save r2
> Looks like we are getting closer to the final solution Thanks, Balbir
With the SQUASH_TOC_SAVE_INSNS removed, ftrace function seems to work, but
function_graph is broken. I've no
* Torsten Duwe [2016-02-23 18:00:17]:
> On Wed, Feb 17, 2016 at 02:08:41PM +1100, Michael Ellerman wrote:
> >
> > That stub uses r2 to find the location of itself, but it only works if r2
> > holds
> > the TOC for scsi_mod.ko. In this case r2 still contains ibmvscsi.ko's TOC.
>
> Here's my sol
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