> > > On Wed, 2013-09-11 at 20:31 -0500, Tang Yuantian-B29983 wrote:
> > > > > -Original Message-
> > > > > From: Wood Scott-B07421
> > > > > Sent: 2013年9月12日 星期四 9:10
> > > > > To: Tang Yuantian-B29983
> > > > > Cc: ga...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org;
> > > > > device
Hi Scott,
Thanks for your comments.
please see my replies in line.
On 09/17/2013 08:05 AM, Scott Wood wrote:
On Thu, 2013-09-12 at 18:07 +0800, Minghuan Lian wrote:
The Freescale's Layerscape series processors will use the same PCI
controller but change cores from PowerPC to ARM. This patch i
Since the CPU is generating an exception when accessing unaligned word, and
as this exception is not yet handled when running prom_init, data should be
copied from the architecture vector byte per byte.
Signed-off-by: Laurent Dufour
---
arch/powerpc/kernel/prom_init.c | 28
Scott,
Sorry for the delayed response.
Please fine my comments.
Thanks,
Mingkai
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, September 12, 2013 9:16 AM
> To: Hu Mingkai-B21284
> Cc: Wood Scott-B07421; linuxppc-...@ozlabs.org
> Subject: Re: [PATCH] powerpc/85xx: DTS - re
On Mon, Sep 16, 2013 at 12:22:11PM +0200, Alexander Gordeev wrote:
> On Mon, Sep 09, 2013 at 05:20:44PM +0200, Alexander Gordeev wrote:
> > On Fri, Sep 06, 2013 at 05:32:05PM -0600, Bjorn Helgaas wrote:
> > > I propose that you rework it that way, and at least find out what
> > > (if anything) woul
Activating CONFIG_PIN_TLB is supposed to pin the IMMR and the first three
8Mbytes pages. But the setting of the MD_CTR was missing so as the index is
decremented every DTLB update, the pinning of the third 8Mbytes page was
overwriting the DTLB entry for IMMR. At the same time, the last entry writte
Le 16/09/2013 23:02, Scott Wood a écrit :
On Fri, 2013-09-13 at 07:04 +0200, leroy christophe wrote:
Le 12/09/2013 20:44, Scott Wood a écrit :
On Thu, 2013-09-12 at 20:25 +0200, Christophe Leroy wrote:
This is a reorganisation of the setup of the TLB at kernel startup, in order
to handle the
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, September 17, 2013 5:09 AM
> To: Wang Dongsheng-B40534
> Cc: Wood Scott-B07421; ga...@kernel.crashing.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH v3 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec i
P1010RDB-PA and P1010RDB-PB boards use different external PHY
interrupt signals.
So make a new dts for P1010RDB-PB.
Signed-off-by: Shengzhou Liu
Signed-off-by: Zhao Qiang
---
Changes for v2:
-Remove phy interrupts for p1010rdb-pb
Changes for v3
-Maintain the phy interrupts p1010r
P1010RDB-PA and P1010RDB-PB boards use different external PHY
interrupt signals.
So make a new dts for P1010RDB-PB.
Signed-off-by: Shengzhou Liu
Signed-off-by: Zhao Qiang
---
Changes for v2:
-Remove phy interrupts for p1010rdb-pb
Changes for v3:
-Maintain the phy interrupts p1010
On 09/14/2013 06:19 AM, Sukadev Bhattiprolu wrote:
> We use helpers like GENERIC_EVENT_ATTR() to list the generic events in
> sysfs. To avoid name collisions, GENERIC_EVENT_ATTR() requires the perf
> event macros to start with PME.
We got all the raw event codes covered for P7 with the help of
po
> -Original Message-
> From: Zhao Qiang-B45475
> Sent: Wednesday, September 18, 2013 12:55 PM
> To: linuxppc-dev@lists.ozlabs.org
> Cc: Zhao Qiang-B45475; Liu Shengzhou-B36685
> Subject: [PATCH v3] powerpc/p1010rdb-pb:make a new dts for p1010rdb-pb
>
> P1010RDB-PA and P1010RDB-PB boards
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