This bug appear when a second PSC based driver appends an interrupt
routine to the FIFO controller shared interrupt (like spi-mpc512x-psc).
When reboot, uart_shutdown() remove the serial console interrupt handler
while spi-mpc512x-psc isr is still activate and cause the following kernel
panic:
The
On Tuesday 11 June 2013 12:28:59 Scott Wood wrote:
> On 06/11/2013 12:09:42 PM, Michael Guntsche wrote:
> > On Tue, Jun 11, 2013 at 7:00 PM, Scott Wood
> >
> > wrote:
> > > On 06/11/2013 02:24:28 AM, Rojhalat Ibrahim wrote:
> > >> On Monday 10 June 2013 17:52:33 Scott Wood wrote:
> > >> > On 06/1
CPUFreq driver of this platform uses APIs from freq_table.c and so must select
CPU_FREQ_TABLE.
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Viresh Kumar
---
drivers/cpufreq/Kconfig.powerpc | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/Kconfig.powerpc b/drivers/cpufreq/K
On Wed, 12 Jun 2013, Benjamin Herrenschmidt wrote:
> The OF code uses irqsafe locks everywhere except in a handful of functions
> for no obvious reasons. Since the conversion from the old rwlocks, this
> now triggers lockdep warnings when used at interrupt time. At least one
> driver (ibmvscsi) se
On Wed, 2013-06-12 at 10:25 +0200, Thomas Gleixner wrote:
> On Wed, 12 Jun 2013, Benjamin Herrenschmidt wrote:
>
> > The OF code uses irqsafe locks everywhere except in a handful of functions
> > for no obvious reasons. Since the conversion from the old rwlocks, this
> > now triggers lockdep warni
On Wed, 12 Jun 2013 10:25:56 +0200 (CEST), Thomas Gleixner
wrote:
> On Wed, 12 Jun 2013, Benjamin Herrenschmidt wrote:
>
> > The OF code uses irqsafe locks everywhere except in a handful of functions
> > for no obvious reasons. Since the conversion from the old rwlocks, this
> > now triggers loc
From: Grant Likely
Date: Wed, 12 Jun 2013 10:06:12 +0100
> On Wed, 12 Jun 2013 10:25:56 +0200 (CEST), Thomas Gleixner
> wrote:
>> On Wed, 12 Jun 2013, Benjamin Herrenschmidt wrote:
>>
>> > The OF code uses irqsafe locks everywhere except in a handful of functions
>> > for no obvious reasons. S
Hello,
First of all I want to mention that I am quite new on the development at
this level on the mpc5200 based boards. It might be that I'll ask dumb or
wrong questions so I want to apologize for this.
I am using a custom board based on icecube 5200 reference card but with an
additiona
From: "Aneesh Kumar K.V"
Book3E uses the hugepd at PMD level and don't encode pte directly
at the pmd level. So it will find the lower bits of pmd set
and the pmd_bad check throws error. Infact the current code
will never take the free_hugepd_range call at all because it will
clear the pmd if it
On Wed, 12 Jun 2013 15:29:38 +1000, Benjamin Herrenschmidt
wrote:
> On Wed, 2013-05-22 at 07:26 -0500, Rob Herring wrote:
> > > git://sources.calxeda.com/kernel/linux.git of-platform-removal
> >
> > Ben,
> >
> > Did you have a chance to test this? I want to get this into -next.
>
> I tested th
Oded Gabbay wrote:
Note: This patch may break MDIO functionallity of some old Freescale's SoC
until Freescale will fix their device tree files. Basically, every device tree
which contains an mdio device that is compatible to "fsl,gianfar-tbi" should be
examined.
I haven't had a chance to review
Oded Gabbay wrote:
Note: This patch may break MDIO functionallity of some old
Freescale's SoC
until Freescale will fix their device tree files. Basically, every
device tree
which contains an mdio device that is compatible to "fsl,gianfar-tbi"
should be
examined.
On 06/12/2013 04:04 PM, Timur
This patch fixes a bug in the fsl_pq_mdio.c module and in relevant device-tree
files regarding the correct offset of the tbipa register in the eTSEC
controller in some of Freescale's PQ3 and QorIQ SoC.
The bug happens when the mdio in the device tree is configured to be compatible
to "fsl,gianfar-t
On 13.05.2013, at 04:00, Tiejun Chen wrote:
> We can only use CONFIG_PPC_DOORBELL to control whether
> the doorbell exception should be enabled.
>
> Signed-off-by: Tiejun Chen
Thanks, applied to kvm-ppc-queue with a slightly changed patch description:
KVM: PPC: Guard doorbell exception wi
On 06/12/2013 02:47 PM, Oded Gabbay wrote:
> This patch fixes a bug in the fsl_pq_mdio.c module and in relevant device-tree
> files regarding the correct offset of the tbipa register in the eTSEC
> controller in some of Freescale's PQ3 and QorIQ SoC.
> The bug happens when the mdio in the device tr
From: Stephen Warren
Previously, the #line parsing regex ended with ({WS}+[0-9]+)?. The {WS}
could match line-break characters. If the #line directive did not contain
the optional flags field at the end, this could cause any integer data on
the next line to be consumed as part of the #line direct
On 06/12/2013 10:08:29 AM, Sebastian Andrzej Siewior wrote:
On 06/12/2013 02:47 PM, Oded Gabbay wrote:
> This patch fixes a bug in the fsl_pq_mdio.c module and in relevant
device-tree
> files regarding the correct offset of the tbipa register in the
eTSEC
> controller in some of Freescale's
On Wed, Jun 12, 2013 at 04:00:04PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> Book3E uses the hugepd at PMD level and don't encode pte directly
> at the pmd level. So it will find the lower bits of pmd set
> and the pmd_bad check throws error. Infact the current code
> will nev
On 06/12/2013 03:19:30 AM, Rojhalat Ibrahim wrote:
On Tuesday 11 June 2013 12:28:59 Scott Wood wrote:
> Yes, I figured it was non-PCIe because the code change that you said
> helped was on the non-PCIe branch of the if/else. Generally it's
good
> to explicitly mention the chip you're using, t
On 06/09/2013 05:37:39 AM, Wang Dongsheng wrote:
/* these macros rely on the save area being
* pointed to by r11 */
+
+#define SAVE_SPR(register) \
+ mfspr r0,SPRN_##register ;\
+ std r0,SL_##register(r11)
+#define RESTORE_SPR(register) \
+ ld
On Power8 we can freeze PMC5 and 6 if we're not using them. Normally they
run all the time.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/reg.h |1 +
arch/powerpc/perf/power8-pmu.c |4
2 files changed, 5 insertions(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arc
On Tue, Jun 11, 2013 at 06:13:55PM +1000, Benjamin Herrenschmidt wrote:
>On Wed, 2013-06-05 at 15:34 +0800, Gavin Shan wrote:
>
>> diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
>> index d1fd5d4..68ac408 100644
>> --- a/arch/powerpc/include/asm/eeh.h
>> +++ b/arch/powe
On Wed, Jun 12, 2013 at 02:19:25PM +1000, Benjamin Herrenschmidt wrote:
>On Wed, 2013-06-12 at 11:32 +0800, Gavin Shan wrote:
>
>> >Same comments about "state" which is really "delay" and is probably
>> >not necessary at all ...
>> >
>>
>> We need the "delay" in future to support PowerKVM guest. I
On Thu, 2013-06-13 at 12:26 +0800, Gavin Shan wrote:
> So the answer is we can do it by makeing the assumption that f/w won't
> return valid delay and we're going to use default value (1 second) for
> guest on powernv or phyp, or we keep the delay here.
Ok, at the very least then change the name t
On 06/13/2013 06:46 AM, Michael Ellerman wrote:
> On Power8 we can freeze PMC5 and 6 if we're not using them. Normally they
> run all the time.
>
> Signed-off-by: Michael Ellerman
> ---
> arch/powerpc/include/asm/reg.h |1 +
> arch/powerpc/perf/power8-pmu.c |4
> 2 files changed, 5
On 06/12/2013 09:31 PM, Scott Wood wrote:
On 06/12/2013 10:08:29 AM, Sebastian Andrzej Siewior wrote:
On 06/12/2013 02:47 PM, Oded Gabbay wrote:
> This patch fixes a bug in the fsl_pq_mdio.c module and in relevant
device-tree
> files regarding the correct offset of the tbipa register in the eT
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