On Thu, 2012-08-09 at 18:13 -0500, Ashley Lai wrote:
> This patch retrieves the event log data from the device tree
> during file open. The event log data will then displayed through
> securityfs.
Hi Ashley,
Comments inline ..
> diff --git a/drivers/char/tpm/Makefile b/drivers/char/tpm/Makefile
Sicne a few days, powerpc allmodconfig fails with:
ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
make[2]: *** [__modpost] Error 1
make[1]: *** [modules] Error 2
http://kisskb.ellerman.id.au/kisskb/buildresult/6883300/
Gr{oetje,eeting}s,
Geert
-
We unified the Freescale pci/pcie initialization by changing the fsl_pci
to a platform driver. In previous PCI code architecture the initialization
routine is called at board_setup_arch stage. Now the initialization is done
in probe function which is architectural better. Also It's convenient for
a
> -Original Message-
> From: Gala Kumar-B11780
> Sent: Thursday, August 09, 2012 3:04 AM
> To: Wood Scott-B07421
> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie
> initialization co
On Fri, 2012-08-10 at 09:43 +0200, Geert Uytterhoeven wrote:
> Sicne a few days, powerpc allmodconfig fails with:
>
> ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
> make[2]: *** [__modpost] Error 1
> make[1]: *** [modules] Error 2
>
> http://kisskb.ellerman.id.au/kisskb
On Fri, 2012-08-10 at 18:58 +1000, Michael Ellerman wrote:
> On Fri, 2012-08-10 at 09:43 +0200, Geert Uytterhoeven wrote:
> > Sicne a few days, powerpc allmodconfig fails with:
> >
> > ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
> > make[2]: *** [__modpost] Error 1
> >
On Tue, Aug 07, 2012 at 04:43:25PM +0800, Zhao Chenhui wrote:
> The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
> Therefore, the related functions should be exported.
>
> Signed-off-by: Zhao Chenhui
> ---
> include/linux/cpu.h |4
> 1 files changed, 4 insertio
Some 85xx silicons like MPC8536 and P1022 have a JOG feature, which provides
a dynamic mechanism to lower or raise the CPU core clock at runtime.
This patch adds the support to change CPU frequency using the standard
cpufreq interface. The ratio CORE to CCB can be 1:1(except MPC8536), 3:2,
2:1, 5:
Move mmc_delay() from drivers/mmc/core/core.h to
include/linux/mmc/core.h. So when other functions
call it with include syntax using
of absolute path rather than "../core/core.h" of
relative path.
Signed-off-by: Chunhe Lan
Signed-off-by: Kumar Gala
Cc: Chris Ball
---
drivers/mmc/core/core.h
The mmc_delay() is a wrapper function for mdelay() and msleep().
o mdelay() -- block the system when busy-waiting.
o msleep() -- suspend the currently running task to enable CPU
to process other tasks, so it is non-blocking
regarding the whole system.
W
On Thursday 09 August 2012, Ian Molton wrote:
> > I think showing one
> > parent device with children at address 0, 1 and 2 is ok.
> Is it acceptable for the child devices to directly access the
> parents register space? because there would be no other
> way for that to work.
Yes, I see no proble
Add the missing usb controller version info and port0, which is
required during setup usb phy.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
when missing USB PHY clock, kernel booting up will hang during USB
initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
CPU hanging in this case.
Signed-off-by: Shengzhou Liu
---
drivers/usb/host/ehci-fsl.c | 63 ++
drivers/usb/host/ehci-fsl
On Aug 2, 2012, at 5:04 AM, Zhao Chenhui wrote:
> On Sat, Jul 28, 2012 at 08:20:31AM +1000, Benjamin Herrenschmidt wrote:
>> On Fri, 2012-07-27 at 16:58 -0500, Kumar Gala wrote:
>>> On Jul 20, 2012, at 7:47 AM, Zhao Chenhui wrote:
>>>
During suspend, all interrupts including IPI will be dis
On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:
> Add the missing usb controller version info and port0, which is
> required during setup usb phy.
>
> Signed-off-by: Shengzhou Liu
> ---
> arch/powerpc/boot/dts/fsl/p4080si-post.dtsi |7 +++
> 1 files changed, 7 insertions(+), 0 deletion
On Aug 7, 2012, at 4:12 AM, Zhao Chenhui wrote:
> Signed-off-by: Zhao Chenhui
> ---
> Replace this patch "mpc85xx_defconfig: add IDE support for MPC85xxCDS".
>
> arch/powerpc/configs/mpc85xx_defconfig |1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
applied to merge
- k
___
On Aug 7, 2012, at 11:06 PM, Varun Sethi wrote:
> All SOC device error interrupts are muxed and delivered to the core
> as a single MPIC error interrupt. Currently all the device drivers
> requiring access to device errors have to register for the MPIC error
> interrupt as a shared interrupt.
>
On Aug 3, 2012, at 5:14 AM, Jia Hongtao wrote:
> Remove the dependency on PCI initialization for SWIOTLB initialization.
> So that PCI can be initialized at proper time.
>
> SWIOTLB is partly determined by PCI inbound/outbound map which is assigned
> in PCI initialization. But swiotlb_init() sho
On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:
> power-isa-version and power-isa-* are cpu node general properties defined in
> ePAPR.
>
> If the power-isa-version property exists, then for each category from the
> Categories section of Book I of the Power ISA version indicated, the
> existenc
On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:
> power-isa-version and power-isa-* are cpu node general properties defined in
> ePAPR.
>
> If the power-isa-version property exists, then for each category from the
> Categories section of Book I of the Power ISA version indicated, the
> existenc
On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:
> power-isa-version and power-isa-* are cpu node general properties defined in
> ePAPR.
>
> If the power-isa-version property exists, then for each category from the
> Categories section of Book I of the Power ISA version indicated, the
> existenc
On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:
> power-isa-version and power-isa-* are cpu node general properties defined in
> ePAPR.
>
> If the power-isa-version property exists, then for each category from the
> Categories section of Book I of the Power ISA version indicated, the
> existenc
Ben,
Two updates from last week (one dts bug fix, one minor defconfig update)
- k
The following changes since commit 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee:
Linux 3.6-rc1 (2012-08-02 16:38:10 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/ga
On Aug 10, 2012, at 3:19 AM, Jia Hongtao wrote:
> We unified the Freescale pci/pcie initialization by changing the fsl_pci
> to a platform driver. In previous PCI code architecture the initialization
> routine is called at board_setup_arch stage. Now the initialization is done
> in probe function
On Aug 10, 2012, at 3:19 AM, Jia Hongtao wrote:
> We unified the Freescale pci/pcie initialization by changing the fsl_pci
> to a platform driver. In previous PCI code architecture the initialization
> routine is called at board_setup_arch stage. Now the initialization is done
> in probe function
On Friday 10 August 2012, Chunhe Lan wrote:
> +static inline void mmc_delay(unsigned int ms)
> +{
> + if (ms < 1000 / HZ) {
> + cond_resched();
> + mdelay(ms);
> + } else {
> + msleep(ms);
> + }
> +}
I would actually question the point in this funct
On Aug 10, 2012, at 12:53 AM,
wrote:
> From: Wang Dongsheng
>
> Add a description of the OPEN-PIC global timer in the OPEN-PIC document.
>
> Moidfy mpic-timer document. 1.Add a TFRR register region. This register
> is written by software to report the clocking frequency of the PIC timers.
>
On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:
> when missing USB PHY clock, kernel booting up will hang during USB
> initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
> CPU hanging in this case.
>
> Signed-off-by: Shengzhou Liu
> ---
> drivers/usb/host/ehci-fsl.c | 63
On 08/10/2012 03:47 AM, Jia Hongtao-B38951 wrote:
>
>
>> -Original Message-
>> From: Gala Kumar-B11780
>> Sent: Thursday, August 09, 2012 3:04 AM
>> To: Wood Scott-B07421
>> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc-
>> d...@lists.ozlabs.org
>> Subject: Re: [PATC
On 08/10/2012 04:00 AM, Michael Ellerman wrote:
> On Fri, 2012-08-10 at 18:58 +1000, Michael Ellerman wrote:
>> On Fri, 2012-08-10 at 09:43 +0200, Geert Uytterhoeven wrote:
>>> Sicne a few days, powerpc allmodconfig fails with:
>>>
>>> ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] un
On 08/10/2012 12:53 AM, dongsheng.w...@freescale.com wrote:
> From: Wang Dongsheng
>
> Add a description of the OPEN-PIC global timer in the OPEN-PIC document.
>
> Moidfy mpic-timer document. 1.Add a TFRR register region. This register
> is written by software to report the clocking frequency of
On 08/10/2012 12:54 AM, dongsheng.w...@freescale.com wrote:
> +static const struct of_device_id mpic_timer_ids[] = {
> + { .compatible = "open-pic,global-timer", },
> + { .compatible = "fsl,global-timer", },
> + {},
> +};
> +
> +static int __init mpic_timer_init(void)
> +{
> + struc
On Aug 10, 2012, at 2:40 PM, Scott Wood wrote:
> On 08/10/2012 12:54 AM, dongsheng.w...@freescale.com wrote:
>> +static const struct of_device_id mpic_timer_ids[] = {
>> +{ .compatible = "open-pic,global-timer", },
>> +{ .compatible = "fsl,global-timer", },
>> +{},
>> +};
>> +
>> +sta
On 08/10/2012 12:54 AM, dongsheng.w...@freescale.com wrote:
> +static int group_get_freq(struct group_priv *priv)
> +{
> + if (priv->flags & FSL_GLOBAL_TIMER) {
> + ccbfreq = fsl_get_sys_freq();
> + priv->timerfreq = ccbfreq;
> + } else {
> + priv->timerf
This fixes breakage introduced by the following commit:
commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
Author: Liu Yu-B13201
Date: Tue Jul 3 05:48:56 2012 +
PPC: Don't use hardcoded opcode for ePAPR hcall invocation
when a driver that uses ePAPR hypercalls is built as a module.
The Freescale P4080 SOC contains two Fman Ethernet controllers, each of
which contains four 1G Ethernet MACs and one 10G Ethernet MAC. The
SerDes protocol determines how the MACs are routed to various RGMII,
SGMII, or XGMII PHYs on the board, so the P4080DS reference board
provides a MDIO bus mult
Introduce the template include files for the Freecale Frame Manager (Fman).
An SOC can have up to two Fman devices, and each Fman can have up to
five 1G Ethernet MACs and one 10G Ethernet MAC.
Signed-off-by: Timur Tabi
---
arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi | 63 +
arch/
On 08/10/2012 05:31 PM, Timur Tabi wrote:
> Introduce the template include files for the Freecale Frame Manager (Fman).
> An SOC can have up to two Fman devices, and each Fman can have up to
> five 1G Ethernet MACs and one 10G Ethernet MAC.
>
> Signed-off-by: Timur Tabi
> ---
> arch/powerpc/boot
Scott Wood wrote:
> Where's the binding document for all this? Why isn't devicetree-discuss
> on CC?
Oops. I don't even know if our existing documentation is up-to-date.
Ugh. I'll dig it up and post a v2.
--
Timur Tabi
Linux kernel developer at Freescale
_
On 08/08/2012 10:52 PM, Jia Hongtao-B38951 wrote:
>
>
>> -Original Message-
>> From: Wood Scott-B07421
>> Sent: Wednesday, August 08, 2012 11:54 PM
>> To: Jia Hongtao-B38951
>> Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org; Li
>> Yang-R58472
>> Subject: Re: [PATCH V4 3
Scott Wood wrote:
>On 08/10/2012 04:00 AM, Michael Ellerman wrote:
>> On Fri, 2012-08-10 at 18:58 +1000, Michael Ellerman wrote:
>>> On Fri, 2012-08-10 at 09:43 +0200,
>>>
>>> Signed-off-by: Liu Yu
>>
>> And this address bounces, nice.
>
>He doesn't work here anymore. We'll take ca
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