On Fri, Nov 25, 2011 at 10:55 AM, Benjamin Herrenschmidt
wrote:
> On Fri, 2011-11-18 at 10:33 +0530, Prashant Bhole wrote:
>> Hi,
>> I have been facing problem with ibm_newemac driver (v3.54).
>> The board gets disconnected and can not be pinged in between
>> some heavy network traffic. In my case
On 12/07/2011 08:34 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2011-12-01 at 10:41 +0100, Wolfgang Grandegger wrote:
>> This patch enables or updates support for the CC770 and AN82527
>> CAN controller on the TQM8548 and TQM8xx boards.
>
> I'm a bit confused by the net-next prefix here. Those pat
On 11/30/11 20:11, Josh Boyer wrote:
On Mon, Nov 28, 2011 at 5:59 PM, Scott Wood wrote:
On 11/23/2011 10:47 AM, Josh Boyer wrote:
On Mon, Nov 14, 2011 at 12:41 AM, Suzuki K. Poulose wrote:
The current implementation of CONFIG_RELOCATABLE in BookE is based
on mapping the page aligned kernel l
On Wed, Dec 7, 2011 at 7:40 AM, Suzuki Poulose wrote:
> Josh,
>
> I rebased my patches to 3.2.0-rc3 and was able to verify it on my QEMU
> setup.
> However I am facing problems getting the my boards booted with the network
> cards
> (even without the patches). Here is what I see :
>
>
> Creating 2
This still needs a dts fix from Andy.
- k
On Dec 7, 2011, at 1:27 AM, Jia Hongtao-B38951 wrote:
> Is this the patch you mentioned?
> http://patchwork.ozlabs.org/patch/128806/
>
> I applied this patch but the issue was still there.
>
> -Original Message-
> From: Tabi Timur-B04825
> Sen
On Dec 7, 2011, at 1:27 AM, Jia Hongtao-B38951 wrote:
> Is this the patch you mentioned?
> http://patchwork.ozlabs.org/patch/128806/
>
> I applied this patch but the issue was still there.
This is not the patch I am talking about. Unfortunately, I can't find the
right patch in patchwork anywh
On 12/06/2011 09:16 PM, Liu Shengzhou-B36685 wrote:
>>> + out_be32(&lbc->fbcr, 8);
>>> + elbc_fcm_ctrl->read_bytes = 8;
>>> + } else {
>>> + out_be32(&lbc->fbcr, 256);
>>> + elbc_fcm_ctrl->read_bytes = 256;
>>> +
On 12/07/2011 12:30 AM, Liu Shengzhou-B36685 wrote:
>
>> -Original Message-
>> From: Wood Scott-B07421
>> Sent: Wednesday, December 07, 2011 1:16 AM
>> To: Liu Shengzhou-B36685
>> Cc: linuxppc-dev@lists.ozlabs.org; linux-...@lists.infradead.org;
>> dw...@infradead.org; Gala Kumar-B11780
>>
We assumed before that alloc_coherent & free_coherent ops would always
be direct because of 32-bit systems and how we utilize highmem & lowmem.
However, on 64-bit systems we typically treat all memory as lowmem so
the same assumptions are not valid. We need to utilze the swiotlb
versions of alloc_
On Thu, 2011-12-01 at 15:50 +0530, K.Prasad wrote:
> On Mon, Nov 28, 2011 at 02:11:11PM +1100, David Gibson wrote:
> > [snip]
> > On Wed, Oct 12, 2011 at 11:09:48PM +0530, K.Prasad wrote:
> > > diff --git a/Documentation/powerpc/ptrace.txt
> > > b/Documentation/powerpc/ptrace.txt
> > > index f4a54
On 12/06/2011 09:55 PM, LiuShuo wrote:
> 于 2011年12月07日 08:09, Scott Wood 写道:
>> On 12/03/2011 10:31 PM, shuo@freescale.com wrote:
>>> From: Liu Shuo
>>>
>>> Freescale FCM controller has a 2K size limitation of buffer RAM. In
>>> order
>>> to support the Nand flash chip whose page size is larger
On Wed, 07 Dec 2011 13:21:28 +1100
Benjamin Herrenschmidt wrote:
> On Wed, 2011-12-07 at 02:15 +0100, acrux...@libero.it wrote:
> > New pata_sl82c105 is unable to properly handle dma (indeed it try to use
> > mwdma2).
> > Old ide driver instead worked fine.
> >
> > Tested on IBM 9114-275 where
Systems which use the fsl_pq_mdio driver need to specify an
address for TBI PHY transactions such that the address does
not conflict with any PHYs on the bus (all transactions to
that address are directed to the onboard TBI PHY). The driver
used to scan for a free address if no address was specifie
From: Andy Fleming
Date: Wed, 7 Dec 2011 13:50:57 -0600
> Systems which use the fsl_pq_mdio driver need to specify an
> address for TBI PHY transactions such that the address does
> not conflict with any PHYs on the bus (all transactions to
> that address are directed to the onboard TBI PHY). The
When spi_fsl_espi is chosen to be built as a module, there is a build
error because we test only CONFIG_SPI_FSL_ESPI in declaration of
struct mpc8xxx_spi in drivers/spi/spi_fsl_lib.h. Also some called
functions are not exported.
So we forbid CONFIG_SPI_FSL_ESPI to be tristate here.
The error look
Bug fix for Tsi721 RapidIO mport driver:
Tsi721 supports four RapidIO mailboxes (MBOX0 - MBOX3) as defined by RapidIO
specification. Mailbox resources has to be properly reported to allow use
of all available mailboxes (initial version reports only MBOX0).
This patch is applicable to kernel versio
Modify initialization of PCIe capability registers in Tsi721 mport driver:
- change Completion Timeout value to avoid unexpected data transfer aborts
during intensive traffic.
- replace hardcoded offset of PCIe capability block by getting it using
the common function.
This patch is applicable
On Wed, Dec 07, 2011 at 09:18:16PM +0100, Jiri Slaby wrote:
> When spi_fsl_espi is chosen to be built as a module, there is a build
> error because we test only CONFIG_SPI_FSL_ESPI in declaration of
> struct mpc8xxx_spi in drivers/spi/spi_fsl_lib.h. Also some called
> functions are not exported.
>
On 12/07/2011 08:57 AM, Arshad, Farrukh wrote:
> Core 0 kernel
>
> CONFIG_LOWMEM_SIZE = 0x1000
>
> CONFIG_PHYSICAL_START = 0x
>
>
>
> Core 1 kernel
>
> CONFIG_LOWMEM_SIZE = 0x1000
>
> CONFIG_PHYSICAL_START = 0x1000
Why are you messing with CONFIG_LOWMEM_SIZE? That adju
On Dec 7, 2011, at 2:02 PM, David Miller wrote:
> From: Andy Fleming
> Date: Wed, 7 Dec 2011 13:50:57 -0600
>
>> Systems which use the fsl_pq_mdio driver need to specify an
>> address for TBI PHY transactions such that the address does
>> not conflict with any PHYs on the bus (all transactions
On Wed, 2011-12-07 at 09:25 +0100, Wolfgang Grandegger wrote:
> > Also there have been at least 3 versions in a couple of days already
> > without comments nor indication of what was changed...
>
> Unfortunately, no response from those sub-system guys.
>
> > Can you clarify things a bit please ?
On Wed, 2011-12-07 at 13:35 +0530, Prashant Bhole wrote:
> Still couldn't find anything like fifo overflow...
> I noticed one more thing, this problem happens only when mtu size on
> the initiator (the other end) is set to 4088, regardless of any mtu
> size set for EMAC.
Did you check all the reg
The Freescale P1022 has a unique pin muxing "feature" where the DIU video
controller's video signals are muxed with 24 of the local bus address signals.
When the DIU is enabled, the bulk of the local bus is disabled, preventing
access to memory-mapped devices like NOR flash and the pixis FPGA.
The
Create a 32-bit address space version of p1022ds.dts. To avoid confusion,
p1022ds.dts is renamed to p1022ds_36b.dts. We also create p1022ds.dtsi
to store some common nodes.
Signed-off-by: Timur Tabi
---
arch/powerpc/boot/dts/p1022ds.dts | 270 -
arch/powerp
On 12/07/2011 06:04 PM, Timur Tabi wrote:
> + /*
> + * This node is used to access the pixis via "indirect" mode,
> + * which is done by writing the pixis register index to chip
> + * select 0 and the value to/from chip select 1. Indirect
> +
Scott Wood wrote:
>> +interrupts =<8 8 0 0>;
>> > + };
> It's not new to this patch, but... what does "8" mean in the second cell
> of an mpic interrupt specifier?
I have no idea.
> And why does the indirect pixis node
> not have the interrupt?
Hmmm... I suppose I co
Best Regards,
Shengzhou Liu
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, December 08, 2011 1:16 AM
> To: Liu Shengzhou-B36685
> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; linux-
> m...@lists.infradead.org; dw...@infradead.org; Gala Kumar-B11780
> Subject:
On Wed, 2011-12-07 at 14:49 +1100, Finn Thain wrote:
> On most 68k Macs the SCC IRQ is an autovector interrupt and cannot be
> masked. This can be a problem when pmac_zilog starts up.
Thanks. I'll test it on a powermac or two and will merge it via the
powerpc -next tree if it works out allright.
On Wed, 2011-12-07 at 11:19 -0600, Kumar Gala wrote:
> struct dma_map_ops swiotlb_dma_ops = {
> +#ifdef CONFIG_PPC64
> + .alloc_coherent = swiotlb_alloc_coherent,
> + .free_coherent = swiotlb_free_coherent,
> +#else
> .alloc_coherent = dma_direct_alloc_coherent,
> .free_cohere
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, December 08, 2011 1:17 AM
> To: Liu Shengzhou-B36685
> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; linux-
> m...@lists.infradead.org; dw...@infradead.org; Gala Kumar-B11780
> Subject: Re: [PATCH 1/2 v2] mtd/nand: f
On Wed, 2011-12-07 at 14:49 +1100, Finn Thain wrote:
> On most 68k Macs the SCC IRQ is an autovector interrupt and cannot be
> masked. This can be a problem when pmac_zilog starts up.
>
> For example, the serial debugging code in arch/m68k/kernel/head.S may be
> used beforehand. It disables the
On Thu, 2011-12-08 at 15:20 +1100, Benjamin Herrenschmidt wrote:
> So basic operations seem to work, I've applied the patch to
> powerpc-next.
>
> However, the internal modem on my Pismo powerbook doesn't appear to
> survive suspend/resume. I'll dig into that and merge a fixup patch asap.
BTW. I
Implement a POWER7 optimised copy_to_user/copy_from_user using VMX.
For large aligned copies this new loop is over 10% faster, and for
large unaligned copies it is over 200% faster.
If we take a fault we fall back to the old version, this keeps
things relatively simple and easy to verify.
On POW
On Dec 7, 2011, at 11:02 PM, Anton Blanchard wrote:
> Index: linux-build/arch/powerpc/include/asm/cputable.h
> ===
> --- linux-build.orig/arch/powerpc/include/asm/cputable.h 2011-09-07
> 15:15:49.096458526 +1000
> +++ linux-bui
On Dec 7, 2011, at 9:23 PM, Benjamin Herrenschmidt wrote:
> On Wed, 2011-12-07 at 11:19 -0600, Kumar Gala wrote:
>
>> struct dma_map_ops swiotlb_dma_ops = {
>> +#ifdef CONFIG_PPC64
>> +.alloc_coherent = swiotlb_alloc_coherent,
>> +.free_coherent = swiotlb_free_coherent,
>> +#else
>>
> > +#define CPU_FTR_POWER7 = LONG_ASM_CONST(0x2000)
> Can we find a means to do the fixup that does NOT require a FTR bit? I
> have the feeling FSL will want to have various optimized copy functions
> for our different cores and I hate to blow features bits just for this.
+1
I hat
Hi,
> I hate the idea of having a POWER7 FTR bit. Every loon will (and has
> tried to in the past) attach every POWER7 related thing to it, rather
> than thinking about what the feature really is for.
>
> What about other processors which could also benefit from this copy
> loop? Turning on
Current linux-next compiled with mpc85xx_smp_defconfig causes this:
arch/powerpc/platforms/85xx/p1023_rds.c: In function 'mpc85xx_rds_pic_init':
arch/powerpc/platforms/85xx/p1023_rds.c:102:14: error: 'np' undeclared (first
use in this function)
arch/powerpc/platforms/85xx/p1023_rds.c:102:14: note:
Implement a POWER7 optimised copy_to_user/copy_from_user using VMX.
For large aligned copies this new loop is over 10% faster, and for
large unaligned copies it is over 200% faster.
If we take a fault we fall back to the old version, this keeps
things relatively simple and easy to verify.
On POW
Thanks Scott.
Fixing cpu 1 release address solved my problem. Also thanks for the
CONFIG_LOWMEM_SIZE suggestions.
Regards,
Farrukh Arshad
-Original Message-
From: Scott Wood [mailto:scottw...@freescale.com]
Sent: Thursday, December 08, 2011 2:24 AM
To: Arshad, Farrukh
Cc: Linuxppc-dev
The Freescale serial port's are pretty much a 16550, however there are
some FSL specific bugs and features. Add a "fsl,ns16550" compatiable
string to allow code to handle those FSL specific issues.
Signed-off-by: Kumar Gala
---
arch/powerpc/boot/dts/asp834x-redboot.dts|4 ++--
arch/powe
PPC64 uses long long for u64 in the kernel, but powerpc's asm/types.h
prevents 64-bit userland from seeing this definition, instead defaulting
to u64 == long in userspace. Some user programs (e.g. kvmtool) may actually
want LL64, so this patch adds a check for __SANE_USERSPACE_TYPES__ so that,
if
corenet64_smp_defconfig:
- enabled rapidio
corenet32_smp_defconfig:
- enabled hugetlbfs, rapidio
mpc85xx_smp_defconfig:
- enabled P1010RDB, hugetlbfs, SPI, SDHC, Crypto/CAAM
mpc85xx_smp_defconfig:
- enabled hugetlbfs, SPI, SDHC, Crypto/CAAM
Signed-off-by: Kumar Gala
---
arch/powerpc/confi
On Dec 7, 2011, at 1:50 PM, Andy Fleming wrote:
> Systems which use the fsl_pq_mdio driver need to specify an
> address for TBI PHY transactions such that the address does
> not conflict with any PHYs on the bus (all transactions to
> that address are directed to the onboard TBI PHY). The driver
On Dec 1, 2011, at 12:03 AM, Kumar Gala wrote:
> There is an issue on FSL-BookE 64-bit devices (P5020) in which PCIe
> devices that are capable of doing 64-bit DMAs (like an Intel e1000) do
> not function and crash the kernel if we have >4G of memory in the system.
>
> The reason is that the exi
On Dec 5, 2011, at 10:41 AM, Paul Gortmaker wrote:
> The commit 883c2cfc8bcc0fd00c5d9f596fb8870f481b5bda:
>
> "fix of_flat_dt_is_compatible() to match the full compatible string"
>
> causes silent boot death on the sbc8349 board because it was
> just looking for 8349 and not 8349E -- as origina
On Dec 8, 2011, at 1:11 AM, Kumar Gala wrote:
> corenet64_smp_defconfig:
> - enabled rapidio
>
> corenet32_smp_defconfig:
> - enabled hugetlbfs, rapidio
>
> mpc85xx_smp_defconfig:
> - enabled P1010RDB, hugetlbfs, SPI, SDHC, Crypto/CAAM
>
> mpc85xx_smp_defconfig:
> - enabled hugetlbfs, SPI, SDH
[ some bugfixes & defconfig updates for 3.2]
The following changes since commit 49e44064d7e3f24f874a51dd513b83ef9994aa8a:
powerpc/44x: Add mtd ndfc to the ppx44x defconfig (2011-11-25 10:06:00 +1100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/
On Dec 7, 2011, at 9:13 AM, Timur Tabi wrote:
> On Dec 7, 2011, at 1:27 AM, Jia Hongtao-B38951 wrote:
>
>> Is this the patch you mentioned?
>> http://patchwork.ozlabs.org/patch/128806/
>>
>> I applied this patch but the issue was still there.
>
> This is not the patch I am talking about. Unf
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