<snip> > > +#define CPU_FTR_POWER7 = LONG_ASM_CONST(0x2000000000000000) <snip> > Can we find a means to do the fixup that does NOT require a FTR bit? I > have the feeling FSL will want to have various optimized copy functions > for our different cores and I hate to blow features bits just for this.
+1 I hate the idea of having a POWER7 FTR bit. Every loon will (and has tried to in the past) attach every POWER7 related thing to it, rather than thinking about what the feature really is for. What about other processors which could also benefit from this copy loop? Turning on CPU_FTR_POWER7 for them is gonna look a bit silly. Mikey _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
