Hello,
This patch extends DMA ranges for PCI(X) to 4GB, so that it could
work on Katmais with 4GB RAM installed.
Add new nodes for the PPC440SPe DMA, XOR engines to
be used in the PPC440SPe ADMA driver, and the SysACE
controller, which connects Compact Flash to Katmai.
Signed-off-by: Ilya Yanok
Hello,
This patch adds using resource_size_t for physical address of SystemACE
chip. This makes the driver workable on 32 bit systems with 64-bit resources
(e.g. PPC440SPe).
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/block/xsysace.c
On Thu, 2008-11-13 at 11:49 +0300, Yuri Tikhonov wrote:
> Hello,
>
> This patch extends DMA ranges for PCI(X) to 4GB, so that it could
> work on Katmais with 4GB RAM installed.
And where do you put MMIO ?
The 32 bit part of the PCI space need to be split between MMIO and DMA.
Ideally, for 64-b
On Thu, 2008-11-13 at 15:20 +1100, Michael Ellerman wrote:
> Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]>
Acked-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
---
> ---
> arch/powerpc/platforms/powermac/setup.c |4 +---
> 1 files changed, 1 insertions(+), 3 deletions(-)
>
> diff --gi
On Thu, 13 Nov 2008 11:49:14 +0300
Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
> Hello,
>
> This patch extends DMA ranges for PCI(X) to 4GB, so that it could
> work on Katmais with 4GB RAM installed.
>
> Add new nodes for the PPC440SPe DMA, XOR engines to
> be used in the PPC440SPe ADMA driver, and
Gadgets disable endpoints in their disconnect callbacks, so
we must call disconnect before unbinding. This also fixes
muram memory leak, since we free muram in the qe_ep_disable().
But mainly the patch fixes following badness:
[EMAIL PROTECTED]:~# insmod fsl_qe_udc.ko
fsl_qe_udc: Freescale QE/CPM
Gadgets disable endpoints in their disconnect callbacks, so
we must call disconnect before unbinding.
The patch fixes following badness:
[EMAIL PROTECTED]:~# insmod fsl_usb2_udc.ko
Freescale High-Speed USB SOC Device Controller driver (Apr 20, 2007)
[EMAIL PROTECTED]:~# insmod g_ether.ko
g_ether
From: Haiying Wang <[EMAIL PROTECTED]>
The flag MPIC_WANTS_RESET shouldn't be set if reading the new cpu compatible
"fsl,MPC8572DS-CAMP" returns 1.
Signed-off-by: Haiying Wang <[EMAIL PROTECTED]>
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 11 ++
From: Haiying Wang <[EMAIL PROTECTED]>
Signed-off-by: Haiying Wang <[EMAIL PROTECTED]>
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | 484
arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | 233
2 files chan
Benjamin Herrenschmidt wrote:
On Fri, 2008-11-07 at 13:38 -0800, Kevin Diggs wrote:
to connect an 8600 to a laptop via ppp the link will lock up in short
order from "payloaded" pings. Any advice on how to figure out where it
is locking up? This command works fine to connect two x86 laptops. At
Hi Yuri,
On Thu, 13 Nov 2008 11:43:17 +0300 Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
>
> - dev_dbg(ace->dev, "physaddr=0x%lx irq=%i\n", ace->physaddr, ace->irq);
> + dev_dbg(ace->dev, "physaddr=0x%llx irq=%i\n", (u64)ace->physaddr,
> ace->irq);
You should cast the physaddr to "unsigned l
The following patch-set includes enhancements to the async_tx api and
modifications to md-raid6 to issue memory copies and parity calculations
asynchronously. Thus we may process copy operations and RAID-6 calculations
on the dedicated DMA engines accessible with ASYNC_TX API, and, as a result
off
Using src_list argument of async_xor() as a storage for dma addresses
implies sizeof(dma_addr_t) <= sizeof(struct page *) restriction which is
not always true.
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
crypto/async_tx/async_xor.c | 14 ++
1 files changed, 2 insertions(+), 12
This patch extends async_tx API with two operations for recovery
operations on RAID6 array with two failed disks using new async_pqxor()
operation. New functions:
async_r6_dd_recov() recovers after double data disk failure
async_r6_dp_recov() recovers after D+P failure
Signed-off-by: Yuri Tikhon
This adds support for doing asynchronous GF multiplication by adding
four additional functions to async_tx API:
async_pqxor() does simultaneous XOR of sources and XOR of sources
GF-multiplied by given coefficients.
async_pqxor_zero_sum() checks if results of calculations match given
ones.
async_
To be able to re-use the schedule_reconstruction5() code in RAID-6
case, this should handle Q-parity strip appropriately. This patch
introduces this.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 18 ++
1
The raid_run_ops routine uses the asynchronous offload api and
the stripe_operations member of a stripe_head to carry out xor+pqxor+copy
operations asynchronously, outside the lock.
The operations performed by RAID-6 are the same as in the RAID-5 case
except for no support of STRIPE_OP_PREXOR op
Change handle_stripe_fill6 to work asynchronously and introduce helper
fetch_block6 function for this.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 154
1 files changed
This patch introduces the state machine for handling the RAID-6 parities
check and repair functionality.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 163 +++-
1 files chang
Rewrite handle_stripe_dirtying6 function to work asynchronously.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 113 ++--
1 files changed, 30 insertions(+), 83 deletions(-)
d
handle_stripe6 function is changed to do things asynchronously.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 130
1 files changed, 90 insertions(+), 40 deletions(-)
di
ethernet0 (called FSL UEC0 in U-Boot) should be enet1 (UCC3/eth1), and
ethernet1 should be enet0 (UCC2/eth0), to be consistent with U-Boot so
that the interfaces do not swap addresses when control passes from
U-Boot to the kernel.
Signed-off-by: Michael Barkowski <[EMAIL PROTECTED]>
Acked-by: Kim
Some clean-up of the replaced or already unnecessary functions.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 246
1 files changed, 0 insertions(+), 246 deletions(-)
d
Hi Paul,
Please pull the merge branch of the powerpc-4xx git tree. It contains
two small fixes that should go into .28.
thx,
josh
The following changes since commit cb8fdc69a2a80e81e1280ec58afd2c3217ac8a7f:
Paul Mackerras (1):
powerpc: Update desktop/server defconfigs
are available i
Maybe usefull for someone
Adds rs485 support for MPC52xx_psc_uart
To change mode:
echo 1 >/sys/dev/f.soc5200.f0002x000.serial/uartmode
COM1 is console and not selectable.
We choose this way to handle the uart mode by S3 CoDeSys.
I am quite sure this is not the best solution but in our
On Thu, Nov 13, 2008 at 06:16:04PM +0300, Ilya Yanok wrote:
> Adds the platform device definitions and the architecture specific support
>routines for the ppc440spe adma driver.
>
> Any board equipped with PPC440SP(e) controller may utilize this driver.
>
>Signed-off-by: Yuri Tikhonov <[EMAIL PROTE
Josh Boyer wrote:
> On Thu, Nov 13, 2008 at 06:16:04PM +0300, Ilya Yanok wrote:
>
>> Adds the platform device definitions and the architecture specific support
>> routines for the ppc440spe adma driver.
>>
>> Any board equipped with PPC440SP(e) controller may utilize this driver.
>>
>> Signed-of
On Thu, 13 Nov 2008 20:50:43 +0300
Ilya Yanok <[EMAIL PROTECTED]> wrote:
> Josh Boyer wrote:
> > On Thu, Nov 13, 2008 at 06:16:04PM +0300, Ilya Yanok wrote:
> >
> >> Adds the platform device definitions and the architecture specific support
> >> routines for the ppc440spe adma driver.
> >>
> >>
p_{tx,rx}_fw_statistics_pram are special: they're available only when
a device is open. If the device is closed, we should just fill the data
with zeroes.
Fixes the following oops:
[EMAIL PROTECTED]:~# ifconfig eth1 down
[EMAIL PROTECTED]:~# ethtool -S eth1
Unable to handle kernel paging request
Hello Hans,
On Thu, Nov 13, 2008 at 04:48:30PM +0100, Lehmann, Hans (Ritter Elektronik)
wrote:
> Adds rs485 support for MPC52xx_psc_uart
Please be more specific. What exactly was done/modified to have
RS485-support.
Please also read SubmittingPatches and CodingStyle in the Documentation
direct
On Thu, 2008-11-13 at 07:44 +1100, Benjamin Herrenschmidt wrote:
>
> Again, why can't we just stick something in the kernel code that
> reserves the last page ? It could be in prom.c or it could be called by
> affected 4xx platforms by the platform code, whatever, but the reserve
> map isn't reall
On Thu, 2008-11-13 at 03:38 -0800, Kevin Diggs wrote:
> 12,206 PowerMac Zilog interrupts
>
> Interrupt load is higher without the DMA support.
>
> Is it possible that this hardware was not meant to be used without the
> DMA (i.e. it does not work quite right?)?
Well, the HW Rx buffer is only 3
Benjamin Herrenschmidt wrote:
On Thu, 2008-11-13 at 03:38 -0800, Kevin Diggs wrote:
12,206 PowerMac Zilog interrupts
Interrupt load is higher without the DMA support.
Is it possible that this hardware was not meant to be used without the
DMA (i.e. it does not work quite right?)?
Well, the
On Thu, Nov 13, 2008 at 10:18:28AM -0500, Michael Barkowski wrote:
> ethernet0 (called FSL UEC0 in U-Boot) should be enet1 (UCC3/eth1), and
> ethernet1 should be enet0 (UCC2/eth0), to be consistent with U-Boot so
> that the interfaces do not swap addresses when control passes from
> U-Boot to the k
On Thu, 2008-11-13 at 14:29 -0800, Kevin Diggs wrote:
> Benjamin Herrenschmidt wrote:
> > On Thu, 2008-11-13 at 03:38 -0800, Kevin Diggs wrote:
> >
> >
> >>12,206 PowerMac Zilog interrupts
> >>
> >>Interrupt load is higher without the DMA support.
> >>
> >>Is it possible that this hardware was no
Hello Milton,
On Tuesday, November 11, 2008 Milton Miller wrote:
[snip]
#ifdef CONFIG_PTE_64BIT
typedef unsigned long long pte_basic_t;
+#ifdef CONFIG_PPC_256K_PAGES
+#define PTE_SHIFT (PAGE_SHIFT - 7)
>>>
>>> This seems to be missing the comment on how many ptes
Hello Ben,
On Thursday, November 13, 2008 you wrote:
> On Thu, 2008-11-13 at 11:49 +0300, Yuri Tikhonov wrote:
>> Hello,
>>
>> This patch extends DMA ranges for PCI(X) to 4GB, so that it could
>> work on Katmais with 4GB RAM installed.
> And where do you put MMIO ?
> The 32 bit part of the P
From: Grant Likely <[EMAIL PROTECTED]>
Various printk format string in code used by the Xilinx Virtex platform
are not 32-bit/64-bit safe. Add correct casting to fix the bugs.
Signed-off-by: Grant Likely <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/xilinx_intc.c |4 ++--
drivers/ch
Hello Stephen,
On Thursday, November 13, 2008 you wrote:
> Hi Yuri,
> On Thu, 13 Nov 2008 11:43:17 +0300 Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
>>
>> - dev_dbg(ace->dev, "physaddr=0x%lx irq=%i\n", ace->physaddr, ace->irq);
>> + dev_dbg(ace->dev, "physaddr=0x%llx irq=%i\n", (u64)ace->p
On Thu, Nov 13, 2008 at 06:45:33AM -0500, Josh Boyer wrote:
> On Thu, 13 Nov 2008 11:49:14 +0300
> Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
> > + [EMAIL PROTECTED] {
> > + compatible = "xlnx,opb-sysace-1.00.b";
>
> Odd. This isn't a xilinx board by any means. This sho
Hello Josh,
On Thursday, November 13, 2008 you wrote:
[snip]
> You have no compatible property in these 3 nodes. How are drivers
> supposed to bind to them?
> You also have no reg or dcr-reg properties. What exactly are these
> nodes for?
Probably we (me and Ilya) overdone with posting ka
Hello Grant,
On Friday, November 14, 2008 you wrote:
> On Thu, Nov 13, 2008 at 06:45:33AM -0500, Josh Boyer wrote:
>> On Thu, 13 Nov 2008 11:49:14 +0300
>> Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
>> > + [EMAIL PROTECTED] {
>> > + compatible = "xlnx,opb-sysace-1.00.b"
From: Grant Likely <[EMAIL PROTECTED]>
Without this patch it is possible to select drivers which require
bestcomm support without bestcomm support being selected. This
patch reworks the bestcomm dependencies to ensure the correct
bestcomm tasks are always enabled.
Signed-off-by: Grant Likely <[E
On Thu, Nov 13, 2008 at 10:27 PM, Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
>
> Hello Grant,
>
> On Friday, November 14, 2008 you wrote:
>
>> On Thu, Nov 13, 2008 at 06:45:33AM -0500, Josh Boyer wrote:
>>> On Thu, 13 Nov 2008 11:49:14 +0300
>>> Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
>>> > +
> My understanding was that the dma-ranges property is responsible for
> setting up the inbound ranges of RAM's physical addresses, where PCI
> could DMA to/from. As regarding the outbound property, this patch
> doesn't change this, and there we have the PCI space split (2 GB of
> memory, and
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