On Mon, 2008-07-07 at 19:52 +0530, Srinivasa D S wrote:
> Hi
> task_pt_regs() macro defines pt_regs for the given task, this macro is
> currently not defined for powerpc arch. We need this macro for
> upcoming utrace features.
> Below attached patch defines this macro for powerpc arch. Plea
Hi folks,
I'm developing a custom SPI driver (char device) on a MPC5200b, the
microcontroller linked as slave implements a protocol that must follow
strict timing constraints. I need to receive and send messages every 6msec.
Actually there is a user space program that synchronizes the two units, bu
David Gibson schrieb:
> On Mon, Jul 07, 2008 at 10:14:29AM +0200, Andre Schwarz wrote:
>
>> The mvBlueCOUGAR-P is a MPC5200B based camera system with Intel Gigabit
>> ethernet
>> controller (using e1000). It's just another MPC5200_simple board.
>>
>
> [snip]
>
>> +[EMAIL PRO
When the ucontext changed to add the VSX context, this broke backwards
compatibly on swapcontext. swapcontext only compares the ucontext size
passed in from the user to the new kernel ucontext size.
This adds a check against the old ucontext size (with VMX but without
VSX). It also adds some san
regs is not used in emulate_fp_pair so remove it.
Signed-off-by: Michael Neuling <[EMAIL PROTECTED]>
---
Benh: please add to your 2.6.27 tree
arch/powerpc/kernel/align.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c
==
> "John" == John Linn <[EMAIL PROTECTED]> writes:
Hi,
> Added a new driver for Xilinx XPS PS2 IP. This driver is
> a flat driver to better match the Linux driver pattern.
> Signed-off-by: Sadanand <[EMAIL PROTECTED]>
> Signed-off-by: John Linn <[EMAIL PROTECTED]>
> ---
> V2
> Upd
Am Mon, 7 Jul 2008 21:37:43 +0200
schrieb Uli Luckas <[EMAIL PROTECTED]>:
> > AZFS is a file system which keeps all files on memory mapped random
> > access storage.
> Hi Maxim,
> do you mean "memory backed" instead of "memory mapped"?
Right, I have corrected this already in my patch.
Thank you.
Thanks for the review comments. I will change to 'snprintf' at all the places
and remove the unnecessary casts.
On Tuesday 08 July 2008 07:06:46 Stephen Rothwell wrote:
> Hi Chandru,
>
> On Tue, 8 Jul 2008 00:14:24 +0530 Chandru <[EMAIL PROTECTED]> wrote:
> > + if (usm != NULL) {
> > +
В Tue, 08 Jul 2008 14:28:11 +1000
Benjamin Herrenschmidt <[EMAIL PROTECTED]> пишет:
> On Tue, 2008-07-08 at 13:54 +1000, Stephen Rothwell wrote:
> > Hi Vitaly,
> >
> > On Tue, 8 Jul 2008 03:12:56 +0400 Vitaly Bordug
> > <[EMAIL PROTECTED]> wrote:
> > >
> > > +++ b/arch/powerpc/kernel/of_platform.
On Tue, 8 Jul 2008, Benjamin Herrenschmidt wrote:
> On Tue, 2008-07-08 at 08:24 +1000, Benjamin Herrenschmidt wrote:
> > > There is a little inconsistency, that arch_calc_vm_prot_bits
> > > and arch_vm_get_page_prot just handle the exceptional flag (SAO),
> > > whereas arch_validate_prot handles al
On Jul 2, 2008, at 8:28 PM, Stephen Rothwell wrote:
Hi Kumar,
On Wed, 2 Jul 2008 02:55:29 -0500 Kumar Gala <[EMAIL PROTECTED]
> wrote:
I'll pick it up (since it mainly touches fsl enet controllers) if you
can repost it. I seem to have lost the patch.
Here you go.
--
Cheers,
Stephen Rothw
On Tue, 2008-07-08 at 16:18 +1000, Benjamin Herrenschmidt wrote:
> Andrew, what tree should this go via ? I have further powerpc patches
> depending on this one... so on one hand I'd be happy to take it, but
> on the other hand, it's more likely to clash with other things...
Andrew has asked that
2008/7/7 Mike Mason <[EMAIL PROTECTED]>:
> The following patch restores the PERR and SERR bits in the PCI
> command register during an EEH device recovery.
> We have found at least one case (an Agilent test card) where the
> PERR/SERR bits are set to 1 by firmware at boot time, but are
> not restor
On Tue, Jul 8, 2008 at 1:55 AM, Paolo Doz <[EMAIL PROTECTED]> wrote:
> Hi folks,
> I'm developing a custom SPI driver (char device) on a MPC5200b, the
> microcontroller linked as slave implements a protocol that must follow
> strict timing constraints. I need to receive and send messages every 6mse
Thanks for the comments David.
> -Original Message-
> From: David Gibson [mailto:[EMAIL PROTECTED]
> Sent: Monday, July 07, 2008 9:17 PM
> To: John Linn
> Cc: linuxppc-dev@ozlabs.org
> Subject: Re: [PATCH] [V2] powerpc: Xilinx: add dts file for ML507
board
>
> On Mon, Jul 07, 2008 at 11
On Monday 07 July 2008, Maxim Shchetynin wrote:
> > > + if (copy_to_user(target, (void*) pin, size)) {
> > > + rc = -EFAULT;
> > > + goto out;
> > > + }
> >
> > Question to the powerpc folks: is copy_to_user safe for an __iomem source?
> > Sh
On Tuesday 08 July 2008, Grant Likely wrote:
>
> You can use a kernel thread.
>
> I'm not sure how accurate this is, but here is some information about them:
>
> http://www.linuxquestions.org/linux/articles/Technical/Linux_Kernel_Thread
Not accurate at all. New code should use kthread_create,
On Tue, Jul 8, 2008 at 8:45 AM, Arnd Bergmann <[EMAIL PROTECTED]> wrote:
> On Tuesday 08 July 2008, Grant Likely wrote:
>
>>
>> You can use a kernel thread.
>>
>> I'm not sure how accurate this is, but here is some information about them:
>>
>> http://www.linuxquestions.org/linux/articles/Technical
Paolo Doz wrote:
Hi folks,
I'm developing a custom SPI driver (char device) on a MPC5200b, the
microcontroller linked as slave implements a protocol that must follow
strict timing constraints. I need to receive and send messages every
6msec.
What are your timing requirements? How much over/
This patch adds support to the RGMII handler in the EMAC driver for
the MII PHY mode such that device tree entries of the form `phy-mode = "mii";'
are recognized and handled appropriately.
While logically, in software, "gmii" and "mii" modes are the same,
they are wired differently, so it makes se
On Tue, Jul 08, 2008 at 08:43:43AM +0200, Arnd Bergmann wrote:
> On Monday 07 July 2008, Dave Jones wrote:
> > One question I do have though, is how userspace scripts are supposed
> > to know they're to echo cbe_spu_governor into the relevant parts of
> > sysfs. I've not used anything with a c
On Tuesday 08 July 2008, Grant Erickson wrote:
> This patch adds support to the RGMII handler in the EMAC driver for
> the MII PHY mode such that device tree entries of the form `phy-mode =
> "mii";' are recognized and handled appropriately.
>
> While logically, in software, "gmii" and "mii" modes
On Thu, Jun 12, 2008 at 12:25:25AM +0200, Samuel Ortiz wrote:
> Hi Anton,
>
> On Wed, Jun 04, 2008 at 07:45:10PM +0400, Anton Vorontsov wrote:
> > From: Zhang Wei <[EMAIL PROTECTED]>
> >
> > The driver supports SIR, MIR, FIR modes and maximum 400bps rate.
> >
> > Signed-off-by: Zhang Wei <[E
Linas Vepstas wrote:
2008/7/7 Mike Mason <[EMAIL PROTECTED]>:
The following patch restores the PERR and SERR bits in the PCI
command register during an EEH device recovery.
We have found at least one case (an Agilent test card) where the
PERR/SERR bits are set to 1 by firmware at boot time, but
Here's a resubmission of the patch with Linas' suggestion.
The following patch restores the PERR and SERR bits in the PCI
command register during an EEH device recovery. We have found
at least one case (an Agilent test card) where the PERR/SERR
bits are set to 1 by firmware at boot time, but are
There is dma_mask in of_device upon of_platform_device_create()
but we don't actually set coherent_dma_mask. This may cause weird
behavior of USB subsystem using of_device USB host drivers.
Signed-off-by: Vitaly Bordug <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/of_platform.c |2 ++
1 files
We must not use MPC831X_SICR[HL]_* definitions for the MPC8315 processors,
because SICR USB bits locations are not compatible with MPC8313.
This patch fixes ULPI workability on MPC8315E-RDB boards.
Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/83xx/mpc83xx.h |
Freescale ships MPC8315E-RDB boards in two variants:
1. With TSEC1 ethernet support and USB UTMI PHY;
2. Without TSEC1 support, but with USB ULPI PHY in addition.
For the second case U-Boot will add status = "disabled"; property
into the TSEC1 node, so Linux should not try to probe it.
Signed-of
* Brian King ([EMAIL PROTECTED]) wrote:
> Robert Jennings wrote:
> > @@ -1613,6 +1624,26 @@ static struct scsi_host_template driver_
> > };
> >
> > /**
> > + * ibmvscsi_get_desired_dma - Calculate IO entitlement needed by the driver
> > + *
> > + * @vdev: struct vio_dev for the device whose ent
Hello,
Any one know how can I integrate the Freescale's SEC driver with
cryptoloop in Kernel2.4 on MPC8567e? Or which version of kernel shall
I take if it is already there?
Thanks for your help,
Mike
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.or
On Tue, 2008-07-08 at 10:48 +1000, Benjamin Herrenschmidt wrote:
> Adding Steve to the CC list as I'd like his input from the
> glibc/powerpc side as he's the requester of that feature in the first
> place.
>
> Steve: Roland is proposing to ues dsocaps instead of AT_BASE_PLATFORM.
>
I am will to
This patch completes the conversion of the IBM IIC driver to an
of-platform driver.
It removes the index from the IBM IIC driver and makes it an unnumbered
driver. It then calls of_register_i2c_devices to properly register all
the child nodes in the DTS.
Signed-off-by: Sean MacLennan <[EMAIL PROT
This patch is against linux-next.
Allow the Rev A Warp boards to boot from NAND.
Signed-off-by: Sean MacLennan <[EMAIL PROTECTED]>
---
diff --git a/arch/powerpc/platforms/44x/warp-nand.c
b/arch/powerpc/platforms/44x/warp-nand.c
index 7bec281..e55746b 100644
--- a/arch/powerpc/platforms/44x/warp
Background from Maynard Johnson:
As of POWER6, a set of 32 common events is defined that must be
supported on all future POWER processors. The main impetus for this
compat set is the need to support partition migration, especially from
processor P(n) to processor P(n+1), where performance software
Update the warp to use the new IBM IIC driver. We no longer need to
register the I2C devices in the platform code.
Also adds a small bugfix for the i2c code if the i2c read fails.
Signed-off-by: Sean MacLennan <[EMAIL PROTECTED]>
---
diff --git a/arch/powerpc/platforms/44x/warp.c
b/arch/powerpc
On Tue, 8 Jul 2008 14:03:28 -0400
"mike zheng" <[EMAIL PROTECTED]> wrote:
> Hello,
>
> Any one know how can I integrate the Freescale's SEC driver with
> cryptoloop in Kernel2.4 on MPC8567e? Or which version of kernel shall
> I take if it is already there?
Take Herbert's cryptodev-2.6 tree and a
From: Robert Jennings <[EMAIL PROTECTED]>
I removed references to 'entitlement' after having changed the function
'get_io_entitlement' to 'get_desired_dma' to correctly indicate what the
function was doing. Also, this function does not need to page align the
return value, the VIO bus is responsib
I removed references to 'entitlement' after having changed the function
'get_io_entitlement' to 'get_desired_dma' to correctly indicate what the
function was doing. Also, this function does not need to page align the
return value, the VIO bus is responsible for this.
(We would like to take this p
From: Robert Jennings <[EMAIL PROTECTED]>
Minor change to add a call to align the return from the device's
get_desired_dma() function with IOMMU_PAGE_ALIGN(). Also removed a
comment referring to a non-existent structure member.
This is a large patch but the normal code path is not affected. For
Thanks for the infos, I'll try kernel thread or timer/softirq in the next
days.
I'll let you know which of them fit my problems.
I actually have about +/- 1msec of freedom (but still require more
investigation).
Paolo
On Tue, Jul 8, 2008 at 4:47 PM, Grant Likely <[EMAIL PROTECTED]>
wrote:
> On
Hi Roman.
I thought a bit more about this.
> I should have gone through all archs to test this, sorry about that.
> Luckily it's only powerpc that uses 64bit values. I would prefer to
> standardize on 32bit values, as it doesn't really make sense to expect
> from the user to input full 64bit va
On Jul 8, 2008, at 3:01 PM, Nathan Lynch wrote:
Background from Maynard Johnson:
As of POWER6, a set of 32 common events is defined that must be
supported on all future POWER processors. The main impetus for this
compat set is the need to support partition migration, especially from
processor
Kumar Gala wrote:
>
> So is PMU here performance monitor unit? I think that was part of my
> confusion earlier. I was thinking Power Mgmt Unit (like on Apple HW).
Yes, PMU means performance monitor unit in the context of pseries.
> I hate make the name longer, but PPC_FEATURE_PSERIES_PERFMON
I think this code that counts SMT threads and compares against NR_CPUS
is an artifact of pre-powerpc-merge ppc64. We care about starting
only primary threads in the OF client code.
Signed-off-by: Nathan Lynch <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/prom_init.c | 39 +++-
Hi,
The same ramdisk works fine for 2.6.15 kernel. We are just upgrading to
a new version, and would like to get that ramdisk to work on the new one
as well.
Can you please elaborate on what you mean by compression format. Mine
currently use the standard .gz extension/compression.
Thanks
Siva
On Tue, 8 Jul 2008 16:22:40 -0400
Sean MacLennan <[EMAIL PROTECTED]> wrote:
> Update the warp to use the new IBM IIC driver. We no longer need to
> register the I2C devices in the platform code.
>
> Also adds a small bugfix for the i2c code if the i2c read fails.
I'll queue this up after Jean pu
delete obsolete device-type property, delete model property
(use compatible property instead), prepend "fsl," to Freescale
specific properties. Add nodes to device trees that are missing them,
and fix broken property values in other trees.
Signed-off-by: Kim Phillips <[EMAIL PROTECTED]>
---
change
On Tue, 08 Jul 2008 15:54:40 +1000
"Benjamin Herrenschmidt" <[EMAIL PROTECTED]> wrote:
> This is some preliminary work to improve TLB management on SW loaded
> TLB powerpc platforms. This introduce support for non-atomic PTE
> operations in pgtable-ppc32.h and removes write back to the PTE from
>
On Tue, Jul 08, 2008 at 10:30:00AM +0200, Andre Schwarz wrote:
> David Gibson schrieb:
> > On Mon, Jul 07, 2008 at 10:14:29AM +0200, Andre Schwarz wrote:
> >
> >> The mvBlueCOUGAR-P is a MPC5200B based camera system with Intel Gigabit
> >> ethernet
> >> controller (using e1000). It's just anoth
Remove the "uninitialized use" compile warning and
avoid potential runtime issue.
Signed-off-by: Jason Jin <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/85xx/mpc8536_ds.c |2 +-
arch/powerpc/platforms/85xx/mpc85xx_ds.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a
On Tue, 2008-07-08 at 20:53 -0400, Sean MacLennan wrote:
> On Tue, 08 Jul 2008 15:54:40 +1000
> "Benjamin Herrenschmidt" <[EMAIL PROTECTED]> wrote:
>
> > This is some preliminary work to improve TLB management on SW loaded
> > TLB powerpc platforms. This introduce support for non-atomic PTE
> > op
On Tue, 2008-07-08 at 08:03 -0700, Grant Erickson wrote:
> This patch adds support to the RGMII handler in the EMAC driver for
> the MII PHY mode such that device tree entries of the form `phy-mode = "mii";'
> are recognized and handled appropriately.
>
> While logically, in software, "gmii" and "
On Mon, 2008-07-07 at 18:56 +0200, Christian Krafft wrote:
> From: Christian Krafft <[EMAIL PROTECTED]>
>
> This patch adds support for the power button on future IBM cell blades.
> It actually doesn't shut down the machine. Instead it exposes an
> input device /dev/input/event0 to userspace which
On Tue, 2008-07-08 at 11:27 -0400, Dave Jones wrote:
> On Tue, Jul 08, 2008 at 08:43:43AM +0200, Arnd Bergmann wrote:
> > On Monday 07 July 2008, Dave Jones wrote:
> > > One question I do have though, is how userspace scripts are supposed
> > > to know they're to echo cbe_spu_governor into the r
On Mon, 2008-07-07 at 09:28 -0500, Dave Kleikamp wrote:
> plain text document attachment (dont_clobber_M.patch)
> Signed-off-by: Dave Kleikamp <[EMAIL PROTECTED]>
> Cc: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
> ---
The old code looks bogus.. why clear M when G is set ? Only
I should have matter
On Wed, Jul 09, 2008 at 01:41:38PM +1000, Ben Herrenschmidt wrote:
> On Tue, 2008-07-08 at 11:27 -0400, Dave Jones wrote:
> > On Tue, Jul 08, 2008 at 08:43:43AM +0200, Arnd Bergmann wrote:
> > > On Monday 07 July 2008, Dave Jones wrote:
> > > > One question I do have though, is how userspace
On Tue, Jul 08, 2008 at 02:26:32PM +1000, David Gibson wrote:
> Does anyone on this list have contacts with the makers of this board?
>
> Its firmware apparently provides a flattened device tree to the OS.
> And while this step towards world domination is flattering, it's an
> example of what I fe
libfdt is supposed to easy to embed in projects all and sundry.
Often, it won't be practical to separate the embedded libfdt's
namespace from that of the surrounding project. Which means there can
be namespace conflicts between even libfdt's internal/static functions
and functions or macros coming
Hi all,
Today's linux-next build (powerpc ppc64_defconfig) failed like this:
In file included from include2/asm/pgtable.h:13,
from include/linux/mm.h:39,
from include/linux/mman.h:14,
from arch/powerpc/kernel/asm-offsets.c:22:
include2/asm/pgtabl
On Mon, 2008-07-07 at 17:02 +0200, Arnd Bergmann wrote:
> From: Christian Krafft <[EMAIL PROTECTED]>
>
> This patch adds a cpufreq governor that takes the number of running spus
> into account. It's very similar to the ondemand governor, but not as complex.
> Instead of hacking spu load into the o
On Wed, Jul 09, 2008 at 03:18:59PM +1000, Ben Herrenschmidt wrote:
> On Mon, 2008-07-07 at 17:02 +0200, Arnd Bergmann wrote:
> > From: Christian Krafft <[EMAIL PROTECTED]>
> >
> > This patch adds a cpufreq governor that takes the number of running spus
> > into account. It's very similar to t
> Cc:'ing some more people that might have more of a clue on this question.
> _memcpy_fromio does a "sync" at the start and an "eieio" at the end.
> IFAICT, neither are needed here because the source is always memory.
>
> It also handles unaligned memory accesses, which copy_to_user should
> also
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