Could you please try the following patch, I am quite sure that checking
for > 4 was accidentially done within io.c instead of >= 4 as if it's 4
we still can copy a 32-bit word. Some hardware might not be happy about
8-bit accesses...
Index: 2.6.30-source/arch/powerpc/kernel/io.c
==
Am 19.06.09 19:06 schrieb(en) Lorenz Kolb:
Could you please try the following patch, I am quite sure that
checking for > 4 was accidentially done within io.c instead of >= 4
as if it's 4 we still can copy a 32-bit word. Some hardware might not
be happy about 8-bit accesses...
I submitted t
On Fri, Jun 19, 2009 at 07:06:18PM +0200, Lorenz Kolb wrote:
> Could you please try the following patch, I am quite sure that checking
> for > 4 was accidentially done within io.c instead of >= 4 as if it's 4
> we still can copy a 32-bit word. Some hardware might not be happy about
> 8-bit a
Could you please try the following patch, I am quite sure that checking
for > 4 was accidentially done within io.c instead of >= 4 as if it's 4
we still can copy a 32-bit word. Some hardware might not be happy about
8-bit accesses...
Index: 2.6.30-source/arch/powerpc/kernel/io.c
==
I believe the question should be sent to u-b...@lists.denx.de,
not linuxppc-dev list.
What is the TLB settings for NAND FCM buffer? Pay attention
to set the TLB as cache inhibited and guarded attribute.
If not set the guarded bit, it is possible to cause the speculate
load from FCM buffer below t
