Re: [PATCH v5] ocxl: control via sysfs whether the FPGA is reloaded on a link reset

2020-07-16 Thread Michael Ellerman
On Fri, 19 Jun 2020 16:04:39 +0200, Frederic Barrat wrote: > Some opencapi FPGA images allow to control if the FPGA should be reloaded > on the next adapter reset. If it is supported, the image specifies it > through a Vendor Specific DVSEC in the config space of function 0. Applied to powerpc/nex

Re: [PATCH v5] ocxl: control via sysfs whether the FPGA is reloaded on a link reset

2020-07-02 Thread Andrew Donnellan
On 20/6/20 12:04 am, Frederic Barrat wrote: From: Philippe Bergheaud Some opencapi FPGA images allow to control if the FPGA should be reloaded on the next adapter reset. If it is supported, the image specifies it through a Vendor Specific DVSEC in the config space of function 0. Signed-off-by:

[PATCH v5] ocxl: control via sysfs whether the FPGA is reloaded on a link reset

2020-06-19 Thread Frederic Barrat
From: Philippe Bergheaud Some opencapi FPGA images allow to control if the FPGA should be reloaded on the next adapter reset. If it is supported, the image specifies it through a Vendor Specific DVSEC in the config space of function 0. Signed-off-by: Philippe Bergheaud Signed-off-by: Frederic B